200 lines
5.8 KiB
C
200 lines
5.8 KiB
C
/*======================================================================
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Device driver for the PCMCIA control functionality of StrongARM
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SA-1100 microprocessors.
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The contents of this file are subject to the Mozilla Public
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License Version 1.1 (the "License"); you may not use this file
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except in compliance with the License. You may obtain a copy of
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the License at http://www.mozilla.org/MPL/
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Software distributed under the License is distributed on an "AS
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IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
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implied. See the License for the specific language governing
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rights and limitations under the License.
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The initial developer of the original code is John G. Dorsey
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<john+@cs.cmu.edu>. Portions created by John G. Dorsey are
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Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
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Alternatively, the contents of this file may be used under the
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terms of the GNU Public License version 2 (the "GPL"), in which
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case the provisions of the GPL are applicable instead of the
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above. If you wish to allow the use of your version of this file
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only under the terms of the GPL and not to allow others to use
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your version of this file under the MPL, indicate your decision
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by deleting the provisions above and replace them with the notice
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and other provisions required by the GPL. If you do not delete
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the provisions above, a recipient may use your version of this
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file under either the MPL or the GPL.
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======================================================================*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include "soc_common.h"
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#include "sa11xx_base.h"
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/*
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* sa1100_pcmcia_default_mecr_timing
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* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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*
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* Calculate MECR clock wait states for given CPU clock
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* speed and command wait state. This function can be over-
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* written by a board specific version.
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*
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* The default is to simply calculate the BS values as specified in
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* the INTEL SA1100 development manual
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* "Expansion Memory (PCMCIA) Configuration Register (MECR)"
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* that's section 10.2.5 in _my_ version of the manual ;)
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*/
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static unsigned int
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sa1100_pcmcia_default_mecr_timing(struct soc_pcmcia_socket *skt,
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unsigned int cpu_speed,
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unsigned int cmd_time)
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{
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return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
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}
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/* sa1100_pcmcia_set_mecr()
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* ^^^^^^^^^^^^^^^^^^^^^^^^
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*
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* set MECR value for socket <sock> based on this sockets
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* io, mem and attribute space access speed.
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* Call board specific BS value calculation to allow boards
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* to tweak the BS values.
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*/
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static int
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sa1100_pcmcia_set_mecr(struct soc_pcmcia_socket *skt, unsigned int cpu_clock)
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{
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struct soc_pcmcia_timing timing;
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u32 mecr, old_mecr;
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unsigned long flags;
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unsigned int bs_io, bs_mem, bs_attr;
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soc_common_pcmcia_get_timing(skt, &timing);
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bs_io = skt->ops->get_timing(skt, cpu_clock, timing.io);
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bs_mem = skt->ops->get_timing(skt, cpu_clock, timing.mem);
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bs_attr = skt->ops->get_timing(skt, cpu_clock, timing.attr);
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local_irq_save(flags);
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old_mecr = mecr = MECR;
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MECR_FAST_SET(mecr, skt->nr, 0);
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MECR_BSIO_SET(mecr, skt->nr, bs_io);
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MECR_BSA_SET(mecr, skt->nr, bs_attr);
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MECR_BSM_SET(mecr, skt->nr, bs_mem);
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if (old_mecr != mecr)
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MECR = mecr;
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local_irq_restore(flags);
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debug(skt, 2, "FAST %X BSM %X BSA %X BSIO %X\n",
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MECR_FAST_GET(mecr, skt->nr),
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MECR_BSM_GET(mecr, skt->nr), MECR_BSA_GET(mecr, skt->nr),
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MECR_BSIO_GET(mecr, skt->nr));
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return 0;
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}
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#ifdef CONFIG_CPU_FREQ
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static int
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sa1100_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
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unsigned long val,
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struct cpufreq_freqs *freqs)
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{
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switch (val) {
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case CPUFREQ_PRECHANGE:
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if (freqs->new > freqs->old)
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sa1100_pcmcia_set_mecr(skt, freqs->new);
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break;
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case CPUFREQ_POSTCHANGE:
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if (freqs->new < freqs->old)
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sa1100_pcmcia_set_mecr(skt, freqs->new);
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break;
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case CPUFREQ_RESUMECHANGE:
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sa1100_pcmcia_set_mecr(skt, freqs->new);
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break;
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}
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return 0;
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}
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#endif
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static int
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sa1100_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
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{
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return sa1100_pcmcia_set_mecr(skt, cpufreq_get(0));
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}
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static int
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sa1100_pcmcia_show_timing(struct soc_pcmcia_socket *skt, char *buf)
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{
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struct soc_pcmcia_timing timing;
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unsigned int clock = cpufreq_get(0);
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unsigned long mecr = MECR;
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char *p = buf;
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soc_common_pcmcia_get_timing(skt, &timing);
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p+=sprintf(p, "I/O : %u (%u)\n", timing.io,
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sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr)));
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p+=sprintf(p, "attribute: %u (%u)\n", timing.attr,
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sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr)));
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p+=sprintf(p, "common : %u (%u)\n", timing.mem,
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sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr)));
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return p - buf;
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}
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int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
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int first, int nr)
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{
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/*
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* set default MECR calculation if the board specific
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* code did not specify one...
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*/
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if (!ops->get_timing)
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ops->get_timing = sa1100_pcmcia_default_mecr_timing;
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/* Provide our SA11x0 specific timing routines. */
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ops->set_timing = sa1100_pcmcia_set_timing;
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ops->show_timing = sa1100_pcmcia_show_timing;
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#ifdef CONFIG_CPU_FREQ
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ops->frequency_change = sa1100_pcmcia_frequency_change;
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#endif
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return soc_common_drv_pcmcia_probe(dev, ops, first, nr);
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}
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EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe);
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static int __init sa11xx_pcmcia_init(void)
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{
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return 0;
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}
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fs_initcall(sa11xx_pcmcia_init);
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static void __exit sa11xx_pcmcia_exit(void) {}
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module_exit(sa11xx_pcmcia_exit);
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MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
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MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11xx core socket driver");
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MODULE_LICENSE("Dual MPL/GPL");
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