170 lines
3.4 KiB
C
170 lines
3.4 KiB
C
#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#if __LINUX_ARM_ARCH__ < 6
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#error SMP not supported on pre-ARMv6 CPUs
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#endif
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/*
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* ARMv6 Spin-locking.
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*
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* We (exclusively) read the old value, and decrement it. If it
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* hits zero, we may have won the lock, so we try (exclusively)
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* storing it.
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*
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* Unlocked value: 0
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* Locked value: 1
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*/
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typedef struct {
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volatile unsigned int lock;
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#ifdef CONFIG_PREEMPT
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unsigned int break_lock;
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#endif
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} spinlock_t;
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#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
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#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while (0)
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#define spin_is_locked(x) ((x)->lock != 0)
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#define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x))
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#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
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static inline void _raw_spin_lock(spinlock_t *lock)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]\n"
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" teqeq %0, #0\n"
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" bne 1b"
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: "=&r" (tmp)
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: "r" (&lock->lock), "r" (1)
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: "cc", "memory");
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}
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static inline int _raw_spin_trylock(spinlock_t *lock)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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" ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]"
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: "=&r" (tmp)
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: "r" (&lock->lock), "r" (1)
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: "cc", "memory");
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return tmp == 0;
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}
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static inline void _raw_spin_unlock(spinlock_t *lock)
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{
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__asm__ __volatile__(
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" str %1, [%0]"
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:
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: "r" (&lock->lock), "r" (0)
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: "cc", "memory");
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}
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/*
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* RWLOCKS
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*/
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typedef struct {
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volatile unsigned int lock;
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#ifdef CONFIG_PREEMPT
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unsigned int break_lock;
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#endif
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} rwlock_t;
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#define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
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#define rwlock_init(x) do { *(x) + RW_LOCK_UNLOCKED; } while (0)
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/*
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* Write locks are easy - we just set bit 31. When unlocking, we can
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* just write zero since the lock is exclusively held.
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*/
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static inline void _raw_write_lock(rwlock_t *rw)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]\n"
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" teq %0, #0\n"
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" bne 1b"
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: "=&r" (tmp)
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: "r" (&rw->lock), "r" (0x80000000)
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: "cc", "memory");
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}
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static inline void _raw_write_unlock(rwlock_t *rw)
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{
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__asm__ __volatile__(
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"str %1, [%0]"
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:
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: "r" (&rw->lock), "r" (0)
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: "cc", "memory");
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}
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/*
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* Read locks are a bit more hairy:
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* - Exclusively load the lock value.
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* - Increment it.
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* - Store new lock value if positive, and we still own this location.
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* If the value is negative, we've already failed.
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* - If we failed to store the value, we want a negative result.
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* - If we failed, try again.
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* Unlocking is similarly hairy. We may have multiple read locks
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* currently active. However, we know we won't have any write
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* locks.
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*/
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static inline void _raw_read_lock(rwlock_t *rw)
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{
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unsigned long tmp, tmp2;
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__asm__ __volatile__(
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"1: ldrex %0, [%2]\n"
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" adds %0, %0, #1\n"
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" strexpl %1, %0, [%2]\n"
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" rsbpls %0, %1, #0\n"
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" bmi 1b"
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: "=&r" (tmp), "=&r" (tmp2)
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: "r" (&rw->lock)
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: "cc", "memory");
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}
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static inline void _raw_read_unlock(rwlock_t *rw)
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{
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__asm__ __volatile__(
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"1: ldrex %0, [%2]\n"
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" sub %0, %0, #1\n"
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" strex %1, %0, [%2]\n"
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" teq %1, #0\n"
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" bne 1b"
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: "=&r" (tmp), "=&r" (tmp2)
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: "r" (&rw->lock)
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: "cc", "memory");
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}
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#define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
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static inline int _raw_write_trylock(rwlock_t *rw)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]"
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: "=&r" (tmp)
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: "r" (&rw->lock), "r" (0x80000000)
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: "cc", "memory");
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return tmp == 0;
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}
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#endif /* __ASM_SPINLOCK_H */
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