301 lines
7.7 KiB
C
301 lines
7.7 KiB
C
/*
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* sunxi Watchdog Driver
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*
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* Copyright (c) 2013 Carlo Caione
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* 2012 Henrik Nordstrom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Based on xen_wdt.c
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* (c) Copyright 2010 Novell, Inc.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#define WDT_MAX_TIMEOUT 16
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#define WDT_MIN_TIMEOUT 1
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#define WDT_TIMEOUT_MASK 0x0F
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#define WDT_CTRL_RELOAD ((1 << 0) | (0x0a57 << 1))
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#define WDT_MODE_EN (1 << 0)
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#define DRV_NAME "sunxi-wdt"
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#define DRV_VERSION "1.0"
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static unsigned int timeout;
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/*
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* This structure stores the register offsets for different variants
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* of Allwinner's watchdog hardware.
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*/
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struct sunxi_wdt_reg {
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u8 wdt_ctrl;
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u8 wdt_cfg;
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u8 wdt_mode;
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u8 wdt_timeout_shift;
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u8 wdt_reset_mask;
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u8 wdt_reset_val;
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};
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struct sunxi_wdt_dev {
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struct watchdog_device wdt_dev;
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void __iomem *wdt_base;
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const struct sunxi_wdt_reg *wdt_regs;
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};
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/*
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* wdt_timeout_map maps the watchdog timer interval value in seconds to
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* the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
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*
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* [timeout seconds] = register value
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*
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*/
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static const int wdt_timeout_map[] = {
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[1] = 0x1, /* 1s */
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[2] = 0x2, /* 2s */
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[3] = 0x3, /* 3s */
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[4] = 0x4, /* 4s */
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[5] = 0x5, /* 5s */
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[6] = 0x6, /* 6s */
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[8] = 0x7, /* 8s */
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[10] = 0x8, /* 10s */
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[12] = 0x9, /* 12s */
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[14] = 0xA, /* 14s */
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[16] = 0xB, /* 16s */
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};
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static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
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unsigned long action, void *data)
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{
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struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = sunxi_wdt->wdt_base;
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const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
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u32 val;
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/* Set system reset function */
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val = readl(wdt_base + regs->wdt_cfg);
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val &= ~(regs->wdt_reset_mask);
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val |= regs->wdt_reset_val;
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writel(val, wdt_base + regs->wdt_cfg);
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/* Set lowest timeout and enable watchdog */
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val = readl(wdt_base + regs->wdt_mode);
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val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
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val |= WDT_MODE_EN;
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writel(val, wdt_base + regs->wdt_mode);
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/*
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* Restart the watchdog. The default (and lowest) interval
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* value for the watchdog is 0.5s.
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*/
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writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
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while (1) {
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mdelay(5);
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val = readl(wdt_base + regs->wdt_mode);
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val |= WDT_MODE_EN;
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writel(val, wdt_base + regs->wdt_mode);
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}
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return 0;
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}
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static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = sunxi_wdt->wdt_base;
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const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
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writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
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return 0;
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}
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static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = sunxi_wdt->wdt_base;
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const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
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u32 reg;
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if (wdt_timeout_map[timeout] == 0)
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timeout++;
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sunxi_wdt->wdt_dev.timeout = timeout;
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reg = readl(wdt_base + regs->wdt_mode);
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reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
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reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
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writel(reg, wdt_base + regs->wdt_mode);
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sunxi_wdt_ping(wdt_dev);
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return 0;
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}
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static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = sunxi_wdt->wdt_base;
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const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
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writel(0, wdt_base + regs->wdt_mode);
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return 0;
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}
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static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
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{
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u32 reg;
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struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = sunxi_wdt->wdt_base;
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const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
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int ret;
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ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
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sunxi_wdt->wdt_dev.timeout);
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if (ret < 0)
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return ret;
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/* Set system reset function */
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reg = readl(wdt_base + regs->wdt_cfg);
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reg &= ~(regs->wdt_reset_mask);
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reg |= regs->wdt_reset_val;
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writel(reg, wdt_base + regs->wdt_cfg);
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/* Enable watchdog */
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reg = readl(wdt_base + regs->wdt_mode);
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reg |= WDT_MODE_EN;
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writel(reg, wdt_base + regs->wdt_mode);
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return 0;
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}
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static const struct watchdog_info sunxi_wdt_info = {
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.identity = DRV_NAME,
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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static const struct watchdog_ops sunxi_wdt_ops = {
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.owner = THIS_MODULE,
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.start = sunxi_wdt_start,
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.stop = sunxi_wdt_stop,
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.ping = sunxi_wdt_ping,
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.set_timeout = sunxi_wdt_set_timeout,
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.restart = sunxi_wdt_restart,
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};
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static const struct sunxi_wdt_reg sun4i_wdt_reg = {
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.wdt_ctrl = 0x00,
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.wdt_cfg = 0x04,
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.wdt_mode = 0x04,
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.wdt_timeout_shift = 3,
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.wdt_reset_mask = 0x02,
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.wdt_reset_val = 0x02,
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};
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static const struct sunxi_wdt_reg sun6i_wdt_reg = {
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.wdt_ctrl = 0x10,
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.wdt_cfg = 0x14,
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.wdt_mode = 0x18,
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.wdt_timeout_shift = 4,
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.wdt_reset_mask = 0x03,
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.wdt_reset_val = 0x01,
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};
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static const struct of_device_id sunxi_wdt_dt_ids[] = {
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{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
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{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
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static int sunxi_wdt_probe(struct platform_device *pdev)
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{
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struct sunxi_wdt_dev *sunxi_wdt;
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struct resource *res;
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int err;
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sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
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if (!sunxi_wdt)
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return -EINVAL;
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sunxi_wdt->wdt_regs = of_device_get_match_data(&pdev->dev);
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if (!sunxi_wdt->wdt_regs)
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return -ENODEV;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(sunxi_wdt->wdt_base))
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return PTR_ERR(sunxi_wdt->wdt_base);
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sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
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sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
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sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
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sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
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sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
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sunxi_wdt->wdt_dev.parent = &pdev->dev;
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watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
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watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
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watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
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watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
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sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
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watchdog_stop_on_reboot(&sunxi_wdt->wdt_dev);
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err = devm_watchdog_register_device(&pdev->dev, &sunxi_wdt->wdt_dev);
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if (unlikely(err))
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return err;
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dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
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sunxi_wdt->wdt_dev.timeout, nowayout);
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return 0;
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}
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static struct platform_driver sunxi_wdt_driver = {
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.probe = sunxi_wdt_probe,
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.driver = {
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.name = DRV_NAME,
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.of_match_table = sunxi_wdt_dt_ids,
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},
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};
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module_platform_driver(sunxi_wdt_driver);
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module_param(timeout, uint, 0);
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MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
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MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
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MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
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MODULE_VERSION(DRV_VERSION);
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