e3e55ff585
commit 052dc7c45i "spi/dw_spi: conditional transfer mode change" introduced cs_control code, which has a bug by using bit offset for spi mode to set transfer mode in control register. Also it forces devices who don't need cs_control to re-configure the control registers for each spi transfer. This patch will fix them Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> |
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.. | ||
Kbuild | ||
ad7877.h | ||
ad7879.h | ||
ads7846.h | ||
at73c213.h | ||
corgi_lcd.h | ||
ds1305.h | ||
dw_spi.h | ||
eeprom.h | ||
flash.h | ||
l4f00242t03.h | ||
libertas_spi.h | ||
lms283gf05.h | ||
max7301.h | ||
mc33880.h | ||
mcp23s08.h | ||
mmc_spi.h | ||
orion_spi.h | ||
sh_msiof.h | ||
spi.h | ||
spi_bitbang.h | ||
spi_gpio.h | ||
spidev.h | ||
tdo24m.h | ||
tle62x0.h | ||
wl12xx.h | ||
xilinx_spi.h |