248 lines
6.7 KiB
C
248 lines
6.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef PINCTRL_PINCTRL_ABx500_H
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#define PINCTRL_PINCTRL_ABx500_H
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/* Package definitions */
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#define PINCTRL_AB8500 0
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#define PINCTRL_AB8540 1
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#define PINCTRL_AB9540 2
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#define PINCTRL_AB8505 3
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/* pins alternate function */
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enum abx500_pin_func {
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ABX500_DEFAULT,
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ABX500_ALT_A,
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ABX500_ALT_B,
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ABX500_ALT_C,
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};
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enum abx500_gpio_pull_updown {
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ABX500_GPIO_PULL_DOWN = 0x0,
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ABX500_GPIO_PULL_NONE = 0x1,
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ABX500_GPIO_PULL_UP = 0x3,
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};
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enum abx500_gpio_vinsel {
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ABX500_GPIO_VINSEL_VBAT = 0x0,
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ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
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ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
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};
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/**
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* struct abx500_function - ABx500 pinctrl mux function
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* @name: The name of the function, exported to pinctrl core.
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* @groups: An array of pin groups that may select this function.
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* @ngroups: The number of entries in @groups.
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*/
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struct abx500_function {
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const char *name;
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const char * const *groups;
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unsigned ngroups;
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};
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/**
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* struct abx500_pingroup - describes a ABx500 pin group
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* @name: the name of this specific pin group
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* @pins: an array of discrete physical pins used in this group, taken
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* from the driver-local pin enumeration space
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* @num_pins: the number of pins in this group array, i.e. the number of
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* elements in .pins so we can iterate over that array
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* @altsetting: the altsetting to apply to all pins in this group to
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* configure them to be used by a function
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*/
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struct abx500_pingroup {
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const char *name;
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const unsigned int *pins;
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const unsigned npins;
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int altsetting;
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};
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#define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \
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{ \
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.pin_number = pin, \
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.gpiosel_bit = sel_bit, \
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.alt_bit1 = alt1, \
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.alt_bit2 = alt2, \
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.alta_val = alta, \
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.altb_val = altb, \
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.altc_val = altc, \
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}
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#define UNUSED -1
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/**
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* struct alternate_functions
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* @pin_number: The pin number
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* @gpiosel_bit: Control bit in GPIOSEL register,
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* @alt_bit1: First AlternateFunction bit used to select the
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* alternate function
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* @alt_bit2: Second AlternateFunction bit used to select the
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* alternate function
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*
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* these 3 following fields are necessary due to none
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* coherency on how to select the altA, altB and altC
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* function between the ABx500 SOC family when using
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* alternatfunc register.
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* @alta_val: value to write in alternatfunc to select altA function
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* @altb_val: value to write in alternatfunc to select altB function
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* @altc_val: value to write in alternatfunc to select altC function
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*/
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struct alternate_functions {
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unsigned pin_number;
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s8 gpiosel_bit;
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s8 alt_bit1;
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s8 alt_bit2;
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u8 alta_val;
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u8 altb_val;
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u8 altc_val;
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};
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/**
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* struct pullud - specific pull up/down feature
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* @first_pin: The pin number of the first pins which support
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* specific pull up/down
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* @last_pin: The pin number of the last pins
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*/
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struct pullud {
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unsigned first_pin;
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unsigned last_pin;
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};
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#define GPIO_IRQ_CLUSTER(a, b, c) \
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{ \
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.start = a, \
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.end = b, \
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.to_irq = c, \
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}
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/**
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* struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
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* capable
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* @start: The pin number of the first pin interrupt capable
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* @end: The pin number of the last pin interrupt capable
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* @to_irq: The ABx500 GPIO's associated IRQs are clustered
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* together throughout the interrupt numbers at irregular
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* intervals. To solve this quandary, we will place the
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* read-in values into the cluster information table
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*/
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struct abx500_gpio_irq_cluster {
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int start;
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int end;
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int to_irq;
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};
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/**
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* struct abx500_pinrange - map pin numbers to GPIO offsets
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* @offset: offset into the GPIO local numberspace, incidentally
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* identical to the offset into the local pin numberspace
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* @npins: number of pins to map from both offsets
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* @altfunc: altfunc setting to be used to enable GPIO on a pin in
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* this range (may vary)
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*/
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struct abx500_pinrange {
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unsigned int offset;
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unsigned int npins;
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int altfunc;
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};
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#define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
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/**
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* struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
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* @gpio_ranges: An array of GPIO ranges for this SoC
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* @gpio_num_ranges: The number of GPIO ranges for this SoC
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* @pins: An array describing all pins the pin controller affects.
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* All pins which are also GPIOs must be listed first within the
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* array, and be numbered identically to the GPIO controller's
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* numbering.
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* @npins: The number of entries in @pins.
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* @functions: The functions supported on this SoC.
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* @nfunction: The number of entries in @functions.
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* @groups: An array describing all pin groups the pin SoC supports.
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* @ngroups: The number of entries in @groups.
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* @alternate_functions: array describing pins which supports alternate and
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* how to set it.
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* @pullud: array describing pins which supports pull up/down
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* specific registers.
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* @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC
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* @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC
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* @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
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* setting strategy of the rising interrupt line
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* @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
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* setting strategy of the falling interrupt line
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* @irq_gpio_factor: Factor used to compute specific setting strategy of
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* the interrupt line
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*/
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struct abx500_pinctrl_soc_data {
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const struct abx500_pinrange *gpio_ranges;
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unsigned gpio_num_ranges;
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const struct pinctrl_pin_desc *pins;
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unsigned npins;
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const struct abx500_function *functions;
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unsigned nfunctions;
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const struct abx500_pingroup *groups;
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unsigned ngroups;
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struct alternate_functions *alternate_functions;
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struct pullud *pullud;
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struct abx500_gpio_irq_cluster *gpio_irq_cluster;
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unsigned ngpio_irq_cluster;
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int irq_gpio_rising_offset;
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int irq_gpio_falling_offset;
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int irq_gpio_factor;
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};
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#ifdef CONFIG_PINCTRL_AB8500
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void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
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#else
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static inline void
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abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
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{
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}
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#endif
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#ifdef CONFIG_PINCTRL_AB8540
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void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc);
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#else
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static inline void
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abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
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{
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}
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#endif
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#ifdef CONFIG_PINCTRL_AB9540
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void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc);
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#else
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static inline void
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abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
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{
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}
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#endif
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#ifdef CONFIG_PINCTRL_AB8505
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void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
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#else
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static inline void
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abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
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{
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}
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#endif
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#endif /* PINCTRL_PINCTRL_ABx500_H */
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