301 lines
8.0 KiB
C
301 lines
8.0 KiB
C
/*
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* linux/drivers/ide/pci/ns87415.c Version 2.00 Sep. 10, 2002
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*
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* Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
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* Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
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* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
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* Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
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*
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* Inspired by an earlier effort from David S. Miller <davem@redhat.com>
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/blkdev.h>
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#include <linux/hdreg.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#ifdef CONFIG_SUPERIO
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/* SUPERIO 87560 is a PoS chip that NatSem denies exists.
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* Unfortunately, it's built-in on all Astro-based PA-RISC workstations
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* which use the integrated NS87514 cell for CD-ROM support.
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* i.e we have to support for CD-ROM installs.
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* See drivers/parisc/superio.c for more gory details.
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*/
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#include <asm/superio.h>
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static unsigned long superio_ide_status[2];
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static unsigned long superio_ide_select[2];
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static unsigned long superio_ide_dma_status[2];
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#define SUPERIO_IDE_MAX_RETRIES 25
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/* Because of a defect in Super I/O, all reads of the PCI DMA status
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* registers, IDE status register and the IDE select register need to be
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* retried
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*/
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static u8 superio_ide_inb (unsigned long port)
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{
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if (port == superio_ide_status[0] ||
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port == superio_ide_status[1] ||
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port == superio_ide_select[0] ||
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port == superio_ide_select[1] ||
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port == superio_ide_dma_status[0] ||
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port == superio_ide_dma_status[1]) {
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u8 tmp;
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int retries = SUPERIO_IDE_MAX_RETRIES;
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/* printk(" [ reading port 0x%x with retry ] ", port); */
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do {
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tmp = inb(port);
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if (tmp == 0)
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udelay(50);
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} while (tmp == 0 && retries-- > 0);
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return tmp;
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}
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return inb(port);
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}
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static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
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{
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u32 base, dmabase;
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u8 tmp;
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struct pci_dev *pdev = hwif->pci_dev;
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u8 port = hwif->channel;
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base = pci_resource_start(pdev, port * 2) & ~3;
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dmabase = pci_resource_start(pdev, 4) & ~3;
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superio_ide_status[port] = base + IDE_STATUS_OFFSET;
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superio_ide_select[port] = base + IDE_SELECT_OFFSET;
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superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
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/* Clear error/interrupt, enable dma */
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tmp = superio_ide_inb(superio_ide_dma_status[port]);
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outb(tmp | 0x66, superio_ide_dma_status[port]);
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/* We need to override inb to workaround a SuperIO errata */
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hwif->INB = superio_ide_inb;
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}
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static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
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{
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if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) {
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/* Built-in - assume it's under superio. */
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superio_ide_init_iops(hwif);
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}
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}
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#endif
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static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
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/*
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* This routine either enables/disables (according to drive->present)
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* the IRQ associated with the port (HWIF(drive)),
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* and selects either PIO or DMA handshaking for the next I/O operation.
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*/
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static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
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struct pci_dev *dev = hwif->pci_dev;
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unsigned long flags;
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local_irq_save(flags);
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new = *old;
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/* Adjust IRQ enable bit */
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bit = 1 << (8 + hwif->channel);
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new = drive->present ? (new & ~bit) : (new | bit);
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/* Select PIO or DMA, DMA may only be selected for one drive/channel. */
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bit = 1 << (20 + drive->select.b.unit + (hwif->channel << 1));
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other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1));
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new = use_dma ? ((new & ~other) | bit) : (new & ~bit);
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if (new != *old) {
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unsigned char stat;
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/*
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* Don't change DMA engine settings while Write Buffers
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* are busy.
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*/
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(void) pci_read_config_byte(dev, 0x43, &stat);
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while (stat & 0x03) {
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udelay(1);
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(void) pci_read_config_byte(dev, 0x43, &stat);
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}
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*old = new;
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(void) pci_write_config_dword(dev, 0x40, new);
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/*
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* And let things settle...
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*/
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udelay(10);
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}
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local_irq_restore(flags);
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}
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static void ns87415_selectproc (ide_drive_t *drive)
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{
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ns87415_prepare_drive (drive, drive->using_dma);
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}
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static int ns87415_ide_dma_end (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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u8 dma_stat = 0, dma_cmd = 0;
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drive->waiting_for_dma = 0;
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dma_stat = hwif->INB(hwif->dma_status);
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/* get dma command mode */
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dma_cmd = hwif->INB(hwif->dma_command);
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/* stop DMA */
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outb(dma_cmd & ~1, hwif->dma_command);
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/* from ERRATA: clear the INTR & ERROR bits */
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dma_cmd = hwif->INB(hwif->dma_command);
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outb(dma_cmd | 6, hwif->dma_command);
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/* and free any DMA resources */
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ide_destroy_dmatable(drive);
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/* verify good DMA status */
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return (dma_stat & 7) != 4;
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}
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static int ns87415_ide_dma_setup(ide_drive_t *drive)
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{
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/* select DMA xfer */
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ns87415_prepare_drive(drive, 1);
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if (!ide_dma_setup(drive))
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return 0;
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/* DMA failed: select PIO xfer */
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ns87415_prepare_drive(drive, 0);
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return 1;
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}
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static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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unsigned int ctrl, using_inta;
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u8 progif;
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#ifdef __sparc_v9__
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int timeout;
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u8 stat;
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#endif
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hwif->selectproc = &ns87415_selectproc;
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/*
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* We cannot probe for IRQ: both ports share common IRQ on INTA.
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* Also, leave IRQ masked during drive probing, to prevent infinite
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* interrupts from a potentially floating INTA..
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*
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* IRQs get unmasked in selectproc when drive is first used.
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*/
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(void) pci_read_config_dword(dev, 0x40, &ctrl);
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(void) pci_read_config_byte(dev, 0x09, &progif);
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/* is irq in "native" mode? */
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using_inta = progif & (1 << (hwif->channel << 1));
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if (!using_inta)
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using_inta = ctrl & (1 << (4 + hwif->channel));
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if (hwif->mate) {
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hwif->select_data = hwif->mate->select_data;
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} else {
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hwif->select_data = (unsigned long)
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&ns87415_control[ns87415_count++];
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ctrl |= (1 << 8) | (1 << 9); /* mask both IRQs */
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if (using_inta)
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ctrl &= ~(1 << 6); /* unmask INTA */
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*((unsigned int *)hwif->select_data) = ctrl;
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(void) pci_write_config_dword(dev, 0x40, ctrl);
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/*
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* Set prefetch size to 512 bytes for both ports,
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* but don't turn on/off prefetching here.
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*/
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pci_write_config_byte(dev, 0x55, 0xee);
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#ifdef __sparc_v9__
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/*
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* XXX: Reset the device, if we don't it will not respond
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* to SELECT_DRIVE() properly during first probe_hwif().
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*/
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timeout = 10000;
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outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
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udelay(10);
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outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
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do {
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udelay(50);
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stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
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if (stat == 0xff)
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break;
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} while ((stat & BUSY_STAT) && --timeout);
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#endif
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}
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if (!using_inta)
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hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]);
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else if (!hwif->irq && hwif->mate && hwif->mate->irq)
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hwif->irq = hwif->mate->irq; /* share IRQ with mate */
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if (!hwif->dma_base)
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return;
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outb(0x60, hwif->dma_status);
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hwif->dma_setup = &ns87415_ide_dma_setup;
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hwif->ide_dma_end = &ns87415_ide_dma_end;
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}
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static ide_pci_device_t ns87415_chipset __devinitdata = {
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.name = "NS87415",
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#ifdef CONFIG_SUPERIO
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.init_iops = init_iops_ns87415,
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#endif
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.init_hwif = init_hwif_ns87415,
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.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
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IDE_HFLAG_NO_ATAPI_DMA |
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IDE_HFLAG_BOOTABLE,
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};
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static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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return ide_setup_pci_device(dev, &ns87415_chipset);
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}
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static const struct pci_device_id ns87415_pci_tbl[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87415), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl);
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static struct pci_driver driver = {
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.name = "NS87415_IDE",
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.id_table = ns87415_pci_tbl,
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.probe = ns87415_init_one,
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};
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static int __init ns87415_ide_init(void)
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{
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return ide_pci_register_driver(&driver);
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}
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module_init(ns87415_ide_init);
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MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
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MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
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MODULE_LICENSE("GPL");
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