linux_old1/drivers/clk/socfpga
Dinh Nguyen b488517b28 clk: socfpga: stratix10: fix naming convention for the fixed-clocks
The fixed clocks in the DTS file have a hyphen, but the clock driver has
the fixed clocks using underbar. Thus the clock driver cannot detect the
other fixed clocks correctly. Change the fixed clock names to a hyphen.

Fixes: 07afb8db73 ("clk: socfpga: stratix10: add clock driver for
Stratix10 platform")
Cc: linux-stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-15 12:58:38 -08:00
..
Makefile clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-gate-a10.c clk: socfpga: Fix the smplsel on Arria10 and Stratix10 2017-06-19 17:01:55 -07:00
clk-gate-s10.c clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-gate.c clk: socfpga: switch to GENMASK() 2015-07-28 11:59:16 -07:00
clk-periph-a10.c clk: socfpga: allow for multiple parents on Arria10 periph clocks 2016-02-22 14:17:37 -08:00
clk-periph-s10.c clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-periph.c clk: socfpga: Add a second parent option for the dbg_base_clk 2015-08-24 16:49:03 -07:00
clk-pll-a10.c clk: socfpga: fix __init annotation 2016-02-08 14:13:31 -08:00
clk-pll-s10.c clk: socfpga: stratix10: fix rate calculation for pll clocks 2019-01-11 15:41:02 -08:00
clk-pll.c clk: socfpga: Remove clk.h and clkdev.h includes 2015-07-20 11:11:14 -07:00
clk-s10.c clk: socfpga: stratix10: fix naming convention for the fixed-clocks 2019-01-15 12:58:38 -08:00
clk.c clk: socfpga: add a clock driver for the Arria 10 platform 2015-05-21 15:16:04 -07:00
clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
stratix10-clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00