488 lines
14 KiB
C
488 lines
14 KiB
C
/*
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* Lager board support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/gpio.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_data/camera-rcar.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_data/rcar-du.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/gpio-regulator.h>
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#include <linux/regulator/machine.h>
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#include <linux/sh_eth.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r8a7790.h>
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#include <media/soc_camera.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/mtd.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/rspi.h>
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#include <linux/spi/spi.h>
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/* DU */
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static struct rcar_du_encoder_data lager_du_encoders[] = {
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{
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.type = RCAR_DU_ENCODER_VGA,
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.output = RCAR_DU_OUTPUT_DPAD0,
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}, {
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.type = RCAR_DU_ENCODER_NONE,
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.output = RCAR_DU_OUTPUT_LVDS1,
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.connector.lvds.panel = {
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.width_mm = 210,
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.height_mm = 158,
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.mode = {
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.clock = 65000,
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.hdisplay = 1024,
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.hsync_start = 1048,
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.hsync_end = 1184,
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.htotal = 1344,
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.vdisplay = 768,
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.vsync_start = 771,
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.vsync_end = 777,
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.vtotal = 806,
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.flags = 0,
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},
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},
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},
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};
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static const struct rcar_du_platform_data lager_du_pdata __initconst = {
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.encoders = lager_du_encoders,
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.num_encoders = ARRAY_SIZE(lager_du_encoders),
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};
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static const struct resource du_resources[] __initconst = {
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DEFINE_RES_MEM(0xfeb00000, 0x70000),
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DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
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DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
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DEFINE_RES_IRQ(gic_spi(256)),
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DEFINE_RES_IRQ(gic_spi(268)),
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DEFINE_RES_IRQ(gic_spi(269)),
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};
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static void __init lager_add_du_device(void)
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{
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struct platform_device_info info = {
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.name = "rcar-du-r8a7790",
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.id = -1,
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.res = du_resources,
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.num_res = ARRAY_SIZE(du_resources),
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.data = &lager_du_pdata,
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.size_data = sizeof(lager_du_pdata),
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.dma_mask = DMA_BIT_MASK(32),
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};
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platform_device_register_full(&info);
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}
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/* LEDS */
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static struct gpio_led lager_leds[] = {
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{
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.name = "led8",
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.gpio = RCAR_GP_PIN(5, 17),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led7",
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.gpio = RCAR_GP_PIN(4, 23),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led6",
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.gpio = RCAR_GP_PIN(4, 22),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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},
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};
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static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
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.leds = lager_leds,
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.num_leds = ARRAY_SIZE(lager_leds),
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};
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/* GPIO KEY */
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#define GPIO_KEY(c, g, d, ...) \
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{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
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.wakeup = 1, .debounce_interval = 20 }
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static struct gpio_keys_button gpio_buttons[] = {
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GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
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GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
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GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
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GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
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};
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static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
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.buttons = gpio_buttons,
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.nbuttons = ARRAY_SIZE(gpio_buttons),
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};
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/* Fixed 3.3V regulator to be used by MMCIF */
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static struct regulator_consumer_supply fixed3v3_power_consumers[] =
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{
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REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
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};
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/*
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* SDHI regulator macro
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*
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** FIXME**
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* Lager board vqmmc is provided via DA9063 PMIC chip,
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* and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
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* but, it doesn't have regulator support at this point.
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* It uses gpio-regulator for vqmmc as quick-hack.
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*/
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#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
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static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
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REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
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\
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static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
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.constraints = { \
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.valid_ops_mask = REGULATOR_CHANGE_STATUS, \
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}, \
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.consumer_supplies = &vcc_sdhi##idx##_consumer, \
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.num_consumer_supplies = 1, \
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}; \
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\
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static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
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.supply_name = "SDHI" #idx "Vcc", \
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.microvolts = 3300000, \
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.gpio = vdd_pin, \
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.enable_high = 1, \
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.init_data = &vcc_sdhi##idx##_init_data, \
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}; \
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\
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static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
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\
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static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
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.constraints = { \
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.input_uV = 3300000, \
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.min_uV = 1800000, \
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.max_uV = 3300000, \
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
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REGULATOR_CHANGE_STATUS, \
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}, \
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.consumer_supplies = &vccq_sdhi##idx##_consumer, \
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.num_consumer_supplies = 1, \
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}; \
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\
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static struct gpio vccq_sdhi##idx##_gpio = \
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{ vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
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\
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static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
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{ .value = 1800000, .gpios = 0 }, \
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{ .value = 3300000, .gpios = 1 }, \
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}; \
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\
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static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
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.supply_name = "vqmmc", \
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.gpios = &vccq_sdhi##idx##_gpio, \
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.nr_gpios = 1, \
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.states = vccq_sdhi##idx##_states, \
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.nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
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.type = REGULATOR_VOLTAGE, \
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.init_data = &vccq_sdhi##idx##_init_data, \
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};
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SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
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SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
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/* MMCIF */
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static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
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.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
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.clk_ctrl2_present = true,
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.ccs_unsupported = true,
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};
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static const struct resource mmcif1_resources[] __initconst = {
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DEFINE_RES_MEM(0xee220000, 0x80),
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DEFINE_RES_IRQ(gic_spi(170)),
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};
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/* Ether */
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static const struct sh_eth_plat_data ether_pdata __initconst = {
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.phy = 0x1,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.phy_interface = PHY_INTERFACE_MODE_RMII,
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.ether_link_active_low = 1,
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};
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static const struct resource ether_resources[] __initconst = {
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DEFINE_RES_MEM(0xee700000, 0x400),
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DEFINE_RES_IRQ(gic_spi(162)),
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};
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/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
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static struct mtd_partition spi_flash_part[] = {
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/* Reserved for user loader program, read-only */
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{
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.name = "loader",
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.offset = 0,
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.size = SZ_256K,
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.mask_flags = MTD_WRITEABLE,
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},
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/* Reserved for user program, read-only */
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{
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.name = "user",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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.mask_flags = MTD_WRITEABLE,
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},
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/* All else is writable (e.g. JFFS2) */
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{
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.name = "flash",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static const struct flash_platform_data spi_flash_data = {
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.name = "m25p80",
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.parts = spi_flash_part,
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.nr_parts = ARRAY_SIZE(spi_flash_part),
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.type = "s25fl512s",
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};
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static const struct rspi_plat_data qspi_pdata __initconst = {
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.num_chipselect = 1,
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};
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static const struct spi_board_info spi_info[] __initconst = {
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{
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.modalias = "m25p80",
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.platform_data = &spi_flash_data,
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.mode = SPI_MODE_0,
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.max_speed_hz = 30000000,
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.bus_num = 0,
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.chip_select = 0,
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},
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};
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/* QSPI resource */
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static const struct resource qspi_resources[] __initconst = {
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DEFINE_RES_MEM(0xe6b10000, 0x1000),
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DEFINE_RES_IRQ(gic_spi(184)),
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};
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/* VIN */
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static const struct resource vin_resources[] __initconst = {
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/* VIN0 */
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DEFINE_RES_MEM(0xe6ef0000, 0x1000),
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DEFINE_RES_IRQ(gic_spi(188)),
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/* VIN1 */
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DEFINE_RES_MEM(0xe6ef1000, 0x1000),
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DEFINE_RES_IRQ(gic_spi(189)),
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};
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static void __init lager_add_vin_device(unsigned idx,
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struct rcar_vin_platform_data *pdata)
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{
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struct platform_device_info vin_info = {
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.parent = &platform_bus,
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.name = "r8a7790-vin",
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.id = idx,
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.res = &vin_resources[idx * 2],
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.num_res = 2,
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.dma_mask = DMA_BIT_MASK(32),
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.data = pdata,
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.size_data = sizeof(*pdata),
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};
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BUG_ON(idx > 1);
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platform_device_register_full(&vin_info);
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}
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#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
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static struct i2c_board_info i2c_cam##idx##_device = { \
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I2C_BOARD_INFO(name, addr), \
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}; \
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\
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static struct rcar_vin_platform_data vin##idx##_pdata = { \
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.flags = flag, \
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}; \
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\
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static struct soc_camera_link cam##idx##_link = { \
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.bus_id = idx, \
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.board_info = &i2c_cam##idx##_device, \
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.i2c_adapter_id = 2, \
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.module_name = name, \
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.priv = pdata, \
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}
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/* Camera 0 is not currently supported due to adv7612 support missing */
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LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
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static void __init lager_add_camera1_device(void)
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{
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platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
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&cam1_link, sizeof(cam1_link));
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lager_add_vin_device(1, &vin1_pdata);
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}
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static const struct pinctrl_map lager_pinctrl_map[] = {
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/* DU (CN10: ARGB0, CN13: LVDS) */
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
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"du_rgb666", "du"),
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
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"du_sync_1", "du"),
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PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
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"du_clk_out_0", "du"),
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/* SCIF0 (CN19: DEBUG SERIAL0) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
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"scif0_data", "scif0"),
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/* SCIF1 (CN20: DEBUG SERIAL1) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
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"scif1_data", "scif1"),
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/* MMCIF1 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
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"mmc1_data8", "mmc1"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
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"mmc1_ctrl", "mmc1"),
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/* Ether */
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_link", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_mdio", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_rmii", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"intc_irq0", "intc"),
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/* VIN0 */
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
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"vin0_data24", "vin0"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
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"vin0_sync", "vin0"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
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"vin0_field", "vin0"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
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"vin0_clkenb", "vin0"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
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"vin0_clk", "vin0"),
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/* VIN1 */
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
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"vin1_data8", "vin1"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
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"vin1_clk", "vin1"),
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};
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static void __init lager_add_standard_devices(void)
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{
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int fixed_regulator_idx = 0;
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int gpio_regulator_idx = 0;
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r8a7790_clock_init();
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pinctrl_register_mappings(lager_pinctrl_map,
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ARRAY_SIZE(lager_pinctrl_map));
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r8a7790_pinmux_init();
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r8a7790_add_standard_devices();
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platform_device_register_data(&platform_bus, "leds-gpio", -1,
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&lager_leds_pdata,
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sizeof(lager_leds_pdata));
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platform_device_register_data(&platform_bus, "gpio-keys", -1,
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&lager_keys_pdata,
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sizeof(lager_keys_pdata));
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regulator_register_always_on(fixed_regulator_idx++,
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"fixed-3.3V", fixed3v3_power_consumers,
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ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
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platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
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mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
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&mmcif1_pdata, sizeof(mmcif1_pdata));
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platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
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ether_resources,
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ARRAY_SIZE(ether_resources),
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ðer_pdata, sizeof(ether_pdata));
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lager_add_du_device();
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platform_device_register_resndata(&platform_bus, "qspi", 0,
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qspi_resources,
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ARRAY_SIZE(qspi_resources),
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&qspi_pdata, sizeof(qspi_pdata));
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spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
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platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
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&vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
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platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
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&vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
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platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
|
|
&vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
|
|
platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
|
|
&vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
|
|
|
|
lager_add_camera1_device();
|
|
}
|
|
|
|
/*
|
|
* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
|
|
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
|
|
* 14-15. We have to set them back to 01 from the default 00 value each time
|
|
* the PHY is reset. It's also important because the PHY's LED0 signal is
|
|
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
|
|
* bounce on and off after each packet, which we apparently want to avoid.
|
|
*/
|
|
static int lager_ksz8041_fixup(struct phy_device *phydev)
|
|
{
|
|
u16 phyctrl1 = phy_read(phydev, 0x1e);
|
|
|
|
phyctrl1 &= ~0xc000;
|
|
phyctrl1 |= 0x4000;
|
|
return phy_write(phydev, 0x1e, phyctrl1);
|
|
}
|
|
|
|
static void __init lager_init(void)
|
|
{
|
|
lager_add_standard_devices();
|
|
|
|
if (IS_ENABLED(CONFIG_PHYLIB))
|
|
phy_register_fixup_for_id("r8a7790-ether-ff:01",
|
|
lager_ksz8041_fixup);
|
|
}
|
|
|
|
static const char * const lager_boards_compat_dt[] __initconst = {
|
|
"renesas,lager",
|
|
NULL,
|
|
};
|
|
|
|
DT_MACHINE_START(LAGER_DT, "lager")
|
|
.smp = smp_ops(r8a7790_smp_ops),
|
|
.init_early = r8a7790_init_early,
|
|
.init_time = rcar_gen2_timer_init,
|
|
.init_machine = lager_init,
|
|
.init_late = shmobile_init_late,
|
|
.dt_compat = lager_boards_compat_dt,
|
|
MACHINE_END
|