289 lines
6.7 KiB
C
289 lines
6.7 KiB
C
/*
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* PCBIT-D low-layer interface definitions
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*
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* Copyright (C) 1996 Universidade de Lisboa
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*
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* Written by Pedro Roque Marques (roque@di.fc.ul.pt)
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*
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* This software may be used and distributed according to the terms of
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* the GNU General Public License, incorporated herein by reference.
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*/
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/*
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* 19991203 - Fernando Carvalho - takion@superbofh.org
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* Hacked to compile with egcs and run with current version of isdn modules
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*/
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#ifndef LAYER2_H
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#define LAYER2_H
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#include <linux/interrupt.h>
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#include <asm/byteorder.h>
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#define BANK1 0x0000U /* PC -> Board */
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#define BANK2 0x01ffU /* Board -> PC */
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#define BANK3 0x03feU /* Att Board */
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#define BANK4 0x03ffU /* Att PC */
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#define BANKLEN 0x01FFU
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#define LOAD_ZONE_START 0x03f8U
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#define LOAD_ZONE_END 0x03fdU
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#define LOAD_RETRY 18000000
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/* TAM - XX - C - S - NUM */
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#define PREHDR_LEN 8
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/* TT - M - I - TH - TD */
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#define FRAME_HDR_LEN 8
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#define MSG_CONN_REQ 0x08000100
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#define MSG_CONN_CONF 0x00000101
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#define MSG_CONN_IND 0x00000102
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#define MSG_CONN_RESP 0x08000103
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#define MSG_CONN_ACTV_REQ 0x08000300
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#define MSG_CONN_ACTV_CONF 0x00000301
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#define MSG_CONN_ACTV_IND 0x00000302
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#define MSG_CONN_ACTV_RESP 0x08000303
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#define MSG_DISC_REQ 0x08000400
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#define MSG_DISC_CONF 0x00000401
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#define MSG_DISC_IND 0x00000402
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#define MSG_DISC_RESP 0x08000403
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#define MSG_TDATA_REQ 0x0908E200
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#define MSG_TDATA_CONF 0x0000E201
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#define MSG_TDATA_IND 0x0000E202
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#define MSG_TDATA_RESP 0x0908E203
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#define MSG_SELP_REQ 0x09004000
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#define MSG_SELP_CONF 0x00004001
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#define MSG_ACT_TRANSP_REQ 0x0908E000
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#define MSG_ACT_TRANSP_CONF 0x0000E001
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#define MSG_STPROT_REQ 0x09004100
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#define MSG_STPROT_CONF 0x00004101
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#define MSG_PING188_REQ 0x09030500
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#define MSG_PING188_CONF 0x000005bc
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#define MSG_WATCH188 0x09030400
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#define MSG_API_ON 0x08020102
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#define MSG_POOL_PCBIT 0x08020400
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#define MSG_POOL_PCBIT_CONF 0x00000401
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#define MSG_INFO_IND 0x00002602
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#define MSG_INFO_RESP 0x08002603
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#define MSG_DEBUG_188 0x0000ff00
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/*
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long 4 3 2 1
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Intel 1 2 3 4
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*/
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#ifdef __LITTLE_ENDIAN
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#define SET_MSG_SCMD(msg, ch) (msg = (msg & 0xffffff00) | (((ch) & 0xff)))
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#define SET_MSG_CMD(msg, ch) (msg = (msg & 0xffff00ff) | (((ch) & 0xff) << 8))
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#define SET_MSG_PROC(msg, ch) (msg = (msg & 0xff00ffff) | (((ch) & 0xff) << 16))
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#define SET_MSG_CPU(msg, ch) (msg = (msg & 0x00ffffff) | (((ch) & 0xff) << 24))
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#define GET_MSG_SCMD(msg) ((msg) & 0xFF)
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#define GET_MSG_CMD(msg) ((msg) >> 8 & 0xFF)
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#define GET_MSG_PROC(msg) ((msg) >> 16 & 0xFF)
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#define GET_MSG_CPU(msg) ((msg) >> 24)
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#else
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#error "Non-Intel CPU"
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#endif
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#define MAX_QUEUED 7
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#define SCHED_READ 0x01
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#define SCHED_WRITE 0x02
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#define SET_RUN_TIMEOUT 2*HZ /* 2 seconds */
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struct frame_buf {
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ulong msg;
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unsigned int refnum;
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unsigned int dt_len;
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unsigned int hdr_len;
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struct sk_buff *skb;
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unsigned int copied;
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struct frame_buf * next;
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};
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extern int pcbit_l2_write(struct pcbit_dev * dev, ulong msg, ushort refnum,
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struct sk_buff *skb, unsigned short hdr_len);
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extern irqreturn_t pcbit_irq_handler(int interrupt, void *);
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extern struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS];
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#ifdef DEBUG
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static __inline__ void log_state(struct pcbit_dev *dev) {
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printk(KERN_DEBUG "writeptr = %ld\n",
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(ulong) (dev->writeptr - dev->sh_mem));
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printk(KERN_DEBUG "readptr = %ld\n",
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(ulong) (dev->readptr - (dev->sh_mem + BANK2)));
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printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",
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dev->rcv_seq, dev->send_seq, dev->unack_seq);
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}
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#endif
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static __inline__ struct pcbit_dev * chan2dev(struct pcbit_chan * chan)
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{
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struct pcbit_dev * dev;
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int i;
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for (i=0; i<MAX_PCBIT_CARDS; i++)
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if ((dev=dev_pcbit[i]))
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if (dev->b1 == chan || dev->b2 == chan)
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return dev;
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return NULL;
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}
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static __inline__ struct pcbit_dev * finddev(int id)
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{
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struct pcbit_dev * dev;
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int i;
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for (i=0; i<MAX_PCBIT_CARDS; i++)
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if ((dev=dev_pcbit[i]))
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if (dev->id == id)
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return dev;
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return NULL;
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}
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/*
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* Support routines for reading and writing in the board
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*/
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static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
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{
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writeb(dt, dev->writeptr++);
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if (dev->writeptr == dev->sh_mem + BANKLEN)
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dev->writeptr = dev->sh_mem;
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}
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static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
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{
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int dist;
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dist = BANKLEN - (dev->writeptr - dev->sh_mem);
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switch (dist) {
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case 2:
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writew(dt, dev->writeptr);
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dev->writeptr = dev->sh_mem;
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break;
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case 1:
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writeb((u_char) (dt & 0x00ffU), dev->writeptr);
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dev->writeptr = dev->sh_mem;
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writeb((u_char) (dt >> 8), dev->writeptr++);
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break;
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default:
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writew(dt, dev->writeptr);
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dev->writeptr += 2;
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break;
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};
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}
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static __inline__ void memcpy_topcbit(struct pcbit_dev * dev, u_char * data,
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int len)
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{
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int diff;
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diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem) );
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if (diff > 0)
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{
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memcpy_toio(dev->writeptr, data, len - diff);
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memcpy_toio(dev->sh_mem, data + (len - diff), diff);
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dev->writeptr = dev->sh_mem + diff;
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}
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else
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{
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memcpy_toio(dev->writeptr, data, len);
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dev->writeptr += len;
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if (diff == 0)
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dev->writeptr = dev->sh_mem;
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}
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}
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static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
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{
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unsigned char val;
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val = readb(dev->readptr++);
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if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
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dev->readptr = dev->sh_mem + BANK2;
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return val;
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}
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static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
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{
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int dist;
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unsigned short val;
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dist = BANKLEN - ( dev->readptr - (dev->sh_mem + BANK2 ) );
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switch (dist) {
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case 2:
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val = readw(dev->readptr);
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dev->readptr = dev->sh_mem + BANK2;
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break;
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case 1:
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val = readb(dev->readptr);
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dev->readptr = dev->sh_mem + BANK2;
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val = (readb(dev->readptr++) << 8) | val;
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break;
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default:
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val = readw(dev->readptr);
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dev->readptr += 2;
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break;
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};
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return val;
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}
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static __inline__ void memcpy_frompcbit(struct pcbit_dev * dev, u_char * data, int len)
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{
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int diff;
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diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2) ) );
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if (diff > 0)
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{
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memcpy_fromio(data, dev->readptr, len - diff);
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memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
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dev->readptr = dev->sh_mem + BANK2 + diff;
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}
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else
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{
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memcpy_fromio(data, dev->readptr, len);
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dev->readptr += len;
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if (diff == 0)
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dev->readptr = dev->sh_mem + BANK2;
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}
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}
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#endif
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