581 lines
13 KiB
C
581 lines
13 KiB
C
/*
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* nct7904.c - driver for Nuvoton NCT7904D.
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*
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* Copyright (c) 2015 Kontron
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* Author: Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/hwmon.h>
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#define VENDOR_ID_REG 0x7A /* Any bank */
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#define NUVOTON_ID 0x50
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#define CHIP_ID_REG 0x7B /* Any bank */
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#define NCT7904_ID 0xC5
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#define DEVICE_ID_REG 0x7C /* Any bank */
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#define BANK_SEL_REG 0xFF
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#define BANK_0 0x00
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#define BANK_1 0x01
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#define BANK_2 0x02
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#define BANK_3 0x03
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#define BANK_4 0x04
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#define BANK_MAX 0x04
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#define FANIN_MAX 12 /* Counted from 1 */
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#define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
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LTD (not a voltage), VSEN17..19 */
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#define FANCTL_MAX 4 /* Counted from 1 */
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#define TCPU_MAX 8 /* Counted from 1 */
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#define TEMP_MAX 4 /* Counted from 1 */
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#define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
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#define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
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#define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
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#define FANIN_CTRL0_REG 0x24
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#define FANIN_CTRL1_REG 0x25
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#define DTS_T_CTRL0_REG 0x26
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#define DTS_T_CTRL1_REG 0x27
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#define VT_ADC_MD_REG 0x2E
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#define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
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#define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
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#define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
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#define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
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#define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
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#define PRTS_REG 0x03 /* Bank 2 */
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#define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
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#define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
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static const unsigned short normal_i2c[] = {
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0x2d, 0x2e, I2C_CLIENT_END
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};
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struct nct7904_data {
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struct i2c_client *client;
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struct mutex bank_lock;
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int bank_sel;
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u32 fanin_mask;
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u32 vsen_mask;
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u32 tcpu_mask;
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u8 fan_mode[FANCTL_MAX];
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};
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/* Access functions */
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static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank)
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{
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int ret;
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mutex_lock(&data->bank_lock);
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if (data->bank_sel == bank)
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return 0;
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ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank);
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if (ret == 0)
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data->bank_sel = bank;
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else
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data->bank_sel = -1;
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return ret;
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}
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static inline void nct7904_bank_release(struct nct7904_data *data)
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{
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mutex_unlock(&data->bank_lock);
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}
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/* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
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static int nct7904_read_reg(struct nct7904_data *data,
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unsigned int bank, unsigned int reg)
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{
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struct i2c_client *client = data->client;
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int ret;
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ret = nct7904_bank_lock(data, bank);
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if (ret == 0)
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ret = i2c_smbus_read_byte_data(client, reg);
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nct7904_bank_release(data);
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return ret;
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}
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/*
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* Read 2-byte register. Returns register in big-endian format or
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* -ERRNO on error.
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*/
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static int nct7904_read_reg16(struct nct7904_data *data,
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unsigned int bank, unsigned int reg)
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{
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struct i2c_client *client = data->client;
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int ret, hi;
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ret = nct7904_bank_lock(data, bank);
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if (ret == 0) {
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ret = i2c_smbus_read_byte_data(client, reg);
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if (ret >= 0) {
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hi = ret;
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ret = i2c_smbus_read_byte_data(client, reg + 1);
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if (ret >= 0)
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ret |= hi << 8;
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}
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}
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nct7904_bank_release(data);
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return ret;
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}
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/* Write 1-byte register. Returns 0 or -ERRNO on error. */
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static int nct7904_write_reg(struct nct7904_data *data,
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unsigned int bank, unsigned int reg, u8 val)
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{
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struct i2c_client *client = data->client;
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int ret;
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ret = nct7904_bank_lock(data, bank);
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if (ret == 0)
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ret = i2c_smbus_write_byte_data(client, reg, val);
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nct7904_bank_release(data);
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return ret;
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}
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static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7904_data *data = dev_get_drvdata(dev);
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unsigned int cnt, rpm;
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int ret;
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switch (attr) {
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case hwmon_fan_input:
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ret = nct7904_read_reg16(data, BANK_0,
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FANIN1_HV_REG + channel * 2);
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if (ret < 0)
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return ret;
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cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
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if (cnt == 0x1fff)
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rpm = 0;
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else
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rpm = 1350000 / cnt;
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*val = rpm;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
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{
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const struct nct7904_data *data = _data;
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if (attr == hwmon_fan_input && data->fanin_mask & (1 << channel))
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return S_IRUGO;
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return 0;
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}
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static u8 nct7904_chan_to_index[] = {
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0, /* Not used */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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18, 19, 20, 16
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};
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static int nct7904_read_in(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7904_data *data = dev_get_drvdata(dev);
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int ret, volt, index;
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index = nct7904_chan_to_index[channel];
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switch (attr) {
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case hwmon_in_input:
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ret = nct7904_read_reg16(data, BANK_0,
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VSEN1_HV_REG + index * 2);
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if (ret < 0)
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return ret;
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volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
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if (index < 14)
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volt *= 2; /* 0.002V scale */
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else
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volt *= 6; /* 0.006V scale */
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*val = volt;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
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{
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const struct nct7904_data *data = _data;
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int index = nct7904_chan_to_index[channel];
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if (channel > 0 && attr == hwmon_in_input &&
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(data->vsen_mask & BIT(index)))
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return S_IRUGO;
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return 0;
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}
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static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7904_data *data = dev_get_drvdata(dev);
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int ret, temp;
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switch (attr) {
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case hwmon_temp_input:
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if (channel == 0)
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ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
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else
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ret = nct7904_read_reg16(data, BANK_0,
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T_CPU1_HV_REG + (channel - 1) * 2);
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if (ret < 0)
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return ret;
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temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
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*val = sign_extend32(temp, 10) * 125;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
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{
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const struct nct7904_data *data = _data;
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if (attr == hwmon_temp_input) {
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if (channel == 0) {
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if (data->vsen_mask & BIT(17))
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return S_IRUGO;
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} else {
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if (data->tcpu_mask & BIT(channel - 1))
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return S_IRUGO;
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}
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}
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return 0;
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}
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static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7904_data *data = dev_get_drvdata(dev);
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int ret;
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switch (attr) {
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case hwmon_pwm_input:
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ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel);
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if (ret < 0)
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return ret;
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*val = ret;
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return 0;
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case hwmon_pwm_enable:
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ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + channel);
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if (ret < 0)
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return ret;
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*val = ret ? 2 : 1;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
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long val)
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{
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struct nct7904_data *data = dev_get_drvdata(dev);
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int ret;
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switch (attr) {
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case hwmon_pwm_input:
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if (val < 0 || val > 255)
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return -EINVAL;
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ret = nct7904_write_reg(data, BANK_3, FANCTL1_OUT_REG + channel,
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val);
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return ret;
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case hwmon_pwm_enable:
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if (val < 1 || val > 2 ||
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(val == 2 && !data->fan_mode[channel]))
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return -EINVAL;
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ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + channel,
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val == 2 ? data->fan_mode[channel] : 0);
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return ret;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel)
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{
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switch (attr) {
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case hwmon_pwm_input:
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case hwmon_pwm_enable:
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return S_IRUGO | S_IWUSR;
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default:
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return 0;
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}
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}
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static int nct7904_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_in:
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return nct7904_read_in(dev, attr, channel, val);
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case hwmon_fan:
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return nct7904_read_fan(dev, attr, channel, val);
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case hwmon_pwm:
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return nct7904_read_pwm(dev, attr, channel, val);
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case hwmon_temp:
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return nct7904_read_temp(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_pwm:
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return nct7904_write_pwm(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7904_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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switch (type) {
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case hwmon_in:
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return nct7904_in_is_visible(data, attr, channel);
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case hwmon_fan:
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return nct7904_fan_is_visible(data, attr, channel);
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case hwmon_pwm:
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return nct7904_pwm_is_visible(data, attr, channel);
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case hwmon_temp:
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return nct7904_temp_is_visible(data, attr, channel);
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default:
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return 0;
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}
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}
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/* Return 0 if detection is successful, -ENODEV otherwise */
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static int nct7904_detect(struct i2c_client *client,
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struct i2c_board_info *info)
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{
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struct i2c_adapter *adapter = client->adapter;
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if (!i2c_check_functionality(adapter,
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I2C_FUNC_SMBUS_READ_BYTE |
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I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
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return -ENODEV;
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/* Determine the chip type. */
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if (i2c_smbus_read_byte_data(client, VENDOR_ID_REG) != NUVOTON_ID ||
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i2c_smbus_read_byte_data(client, CHIP_ID_REG) != NCT7904_ID ||
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(i2c_smbus_read_byte_data(client, DEVICE_ID_REG) & 0xf0) != 0x50 ||
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(i2c_smbus_read_byte_data(client, BANK_SEL_REG) & 0xf8) != 0x00)
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return -ENODEV;
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strlcpy(info->type, "nct7904", I2C_NAME_SIZE);
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return 0;
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}
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static const u32 nct7904_in_config[] = {
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HWMON_I_INPUT, /* dummy, skipped in is_visible */
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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0
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};
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static const struct hwmon_channel_info nct7904_in = {
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.type = hwmon_in,
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.config = nct7904_in_config,
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};
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static const u32 nct7904_fan_config[] = {
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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HWMON_F_INPUT,
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0
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};
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static const struct hwmon_channel_info nct7904_fan = {
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.type = hwmon_fan,
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.config = nct7904_fan_config,
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};
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static const u32 nct7904_pwm_config[] = {
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HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
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HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
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HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
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HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
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0
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};
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static const struct hwmon_channel_info nct7904_pwm = {
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.type = hwmon_pwm,
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.config = nct7904_pwm_config,
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};
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static const u32 nct7904_temp_config[] = {
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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0
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};
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static const struct hwmon_channel_info nct7904_temp = {
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.type = hwmon_temp,
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.config = nct7904_temp_config,
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};
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static const struct hwmon_channel_info *nct7904_info[] = {
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&nct7904_in,
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&nct7904_fan,
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&nct7904_pwm,
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&nct7904_temp,
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NULL
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};
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static const struct hwmon_ops nct7904_hwmon_ops = {
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.is_visible = nct7904_is_visible,
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.read = nct7904_read,
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.write = nct7904_write,
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};
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static const struct hwmon_chip_info nct7904_chip_info = {
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.ops = &nct7904_hwmon_ops,
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.info = nct7904_info,
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};
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static int nct7904_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct nct7904_data *data;
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struct device *hwmon_dev;
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struct device *dev = &client->dev;
|
|
int ret, i;
|
|
u32 mask;
|
|
|
|
data = devm_kzalloc(dev, sizeof(struct nct7904_data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
data->client = client;
|
|
mutex_init(&data->bank_lock);
|
|
data->bank_sel = -1;
|
|
|
|
/* Setup sensor groups. */
|
|
/* FANIN attributes */
|
|
ret = nct7904_read_reg16(data, BANK_0, FANIN_CTRL0_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8);
|
|
|
|
/*
|
|
* VSEN attributes
|
|
*
|
|
* Note: voltage sensors overlap with external temperature
|
|
* sensors. So, if we ever decide to support the latter
|
|
* we will have to adjust 'vsen_mask' accordingly.
|
|
*/
|
|
mask = 0;
|
|
ret = nct7904_read_reg16(data, BANK_0, VT_ADC_CTRL0_REG);
|
|
if (ret >= 0)
|
|
mask = (ret >> 8) | ((ret & 0xff) << 8);
|
|
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
|
|
if (ret >= 0)
|
|
mask |= (ret << 16);
|
|
data->vsen_mask = mask;
|
|
|
|
/* CPU_TEMP attributes */
|
|
ret = nct7904_read_reg16(data, BANK_0, DTS_T_CTRL0_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
data->tcpu_mask = ((ret >> 8) & 0xf) | ((ret & 0xf) << 4);
|
|
|
|
for (i = 0; i < FANCTL_MAX; i++) {
|
|
ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + i);
|
|
if (ret < 0)
|
|
return ret;
|
|
data->fan_mode[i] = ret;
|
|
}
|
|
|
|
hwmon_dev =
|
|
devm_hwmon_device_register_with_info(dev, client->name, data,
|
|
&nct7904_chip_info, NULL);
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
|
}
|
|
|
|
static const struct i2c_device_id nct7904_id[] = {
|
|
{"nct7904", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, nct7904_id);
|
|
|
|
static struct i2c_driver nct7904_driver = {
|
|
.class = I2C_CLASS_HWMON,
|
|
.driver = {
|
|
.name = "nct7904",
|
|
},
|
|
.probe = nct7904_probe,
|
|
.id_table = nct7904_id,
|
|
.detect = nct7904_detect,
|
|
.address_list = normal_i2c,
|
|
};
|
|
|
|
module_i2c_driver(nct7904_driver);
|
|
|
|
MODULE_AUTHOR("Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>");
|
|
MODULE_DESCRIPTION("Hwmon driver for NUVOTON NCT7904");
|
|
MODULE_LICENSE("GPL");
|