1178 lines
27 KiB
C
1178 lines
27 KiB
C
/*
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* i8042 keyboard and mouse controller driver for Linux
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*
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* Copyright (c) 1999-2004 Vojtech Pavlik
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*/
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/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/serio.h>
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#include <linux/err.h>
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#include <linux/rcupdate.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
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MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
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MODULE_LICENSE("GPL");
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static unsigned int i8042_nokbd;
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module_param_named(nokbd, i8042_nokbd, bool, 0);
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MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
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static unsigned int i8042_noaux;
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module_param_named(noaux, i8042_noaux, bool, 0);
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MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
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static unsigned int i8042_nomux;
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module_param_named(nomux, i8042_nomux, bool, 0);
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MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
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static unsigned int i8042_unlock;
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module_param_named(unlock, i8042_unlock, bool, 0);
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MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
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static unsigned int i8042_reset;
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module_param_named(reset, i8042_reset, bool, 0);
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MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
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static unsigned int i8042_direct;
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module_param_named(direct, i8042_direct, bool, 0);
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MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
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static unsigned int i8042_dumbkbd;
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module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
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MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
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static unsigned int i8042_noloop;
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module_param_named(noloop, i8042_noloop, bool, 0);
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MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
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static unsigned int i8042_blink_frequency = 500;
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module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
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MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
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#ifdef CONFIG_PNP
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static int i8042_nopnp;
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module_param_named(nopnp, i8042_nopnp, bool, 0);
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MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
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#endif
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#define DEBUG
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#ifdef DEBUG
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static int i8042_debug;
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module_param_named(debug, i8042_debug, bool, 0600);
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MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
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#endif
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__obsolete_setup("i8042_noaux");
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__obsolete_setup("i8042_nomux");
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__obsolete_setup("i8042_unlock");
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__obsolete_setup("i8042_reset");
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__obsolete_setup("i8042_direct");
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__obsolete_setup("i8042_dumbkbd");
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#include "i8042.h"
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static DEFINE_SPINLOCK(i8042_lock);
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struct i8042_port {
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struct serio *serio;
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int irq;
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unsigned char disable;
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unsigned char irqen;
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unsigned char exists;
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signed char mux;
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char name[8];
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};
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#define I8042_KBD_PORT_NO 0
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#define I8042_AUX_PORT_NO 1
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#define I8042_MUX_PORT_NO 2
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#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
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static struct i8042_port i8042_ports[I8042_NUM_PORTS] = {
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{
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.disable = I8042_CTR_KBDDIS,
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.irqen = I8042_CTR_KBDINT,
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.mux = -1,
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.name = "KBD",
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},
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{
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.disable = I8042_CTR_AUXDIS,
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.irqen = I8042_CTR_AUXINT,
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.mux = -1,
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.name = "AUX",
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}
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};
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static unsigned char i8042_initial_ctr;
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static unsigned char i8042_ctr;
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static unsigned char i8042_mux_open;
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static unsigned char i8042_mux_present;
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static struct timer_list i8042_timer;
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static struct platform_device *i8042_platform_device;
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/*
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* Shared IRQ's require a device pointer, but this driver doesn't support
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* multiple devices
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*/
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#define i8042_request_irq_cookie (&i8042_timer)
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static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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/*
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* The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
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* be ready for reading values from it / writing values to it.
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* Called always with i8042_lock held.
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*/
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static int i8042_wait_read(void)
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{
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int i = 0;
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while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
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udelay(50);
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i++;
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}
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return -(i == I8042_CTL_TIMEOUT);
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}
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static int i8042_wait_write(void)
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{
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int i = 0;
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while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
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udelay(50);
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i++;
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}
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return -(i == I8042_CTL_TIMEOUT);
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}
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/*
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* i8042_flush() flushes all data that may be in the keyboard and mouse buffers
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* of the i8042 down the toilet.
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*/
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static int i8042_flush(void)
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{
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unsigned long flags;
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unsigned char data, str;
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int i = 0;
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spin_lock_irqsave(&i8042_lock, flags);
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while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
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udelay(50);
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data = i8042_read_data();
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i++;
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dbg("%02x <- i8042 (flush, %s)", data,
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str & I8042_STR_AUXDATA ? "aux" : "kbd");
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}
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spin_unlock_irqrestore(&i8042_lock, flags);
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return i;
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}
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/*
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* i8042_command() executes a command on the i8042. It also sends the input
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* parameter(s) of the commands to it, and receives the output value(s). The
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* parameters are to be stored in the param array, and the output is placed
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* into the same array. The number of the parameters and output values is
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* encoded in bits 8-11 of the command number.
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*/
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static int i8042_command(unsigned char *param, int command)
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{
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unsigned long flags;
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int i, retval, auxerr = 0;
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if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
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return -1;
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spin_lock_irqsave(&i8042_lock, flags);
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if ((retval = i8042_wait_write()))
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goto out;
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dbg("%02x -> i8042 (command)", command & 0xff);
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i8042_write_command(command & 0xff);
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for (i = 0; i < ((command >> 12) & 0xf); i++) {
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if ((retval = i8042_wait_write()))
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goto out;
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dbg("%02x -> i8042 (parameter)", param[i]);
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i8042_write_data(param[i]);
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}
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for (i = 0; i < ((command >> 8) & 0xf); i++) {
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if ((retval = i8042_wait_read()))
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goto out;
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if (command == I8042_CMD_AUX_LOOP &&
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!(i8042_read_status() & I8042_STR_AUXDATA)) {
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retval = auxerr = -1;
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goto out;
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}
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param[i] = i8042_read_data();
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dbg("%02x <- i8042 (return)", param[i]);
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}
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if (retval)
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dbg(" -- i8042 (%s)", auxerr ? "auxerr" : "timeout");
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out:
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spin_unlock_irqrestore(&i8042_lock, flags);
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return retval;
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}
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/*
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* i8042_kbd_write() sends a byte out through the keyboard interface.
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*/
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static int i8042_kbd_write(struct serio *port, unsigned char c)
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{
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unsigned long flags;
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int retval = 0;
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spin_lock_irqsave(&i8042_lock, flags);
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if(!(retval = i8042_wait_write())) {
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dbg("%02x -> i8042 (kbd-data)", c);
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i8042_write_data(c);
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}
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spin_unlock_irqrestore(&i8042_lock, flags);
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return retval;
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}
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/*
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* i8042_aux_write() sends a byte out through the aux interface.
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*/
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static int i8042_aux_write(struct serio *serio, unsigned char c)
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{
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struct i8042_port *port = serio->port_data;
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int retval;
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/*
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* Send the byte out.
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*/
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if (port->mux == -1)
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retval = i8042_command(&c, I8042_CMD_AUX_SEND);
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else
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retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux);
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/*
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* Make sure the interrupt happens and the character is received even
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* in the case the IRQ isn't wired, so that we can receive further
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* characters later.
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*/
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i8042_interrupt(0, NULL, NULL);
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return retval;
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}
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/*
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* i8042_activate_port() enables port on a chip.
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*/
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static int i8042_activate_port(struct i8042_port *port)
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{
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if (!port->serio)
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return -1;
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i8042_flush();
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/*
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* Enable port again here because it is disabled if we are
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* resuming (normally it is enabled already).
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*/
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i8042_ctr &= ~port->disable;
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i8042_ctr |= port->irqen;
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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i8042_ctr &= ~port->irqen;
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return -1;
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}
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return 0;
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}
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/*
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* i8042_open() is called when a port is open by the higher layer.
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* It allocates the interrupt and calls i8042_enable_port.
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*/
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static int i8042_open(struct serio *serio)
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{
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struct i8042_port *port = serio->port_data;
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if (port->mux != -1)
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if (i8042_mux_open++)
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return 0;
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if (request_irq(port->irq, i8042_interrupt,
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IRQF_SHARED, "i8042", i8042_request_irq_cookie)) {
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printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", port->irq, port->name);
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goto irq_fail;
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}
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if (i8042_activate_port(port)) {
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printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", port->name);
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goto activate_fail;
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}
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i8042_interrupt(0, NULL, NULL);
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return 0;
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activate_fail:
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free_irq(port->irq, i8042_request_irq_cookie);
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irq_fail:
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serio_unregister_port_delayed(serio);
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return -1;
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}
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/*
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* i8042_close() frees the interrupt, so that it can possibly be used
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* by another driver. We never know - if the user doesn't have a mouse,
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* the BIOS could have used the AUX interrupt for PCI.
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*/
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static void i8042_close(struct serio *serio)
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{
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struct i8042_port *port = serio->port_data;
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if (port->mux != -1)
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if (--i8042_mux_open)
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return;
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i8042_ctr &= ~port->irqen;
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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printk(KERN_WARNING "i8042.c: Can't write CTR while closing %s.\n", port->name);
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/*
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* We still want to continue and free IRQ so if more data keeps coming in
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* kernel will just ignore the irq.
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*/
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}
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free_irq(port->irq, i8042_request_irq_cookie);
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i8042_flush();
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}
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/*
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* i8042_start() is called by serio core when port is about to finish
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* registering. It will mark port as existing so i8042_interrupt can
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* start sending data through it.
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*/
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static int i8042_start(struct serio *serio)
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{
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struct i8042_port *port = serio->port_data;
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port->exists = 1;
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mb();
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return 0;
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}
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/*
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* i8042_stop() marks serio port as non-existing so i8042_interrupt
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* will not try to send data to the port that is about to go away.
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* The function is called by serio core as part of unregister procedure.
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*/
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static void i8042_stop(struct serio *serio)
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{
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struct i8042_port *port = serio->port_data;
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port->exists = 0;
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synchronize_sched();
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port->serio = NULL;
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}
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/*
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* i8042_interrupt() is the most important function in this driver -
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* it handles the interrupts from the i8042, and sends incoming bytes
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* to the upper layers.
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*/
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static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct i8042_port *port;
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unsigned long flags;
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unsigned char str, data;
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unsigned int dfl;
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unsigned int port_no;
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int ret;
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mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
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spin_lock_irqsave(&i8042_lock, flags);
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str = i8042_read_status();
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if (unlikely(~str & I8042_STR_OBF)) {
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spin_unlock_irqrestore(&i8042_lock, flags);
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if (irq) dbg("Interrupt %d, without any data", irq);
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ret = 0;
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goto out;
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}
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data = i8042_read_data();
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spin_unlock_irqrestore(&i8042_lock, flags);
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if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
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static unsigned long last_transmit;
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static unsigned char last_str;
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dfl = 0;
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if (str & I8042_STR_MUXERR) {
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dbg("MUX error, status is %02x, data is %02x", str, data);
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switch (data) {
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default:
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/*
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* When MUXERR condition is signalled the data register can only contain
|
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* 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
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* it is not always the case. Some KBC just get confused which port the
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* data came from and signal error leaving the data intact. They _do not_
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* revert to legacy mode (actually I've never seen KBC reverting to legacy
|
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* mode yet, when we see one we'll add proper handling).
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* Anyway, we will assume that the data came from the same serio last byte
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* was transmitted (if transmission happened not too long ago).
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*/
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if (time_before(jiffies, last_transmit + HZ/10)) {
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str = last_str;
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break;
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}
|
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/* fall through - report timeout */
|
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case 0xfd:
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case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
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case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
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}
|
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}
|
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|
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port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
|
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last_str = str;
|
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last_transmit = jiffies;
|
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} else {
|
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|
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dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
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((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
|
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|
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port_no = (str & I8042_STR_AUXDATA) ?
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I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
|
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}
|
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|
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port = &i8042_ports[port_no];
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|
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dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
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data, port->name, irq,
|
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dfl & SERIO_PARITY ? ", bad parity" : "",
|
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dfl & SERIO_TIMEOUT ? ", timeout" : "");
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|
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if (likely(port->exists))
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serio_interrupt(port->serio, data, dfl, regs);
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|
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ret = 1;
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out:
|
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return IRQ_RETVAL(ret);
|
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}
|
|
|
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/*
|
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* i8042_set_mux_mode checks whether the controller has an active
|
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* multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
|
|
*/
|
|
|
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static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
|
|
{
|
|
|
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unsigned char param;
|
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/*
|
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* Get rid of bytes in the queue.
|
|
*/
|
|
|
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i8042_flush();
|
|
|
|
/*
|
|
* Internal loopback test - send three bytes, they should come back from the
|
|
* mouse interface, the last should be version. Note that we negate mouseport
|
|
* command responses for the i8042_check_aux() routine.
|
|
*/
|
|
|
|
param = 0xf0;
|
|
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
|
|
return -1;
|
|
param = mode ? 0x56 : 0xf6;
|
|
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
|
|
return -1;
|
|
param = mode ? 0xa4 : 0xa5;
|
|
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
|
|
return -1;
|
|
|
|
if (mux_version)
|
|
*mux_version = param;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* i8042_enable_mux_ports enables 4 individual AUX ports after
|
|
* the controller has been switched into Multiplexed mode
|
|
*/
|
|
|
|
static int i8042_enable_mux_ports(void)
|
|
{
|
|
unsigned char param;
|
|
int i;
|
|
/*
|
|
* Disable all muxed ports by disabling AUX.
|
|
*/
|
|
|
|
i8042_ctr |= I8042_CTR_AUXDIS;
|
|
i8042_ctr &= ~I8042_CTR_AUXINT;
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
|
|
printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Enable all muxed ports.
|
|
*/
|
|
|
|
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
|
|
i8042_command(¶m, I8042_CMD_MUX_PFX + i);
|
|
i8042_command(¶m, I8042_CMD_AUX_ENABLE);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* i8042_check_mux() checks whether the controller supports the PS/2 Active
|
|
* Multiplexing specification by Synaptics, Phoenix, Insyde and
|
|
* LCS/Telegraphics.
|
|
*/
|
|
|
|
static int __devinit i8042_check_mux(void)
|
|
{
|
|
unsigned char mux_version;
|
|
|
|
if (i8042_set_mux_mode(1, &mux_version))
|
|
return -1;
|
|
|
|
/* Workaround for interference with USB Legacy emulation */
|
|
/* that causes a v10.12 MUX to be found. */
|
|
if (mux_version == 0xAC)
|
|
return -1;
|
|
|
|
printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
|
|
(mux_version >> 4) & 0xf, mux_version & 0xf);
|
|
|
|
if (i8042_enable_mux_ports())
|
|
return -1;
|
|
|
|
i8042_mux_present = 1;
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* i8042_check_aux() applies as much paranoia as it can at detecting
|
|
* the presence of an AUX interface.
|
|
*/
|
|
|
|
static int __devinit i8042_check_aux(void)
|
|
{
|
|
unsigned char param;
|
|
static int i8042_check_aux_cookie;
|
|
|
|
/*
|
|
* Check if AUX irq is available. If it isn't, then there is no point
|
|
* in trying to detect AUX presence.
|
|
*/
|
|
|
|
if (request_irq(i8042_ports[I8042_AUX_PORT_NO].irq, i8042_interrupt,
|
|
IRQF_SHARED, "i8042", &i8042_check_aux_cookie))
|
|
return -1;
|
|
free_irq(i8042_ports[I8042_AUX_PORT_NO].irq, &i8042_check_aux_cookie);
|
|
|
|
/*
|
|
* Get rid of bytes in the queue.
|
|
*/
|
|
|
|
i8042_flush();
|
|
|
|
/*
|
|
* Internal loopback test - filters out AT-type i8042's. Unfortunately
|
|
* SiS screwed up and their 5597 doesn't support the LOOP command even
|
|
* though it has an AUX port.
|
|
*/
|
|
|
|
param = 0x5a;
|
|
if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) {
|
|
|
|
/*
|
|
* External connection test - filters out AT-soldered PS/2 i8042's
|
|
* 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
|
|
* 0xfa - no error on some notebooks which ignore the spec
|
|
* Because it's common for chipsets to return error on perfectly functioning
|
|
* AUX ports, we test for this only when the LOOP command failed.
|
|
*/
|
|
|
|
if (i8042_command(¶m, I8042_CMD_AUX_TEST)
|
|
|| (param && param != 0xfa && param != 0xff))
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Bit assignment test - filters out PS/2 i8042's in AT mode
|
|
*/
|
|
|
|
if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
|
|
return -1;
|
|
if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
|
|
printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
|
|
printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
|
|
}
|
|
|
|
if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
|
|
return -1;
|
|
if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
|
|
return -1;
|
|
|
|
/*
|
|
* Disable the interface.
|
|
*/
|
|
|
|
i8042_ctr |= I8042_CTR_AUXDIS;
|
|
i8042_ctr &= ~I8042_CTR_AUXINT;
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
|
|
return -1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* i8042_port_register() marks the device as existing,
|
|
* registers it, and reports to the user.
|
|
*/
|
|
|
|
static int __devinit i8042_port_register(struct i8042_port *port)
|
|
{
|
|
i8042_ctr &= ~port->disable;
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
|
|
printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
|
|
kfree(port->serio);
|
|
port->serio = NULL;
|
|
i8042_ctr |= port->disable;
|
|
return -EIO;
|
|
}
|
|
|
|
printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
|
|
port->name,
|
|
(unsigned long) I8042_DATA_REG,
|
|
(unsigned long) I8042_COMMAND_REG,
|
|
port->irq);
|
|
|
|
serio_register_port(port->serio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static void i8042_timer_func(unsigned long data)
|
|
{
|
|
i8042_interrupt(0, NULL, NULL);
|
|
}
|
|
|
|
static int i8042_ctl_test(void)
|
|
{
|
|
unsigned char param;
|
|
|
|
if (!i8042_reset)
|
|
return 0;
|
|
|
|
if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
|
|
printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
|
|
return -1;
|
|
}
|
|
|
|
if (param != I8042_RET_CTL_TEST) {
|
|
printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
|
|
param, I8042_RET_CTL_TEST);
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* i8042_controller init initializes the i8042 controller, and,
|
|
* most importantly, sets it into non-xlated mode if that's
|
|
* desired.
|
|
*/
|
|
|
|
static int i8042_controller_init(void)
|
|
{
|
|
unsigned long flags;
|
|
|
|
/*
|
|
* Test the i8042. We need to know if it thinks it's working correctly
|
|
* before doing anything else.
|
|
*/
|
|
|
|
if (i8042_flush() == I8042_BUFFER_SIZE) {
|
|
printk(KERN_ERR "i8042.c: No controller found.\n");
|
|
return -1;
|
|
}
|
|
|
|
if (i8042_ctl_test())
|
|
return -1;
|
|
|
|
/*
|
|
* Save the CTR for restoral on unload / reboot.
|
|
*/
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
|
|
printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
|
|
return -1;
|
|
}
|
|
|
|
i8042_initial_ctr = i8042_ctr;
|
|
|
|
/*
|
|
* Disable the keyboard interface and interrupt.
|
|
*/
|
|
|
|
i8042_ctr |= I8042_CTR_KBDDIS;
|
|
i8042_ctr &= ~I8042_CTR_KBDINT;
|
|
|
|
/*
|
|
* Handle keylock.
|
|
*/
|
|
|
|
spin_lock_irqsave(&i8042_lock, flags);
|
|
if (~i8042_read_status() & I8042_STR_KEYLOCK) {
|
|
if (i8042_unlock)
|
|
i8042_ctr |= I8042_CTR_IGNKEYLOCK;
|
|
else
|
|
printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
|
|
}
|
|
spin_unlock_irqrestore(&i8042_lock, flags);
|
|
|
|
/*
|
|
* If the chip is configured into nontranslated mode by the BIOS, don't
|
|
* bother enabling translating and be happy.
|
|
*/
|
|
|
|
if (~i8042_ctr & I8042_CTR_XLATE)
|
|
i8042_direct = 1;
|
|
|
|
/*
|
|
* Set nontranslated mode for the kbd interface if requested by an option.
|
|
* After this the kbd interface becomes a simple serial in/out, like the aux
|
|
* interface is. We don't do this by default, since it can confuse notebook
|
|
* BIOSes.
|
|
*/
|
|
|
|
if (i8042_direct)
|
|
i8042_ctr &= ~I8042_CTR_XLATE;
|
|
|
|
/*
|
|
* Write CTR back.
|
|
*/
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
|
|
printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* Reset the controller.
|
|
*/
|
|
static void i8042_controller_reset(void)
|
|
{
|
|
/*
|
|
* Reset the controller if requested.
|
|
*/
|
|
|
|
i8042_ctl_test();
|
|
|
|
/*
|
|
* Disable MUX mode if present.
|
|
*/
|
|
|
|
if (i8042_mux_present)
|
|
i8042_set_mux_mode(0, NULL);
|
|
|
|
/*
|
|
* Restore the original control register setting.
|
|
*/
|
|
|
|
i8042_ctr = i8042_initial_ctr;
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
|
|
printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
|
|
}
|
|
|
|
|
|
/*
|
|
* Here we try to reset everything back to a state in which the BIOS will be
|
|
* able to talk to the hardware when rebooting.
|
|
*/
|
|
|
|
static void i8042_controller_cleanup(void)
|
|
{
|
|
int i;
|
|
|
|
i8042_flush();
|
|
|
|
/*
|
|
* Reset anything that is connected to the ports.
|
|
*/
|
|
|
|
for (i = 0; i < I8042_NUM_PORTS; i++)
|
|
if (i8042_ports[i].exists)
|
|
serio_cleanup(i8042_ports[i].serio);
|
|
|
|
i8042_controller_reset();
|
|
}
|
|
|
|
|
|
/*
|
|
* i8042_panic_blink() will flash the keyboard LEDs and is called when
|
|
* kernel panics. Flashing LEDs is useful for users running X who may
|
|
* not see the console and will help distingushing panics from "real"
|
|
* lockups.
|
|
*
|
|
* Note that DELAY has a limit of 10ms so we will not get stuck here
|
|
* waiting for KBC to free up even if KBD interrupt is off
|
|
*/
|
|
|
|
#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
|
|
|
|
static long i8042_panic_blink(long count)
|
|
{
|
|
long delay = 0;
|
|
static long last_blink;
|
|
static char led;
|
|
|
|
/*
|
|
* We expect frequency to be about 1/2s. KDB uses about 1s.
|
|
* Make sure they are different.
|
|
*/
|
|
if (!i8042_blink_frequency)
|
|
return 0;
|
|
if (count - last_blink < i8042_blink_frequency)
|
|
return 0;
|
|
|
|
led ^= 0x01 | 0x04;
|
|
while (i8042_read_status() & I8042_STR_IBF)
|
|
DELAY;
|
|
i8042_write_data(0xed); /* set leds */
|
|
DELAY;
|
|
while (i8042_read_status() & I8042_STR_IBF)
|
|
DELAY;
|
|
DELAY;
|
|
i8042_write_data(led);
|
|
DELAY;
|
|
last_blink = count;
|
|
return delay;
|
|
}
|
|
|
|
#undef DELAY
|
|
|
|
/*
|
|
* Here we try to restore the original BIOS settings
|
|
*/
|
|
|
|
static int i8042_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
del_timer_sync(&i8042_timer);
|
|
i8042_controller_reset();
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* Here we try to reset everything back to a state in which suspended
|
|
*/
|
|
|
|
static int i8042_resume(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
if (i8042_ctl_test())
|
|
return -1;
|
|
|
|
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
|
|
printk(KERN_ERR "i8042: Can't write CTR\n");
|
|
return -1;
|
|
}
|
|
|
|
if (i8042_mux_present)
|
|
if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
|
|
printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
|
|
|
|
/*
|
|
* Activate all ports.
|
|
*/
|
|
|
|
for (i = 0; i < I8042_NUM_PORTS; i++)
|
|
i8042_activate_port(&i8042_ports[i]);
|
|
|
|
/*
|
|
* Restart timer (for polling "stuck" data)
|
|
*/
|
|
mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
|
|
|
|
panic_blink = i8042_panic_blink;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* We need to reset the 8042 back to original mode on system shutdown,
|
|
* because otherwise BIOSes will be confused.
|
|
*/
|
|
|
|
static void i8042_shutdown(struct platform_device *dev)
|
|
{
|
|
i8042_controller_cleanup();
|
|
}
|
|
|
|
static int __devinit i8042_create_kbd_port(void)
|
|
{
|
|
struct serio *serio;
|
|
struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
|
|
|
|
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
|
|
if (!serio)
|
|
return -ENOMEM;
|
|
|
|
serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
|
|
serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
|
|
serio->open = i8042_open;
|
|
serio->close = i8042_close;
|
|
serio->start = i8042_start;
|
|
serio->stop = i8042_stop;
|
|
serio->port_data = port;
|
|
serio->dev.parent = &i8042_platform_device->dev;
|
|
strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
|
|
strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
|
|
|
|
port->serio = serio;
|
|
|
|
return i8042_port_register(port);
|
|
}
|
|
|
|
static int __devinit i8042_create_aux_port(void)
|
|
{
|
|
struct serio *serio;
|
|
struct i8042_port *port = &i8042_ports[I8042_AUX_PORT_NO];
|
|
|
|
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
|
|
if (!serio)
|
|
return -ENOMEM;
|
|
|
|
serio->id.type = SERIO_8042;
|
|
serio->write = i8042_aux_write;
|
|
serio->open = i8042_open;
|
|
serio->close = i8042_close;
|
|
serio->start = i8042_start;
|
|
serio->stop = i8042_stop;
|
|
serio->port_data = port;
|
|
serio->dev.parent = &i8042_platform_device->dev;
|
|
strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
|
|
strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
|
|
|
|
port->serio = serio;
|
|
|
|
return i8042_port_register(port);
|
|
}
|
|
|
|
static int __devinit i8042_create_mux_port(int index)
|
|
{
|
|
struct serio *serio;
|
|
struct i8042_port *port = &i8042_ports[I8042_MUX_PORT_NO + index];
|
|
|
|
serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
|
|
if (!serio)
|
|
return -ENOMEM;
|
|
|
|
serio->id.type = SERIO_8042;
|
|
serio->write = i8042_aux_write;
|
|
serio->open = i8042_open;
|
|
serio->close = i8042_close;
|
|
serio->start = i8042_start;
|
|
serio->stop = i8042_stop;
|
|
serio->port_data = port;
|
|
serio->dev.parent = &i8042_platform_device->dev;
|
|
snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
|
|
snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
|
|
|
|
*port = i8042_ports[I8042_AUX_PORT_NO];
|
|
port->exists = 0;
|
|
snprintf(port->name, sizeof(port->name), "AUX%d", index);
|
|
port->mux = index;
|
|
port->serio = serio;
|
|
|
|
return i8042_port_register(port);
|
|
}
|
|
|
|
static int __devinit i8042_probe(struct platform_device *dev)
|
|
{
|
|
int i, have_ports = 0;
|
|
int err;
|
|
|
|
init_timer(&i8042_timer);
|
|
i8042_timer.function = i8042_timer_func;
|
|
|
|
if (i8042_controller_init())
|
|
return -ENODEV;
|
|
|
|
if (!i8042_noaux && !i8042_check_aux()) {
|
|
if (!i8042_nomux && !i8042_check_mux()) {
|
|
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
|
|
err = i8042_create_mux_port(i);
|
|
if (err)
|
|
goto err_unregister_ports;
|
|
}
|
|
} else {
|
|
err = i8042_create_aux_port();
|
|
if (err)
|
|
goto err_unregister_ports;
|
|
}
|
|
have_ports = 1;
|
|
}
|
|
|
|
if (!i8042_nokbd) {
|
|
err = i8042_create_kbd_port();
|
|
if (err)
|
|
goto err_unregister_ports;
|
|
have_ports = 1;
|
|
}
|
|
|
|
if (!have_ports) {
|
|
err = -ENODEV;
|
|
goto err_controller_cleanup;
|
|
}
|
|
|
|
mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
|
|
return 0;
|
|
|
|
err_unregister_ports:
|
|
for (i = 0; i < I8042_NUM_PORTS; i++)
|
|
if (i8042_ports[i].serio)
|
|
serio_unregister_port(i8042_ports[i].serio);
|
|
err_controller_cleanup:
|
|
i8042_controller_cleanup();
|
|
|
|
return err;
|
|
}
|
|
|
|
static int __devexit i8042_remove(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
i8042_controller_cleanup();
|
|
|
|
for (i = 0; i < I8042_NUM_PORTS; i++)
|
|
if (i8042_ports[i].exists)
|
|
serio_unregister_port(i8042_ports[i].serio);
|
|
|
|
del_timer_sync(&i8042_timer);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver i8042_driver = {
|
|
.driver = {
|
|
.name = "i8042",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = i8042_probe,
|
|
.remove = __devexit_p(i8042_remove),
|
|
.suspend = i8042_suspend,
|
|
.resume = i8042_resume,
|
|
.shutdown = i8042_shutdown,
|
|
};
|
|
|
|
static int __init i8042_init(void)
|
|
{
|
|
int err;
|
|
|
|
dbg_init();
|
|
|
|
err = i8042_platform_init();
|
|
if (err)
|
|
return err;
|
|
|
|
i8042_ports[I8042_AUX_PORT_NO].irq = I8042_AUX_IRQ;
|
|
i8042_ports[I8042_KBD_PORT_NO].irq = I8042_KBD_IRQ;
|
|
|
|
err = platform_driver_register(&i8042_driver);
|
|
if (err)
|
|
goto err_platform_exit;
|
|
|
|
i8042_platform_device = platform_device_alloc("i8042", -1);
|
|
if (!i8042_platform_device) {
|
|
err = -ENOMEM;
|
|
goto err_unregister_driver;
|
|
}
|
|
|
|
err = platform_device_add(i8042_platform_device);
|
|
if (err)
|
|
goto err_free_device;
|
|
|
|
return 0;
|
|
|
|
err_free_device:
|
|
platform_device_put(i8042_platform_device);
|
|
err_unregister_driver:
|
|
platform_driver_unregister(&i8042_driver);
|
|
err_platform_exit:
|
|
i8042_platform_exit();
|
|
|
|
return err;
|
|
}
|
|
|
|
static void __exit i8042_exit(void)
|
|
{
|
|
platform_device_unregister(i8042_platform_device);
|
|
platform_driver_unregister(&i8042_driver);
|
|
|
|
i8042_platform_exit();
|
|
|
|
panic_blink = NULL;
|
|
}
|
|
|
|
module_init(i8042_init);
|
|
module_exit(i8042_exit);
|