125 lines
2.5 KiB
Plaintext
125 lines
2.5 KiB
Plaintext
/*
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* Copyright 2013 Armadeus Systems - <support@armadeus.com>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/* APF51Dev is a docking board for the APF51 SOM */
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#include "imx51-apf51.dts"
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/ {
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model = "Armadeus Systems APF51Dev docking/development board";
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compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
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display@di1 {
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compatible = "fsl,imx-parallel-display";
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crtcs = <&ipu 0>;
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interface-pix-fmt = "bgr666";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp1_1>;
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display-timings {
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lw700 {
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native-mode;
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clock-frequency = <33000033>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <96>;
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hfront-porch = <96>;
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vback-porch = <20>;
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vfront-porch = <21>;
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hsync-len = <64>;
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vsync-len = <4>;
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hsync-active = <1>;
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vsync-active = <1>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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user-key {
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label = "user";
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gpios = <&gpio1 3 0>;
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linux,code = <256>; /* BTN_0 */
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};
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};
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leds {
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compatible = "gpio-leds";
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user {
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label = "Heartbeat";
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gpios = <&gpio1 2 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1_1>;
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
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status = "okay";
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2_1>;
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio3 28 1>, <&gpio3 27 1>;
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1_1>;
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cd-gpios = <&gpio2 29 0>;
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bus-width = <4>;
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status = "okay";
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};
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&esdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc2_1>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_2>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
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MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
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MX51_PAD_EIM_CS4__GPIO2_29 0x100
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MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
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MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
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MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
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MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
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MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
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MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
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>;
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};
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};
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};
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