795 lines
28 KiB
C
795 lines
28 KiB
C
/*
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __LINUX_SPI_H
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#define __LINUX_SPI_H
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#include <linux/device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/slab.h>
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/*
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* INTERFACES between SPI master-side drivers and SPI infrastructure.
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* (There's no SPI slave support for Linux yet...)
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*/
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extern struct bus_type spi_bus_type;
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/**
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* struct spi_device - Master side proxy for an SPI slave device
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* @dev: Driver model representation of the device.
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* @master: SPI controller used with the device.
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* @max_speed_hz: Maximum clock rate to be used with this chip
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* (on this board); may be changed by the device's driver.
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* The spi_transfer.speed_hz can override this for each transfer.
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* @chip_select: Chipselect, distinguishing chips handled by @master.
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* @mode: The spi mode defines how data is clocked out and in.
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* This may be changed by the device's driver.
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* The "active low" default for chipselect mode can be overridden
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* (by specifying SPI_CS_HIGH) as can the "MSB first" default for
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* each word in a transfer (by specifying SPI_LSB_FIRST).
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* @bits_per_word: Data transfers involve one or more words; word sizes
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* like eight or 12 bits are common. In-memory wordsizes are
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* powers of two bytes (e.g. 20 bit samples use 32 bits).
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* This may be changed by the device's driver, or left at the
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* default (0) indicating protocol words are eight bit bytes.
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* The spi_transfer.bits_per_word can override this for each transfer.
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* @irq: Negative, or the number passed to request_irq() to receive
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* interrupts from this device.
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* @controller_state: Controller's runtime state
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* @controller_data: Board-specific definitions for controller, such as
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* FIFO initialization parameters; from board_info.controller_data
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* @modalias: Name of the driver to use with this device, or an alias
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* for that name. This appears in the sysfs "modalias" attribute
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* for driver coldplugging, and in uevents used for hotplugging
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*
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* A @spi_device is used to interchange data between an SPI slave
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* (usually a discrete chip) and CPU memory.
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*
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* In @dev, the platform_data is used to hold information about this
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* device that's meaningful to the device's protocol driver, but not
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* to its controller. One example might be an identifier for a chip
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* variant with slightly different functionality; another might be
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* information about how this particular board wires the chip's pins.
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*/
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struct spi_device {
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struct device dev;
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struct spi_master *master;
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u32 max_speed_hz;
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u8 chip_select;
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u8 mode;
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#define SPI_CPHA 0x01 /* clock phase */
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#define SPI_CPOL 0x02 /* clock polarity */
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#define SPI_MODE_0 (0|0) /* (original MicroWire) */
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#define SPI_MODE_1 (0|SPI_CPHA)
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#define SPI_MODE_2 (SPI_CPOL|0)
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#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
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#define SPI_CS_HIGH 0x04 /* chipselect active high? */
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#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
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#define SPI_3WIRE 0x10 /* SI/SO signals shared */
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#define SPI_LOOP 0x20 /* loopback mode */
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#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
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#define SPI_READY 0x80 /* slave pulls low to pause */
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u8 bits_per_word;
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int irq;
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void *controller_state;
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void *controller_data;
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char modalias[SPI_NAME_SIZE];
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/*
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* likely need more hooks for more protocol options affecting how
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* the controller talks to each chip, like:
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* - memory packing (12 bit samples into low bits, others zeroed)
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* - priority
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* - drop chipselect after each word
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* - chipselect delays
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* - ...
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*/
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};
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static inline struct spi_device *to_spi_device(struct device *dev)
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{
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return dev ? container_of(dev, struct spi_device, dev) : NULL;
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}
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/* most drivers won't need to care about device refcounting */
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static inline struct spi_device *spi_dev_get(struct spi_device *spi)
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{
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return (spi && get_device(&spi->dev)) ? spi : NULL;
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}
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static inline void spi_dev_put(struct spi_device *spi)
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{
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if (spi)
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put_device(&spi->dev);
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}
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/* ctldata is for the bus_master driver's runtime state */
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static inline void *spi_get_ctldata(struct spi_device *spi)
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{
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return spi->controller_state;
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}
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static inline void spi_set_ctldata(struct spi_device *spi, void *state)
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{
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spi->controller_state = state;
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}
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/* device driver data */
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static inline void spi_set_drvdata(struct spi_device *spi, void *data)
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{
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dev_set_drvdata(&spi->dev, data);
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}
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static inline void *spi_get_drvdata(struct spi_device *spi)
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{
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return dev_get_drvdata(&spi->dev);
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}
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struct spi_message;
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/**
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* struct spi_driver - Host side "protocol" driver
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* @id_table: List of SPI devices supported by this driver
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* @probe: Binds this driver to the spi device. Drivers can verify
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* that the device is actually present, and may need to configure
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* characteristics (such as bits_per_word) which weren't needed for
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* the initial configuration done during system setup.
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* @remove: Unbinds this driver from the spi device
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* @shutdown: Standard shutdown callback used during system state
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* transitions such as powerdown/halt and kexec
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* @suspend: Standard suspend callback used during system state transitions
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* @resume: Standard resume callback used during system state transitions
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* @driver: SPI device drivers should initialize the name and owner
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* field of this structure.
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*
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* This represents the kind of device driver that uses SPI messages to
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* interact with the hardware at the other end of a SPI link. It's called
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* a "protocol" driver because it works through messages rather than talking
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* directly to SPI hardware (which is what the underlying SPI controller
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* driver does to pass those messages). These protocols are defined in the
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* specification for the device(s) supported by the driver.
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*
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* As a rule, those device protocols represent the lowest level interface
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* supported by a driver, and it will support upper level interfaces too.
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* Examples of such upper levels include frameworks like MTD, networking,
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* MMC, RTC, filesystem character device nodes, and hardware monitoring.
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*/
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struct spi_driver {
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const struct spi_device_id *id_table;
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int (*probe)(struct spi_device *spi);
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int (*remove)(struct spi_device *spi);
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void (*shutdown)(struct spi_device *spi);
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int (*suspend)(struct spi_device *spi, pm_message_t mesg);
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int (*resume)(struct spi_device *spi);
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struct device_driver driver;
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};
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static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
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{
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return drv ? container_of(drv, struct spi_driver, driver) : NULL;
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}
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extern int spi_register_driver(struct spi_driver *sdrv);
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/**
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* spi_unregister_driver - reverse effect of spi_register_driver
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* @sdrv: the driver to unregister
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* Context: can sleep
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*/
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static inline void spi_unregister_driver(struct spi_driver *sdrv)
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{
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if (sdrv)
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driver_unregister(&sdrv->driver);
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}
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/**
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* struct spi_master - interface to SPI master controller
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* @dev: device interface to this driver
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* @bus_num: board-specific (and often SOC-specific) identifier for a
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* given SPI controller.
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* @num_chipselect: chipselects are used to distinguish individual
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* SPI slaves, and are numbered from zero to num_chipselects.
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* each slave has a chipselect signal, but it's common that not
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* every chipselect is connected to a slave.
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* @dma_alignment: SPI controller constraint on DMA buffers alignment.
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* @mode_bits: flags understood by this controller driver
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* @flags: other constraints relevant to this driver
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* @bus_lock_spinlock: spinlock for SPI bus locking
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* @bus_lock_mutex: mutex for SPI bus locking
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* @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
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* @setup: updates the device mode and clocking records used by a
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* device's SPI controller; protocol code may call this. This
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* must fail if an unrecognized or unsupported mode is requested.
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* It's always safe to call this unless transfers are pending on
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* the device whose settings are being modified.
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* @transfer: adds a message to the controller's transfer queue.
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* @cleanup: frees controller-specific state
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*
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* Each SPI master controller can communicate with one or more @spi_device
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* children. These make a small bus, sharing MOSI, MISO and SCK signals
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* but not chip select signals. Each device may be configured to use a
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* different clock rate, since those shared signals are ignored unless
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* the chip is selected.
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*
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* The driver for an SPI controller manages access to those devices through
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* a queue of spi_message transactions, copying data between CPU memory and
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* an SPI slave device. For each such message it queues, it calls the
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* message's completion function when the transaction completes.
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*/
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struct spi_master {
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struct device dev;
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/* other than negative (== assign one dynamically), bus_num is fully
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* board-specific. usually that simplifies to being SOC-specific.
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* example: one SOC has three SPI controllers, numbered 0..2,
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* and one board's schematics might show it using SPI-2. software
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* would normally use bus_num=2 for that controller.
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*/
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s16 bus_num;
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/* chipselects will be integral to many controllers; some others
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* might use board-specific GPIOs.
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*/
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u16 num_chipselect;
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/* some SPI controllers pose alignment requirements on DMAable
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* buffers; let protocol drivers know about these requirements.
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*/
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u16 dma_alignment;
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/* spi_device.mode flags understood by this controller driver */
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u16 mode_bits;
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/* other constraints relevant to this driver */
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u16 flags;
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#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
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#define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
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#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
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/* lock and mutex for SPI bus locking */
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spinlock_t bus_lock_spinlock;
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struct mutex bus_lock_mutex;
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/* flag indicating that the SPI bus is locked for exclusive use */
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bool bus_lock_flag;
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/* Setup mode and clock, etc (spi driver may call many times).
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*
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* IMPORTANT: this may be called when transfers to another
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* device are active. DO NOT UPDATE SHARED REGISTERS in ways
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* which could break those transfers.
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*/
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int (*setup)(struct spi_device *spi);
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/* bidirectional bulk transfers
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*
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* + The transfer() method may not sleep; its main role is
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* just to add the message to the queue.
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* + For now there's no remove-from-queue operation, or
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* any other request management
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* + To a given spi_device, message queueing is pure fifo
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*
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* + The master's main job is to process its message queue,
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* selecting a chip then transferring data
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* + If there are multiple spi_device children, the i/o queue
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* arbitration algorithm is unspecified (round robin, fifo,
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* priority, reservations, preemption, etc)
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*
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* + Chipselect stays active during the entire message
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* (unless modified by spi_transfer.cs_change != 0).
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* + The message transfers use clock and SPI mode parameters
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* previously established by setup() for this device
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*/
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int (*transfer)(struct spi_device *spi,
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struct spi_message *mesg);
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/* called on release() to free memory provided by spi_master */
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void (*cleanup)(struct spi_device *spi);
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};
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static inline void *spi_master_get_devdata(struct spi_master *master)
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{
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return dev_get_drvdata(&master->dev);
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}
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static inline void spi_master_set_devdata(struct spi_master *master, void *data)
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{
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dev_set_drvdata(&master->dev, data);
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}
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static inline struct spi_master *spi_master_get(struct spi_master *master)
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{
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if (!master || !get_device(&master->dev))
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return NULL;
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return master;
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}
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static inline void spi_master_put(struct spi_master *master)
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{
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if (master)
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put_device(&master->dev);
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}
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/* the spi driver core manages memory for the spi_master classdev */
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extern struct spi_master *
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spi_alloc_master(struct device *host, unsigned size);
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extern int spi_register_master(struct spi_master *master);
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extern void spi_unregister_master(struct spi_master *master);
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extern struct spi_master *spi_busnum_to_master(u16 busnum);
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/*---------------------------------------------------------------------------*/
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/*
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* I/O INTERFACE between SPI controller and protocol drivers
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*
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* Protocol drivers use a queue of spi_messages, each transferring data
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* between the controller and memory buffers.
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*
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* The spi_messages themselves consist of a series of read+write transfer
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* segments. Those segments always read the same number of bits as they
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* write; but one or the other is easily ignored by passing a null buffer
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* pointer. (This is unlike most types of I/O API, because SPI hardware
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* is full duplex.)
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*
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* NOTE: Allocation of spi_transfer and spi_message memory is entirely
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* up to the protocol driver, which guarantees the integrity of both (as
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* well as the data buffers) for as long as the message is queued.
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*/
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/**
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* struct spi_transfer - a read/write buffer pair
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* @tx_buf: data to be written (dma-safe memory), or NULL
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* @rx_buf: data to be read (dma-safe memory), or NULL
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* @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
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* @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
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* @len: size of rx and tx buffers (in bytes)
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* @speed_hz: Select a speed other than the device default for this
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* transfer. If 0 the default (from @spi_device) is used.
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* @bits_per_word: select a bits_per_word other than the device default
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* for this transfer. If 0 the default (from @spi_device) is used.
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* @cs_change: affects chipselect after this transfer completes
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* @delay_usecs: microseconds to delay after this transfer before
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* (optionally) changing the chipselect status, then starting
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* the next transfer or completing this @spi_message.
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* @transfer_list: transfers are sequenced through @spi_message.transfers
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*
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* SPI transfers always write the same number of bytes as they read.
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* Protocol drivers should always provide @rx_buf and/or @tx_buf.
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* In some cases, they may also want to provide DMA addresses for
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* the data being transferred; that may reduce overhead, when the
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* underlying driver uses dma.
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*
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* If the transmit buffer is null, zeroes will be shifted out
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* while filling @rx_buf. If the receive buffer is null, the data
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* shifted in will be discarded. Only "len" bytes shift out (or in).
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* It's an error to try to shift out a partial word. (For example, by
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* shifting out three bytes with word size of sixteen or twenty bits;
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* the former uses two bytes per word, the latter uses four bytes.)
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*
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* In-memory data values are always in native CPU byte order, translated
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* from the wire byte order (big-endian except with SPI_LSB_FIRST). So
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* for example when bits_per_word is sixteen, buffers are 2N bytes long
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* (@len = 2N) and hold N sixteen bit words in CPU byte order.
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*
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* When the word size of the SPI transfer is not a power-of-two multiple
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* of eight bits, those in-memory words include extra bits. In-memory
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* words are always seen by protocol drivers as right-justified, so the
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* undefined (rx) or unused (tx) bits are always the most significant bits.
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*
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* All SPI transfers start with the relevant chipselect active. Normally
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* it stays selected until after the last transfer in a message. Drivers
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* can affect the chipselect signal using cs_change.
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*
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* (i) If the transfer isn't the last one in the message, this flag is
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* used to make the chipselect briefly go inactive in the middle of the
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* message. Toggling chipselect in this way may be needed to terminate
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* a chip command, letting a single spi_message perform all of group of
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* chip transactions together.
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*
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* (ii) When the transfer is the last one in the message, the chip may
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* stay selected until the next transfer. On multi-device SPI busses
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* with nothing blocking messages going to other devices, this is just
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* a performance hint; starting a message to another device deselects
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* this one. But in other cases, this can be used to ensure correctness.
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* Some devices need protocol transactions to be built from a series of
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* spi_message submissions, where the content of one message is determined
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* by the results of previous messages and where the whole transaction
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* ends when the chipselect goes intactive.
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*
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* The code that submits an spi_message (and its spi_transfers)
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* to the lower layers is responsible for managing its memory.
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* Zero-initialize every field you don't set up explicitly, to
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* insulate against future API updates. After you submit a message
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* and its transfers, ignore them until its completion callback.
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*/
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struct spi_transfer {
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/* it's ok if tx_buf == rx_buf (right?)
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* for MicroWire, one buffer must be null
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* buffers must work with dma_*map_single() calls, unless
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* spi_message.is_dma_mapped reports a pre-existing mapping
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*/
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const void *tx_buf;
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void *rx_buf;
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unsigned len;
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dma_addr_t tx_dma;
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dma_addr_t rx_dma;
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unsigned cs_change:1;
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u8 bits_per_word;
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u16 delay_usecs;
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u32 speed_hz;
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struct list_head transfer_list;
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};
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/**
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* struct spi_message - one multi-segment SPI transaction
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* @transfers: list of transfer segments in this transaction
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* @spi: SPI device to which the transaction is queued
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* @is_dma_mapped: if true, the caller provided both dma and cpu virtual
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* addresses for each transfer buffer
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* @complete: called to report transaction completions
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* @context: the argument to complete() when it's called
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* @actual_length: the total number of bytes that were transferred in all
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* successful segments
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* @status: zero for success, else negative errno
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* @queue: for use by whichever driver currently owns the message
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* @state: for use by whichever driver currently owns the message
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*
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* A @spi_message is used to execute an atomic sequence of data transfers,
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* each represented by a struct spi_transfer. The sequence is "atomic"
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* in the sense that no other spi_message may use that SPI bus until that
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* sequence completes. On some systems, many such sequences can execute as
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* as single programmed DMA transfer. On all systems, these messages are
|
|
* queued, and might complete after transactions to other devices. Messages
|
|
* sent to a given spi_device are alway executed in FIFO order.
|
|
*
|
|
* The code that submits an spi_message (and its spi_transfers)
|
|
* to the lower layers is responsible for managing its memory.
|
|
* Zero-initialize every field you don't set up explicitly, to
|
|
* insulate against future API updates. After you submit a message
|
|
* and its transfers, ignore them until its completion callback.
|
|
*/
|
|
struct spi_message {
|
|
struct list_head transfers;
|
|
|
|
struct spi_device *spi;
|
|
|
|
unsigned is_dma_mapped:1;
|
|
|
|
/* REVISIT: we might want a flag affecting the behavior of the
|
|
* last transfer ... allowing things like "read 16 bit length L"
|
|
* immediately followed by "read L bytes". Basically imposing
|
|
* a specific message scheduling algorithm.
|
|
*
|
|
* Some controller drivers (message-at-a-time queue processing)
|
|
* could provide that as their default scheduling algorithm. But
|
|
* others (with multi-message pipelines) could need a flag to
|
|
* tell them about such special cases.
|
|
*/
|
|
|
|
/* completion is reported through a callback */
|
|
void (*complete)(void *context);
|
|
void *context;
|
|
unsigned actual_length;
|
|
int status;
|
|
|
|
/* for optional use by whatever driver currently owns the
|
|
* spi_message ... between calls to spi_async and then later
|
|
* complete(), that's the spi_master controller driver.
|
|
*/
|
|
struct list_head queue;
|
|
void *state;
|
|
};
|
|
|
|
static inline void spi_message_init(struct spi_message *m)
|
|
{
|
|
memset(m, 0, sizeof *m);
|
|
INIT_LIST_HEAD(&m->transfers);
|
|
}
|
|
|
|
static inline void
|
|
spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
|
|
{
|
|
list_add_tail(&t->transfer_list, &m->transfers);
|
|
}
|
|
|
|
static inline void
|
|
spi_transfer_del(struct spi_transfer *t)
|
|
{
|
|
list_del(&t->transfer_list);
|
|
}
|
|
|
|
/* It's fine to embed message and transaction structures in other data
|
|
* structures so long as you don't free them while they're in use.
|
|
*/
|
|
|
|
static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
|
|
{
|
|
struct spi_message *m;
|
|
|
|
m = kzalloc(sizeof(struct spi_message)
|
|
+ ntrans * sizeof(struct spi_transfer),
|
|
flags);
|
|
if (m) {
|
|
int i;
|
|
struct spi_transfer *t = (struct spi_transfer *)(m + 1);
|
|
|
|
INIT_LIST_HEAD(&m->transfers);
|
|
for (i = 0; i < ntrans; i++, t++)
|
|
spi_message_add_tail(t, m);
|
|
}
|
|
return m;
|
|
}
|
|
|
|
static inline void spi_message_free(struct spi_message *m)
|
|
{
|
|
kfree(m);
|
|
}
|
|
|
|
extern int spi_setup(struct spi_device *spi);
|
|
extern int spi_async(struct spi_device *spi, struct spi_message *message);
|
|
extern int spi_async_locked(struct spi_device *spi,
|
|
struct spi_message *message);
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
/* All these synchronous SPI transfer routines are utilities layered
|
|
* over the core async transfer primitive. Here, "synchronous" means
|
|
* they will sleep uninterruptibly until the async transfer completes.
|
|
*/
|
|
|
|
extern int spi_sync(struct spi_device *spi, struct spi_message *message);
|
|
extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
|
|
extern int spi_bus_lock(struct spi_master *master);
|
|
extern int spi_bus_unlock(struct spi_master *master);
|
|
|
|
/**
|
|
* spi_write - SPI synchronous write
|
|
* @spi: device to which data will be written
|
|
* @buf: data buffer
|
|
* @len: data buffer size
|
|
* Context: can sleep
|
|
*
|
|
* This writes the buffer and returns zero or a negative error code.
|
|
* Callable only from contexts that can sleep.
|
|
*/
|
|
static inline int
|
|
spi_write(struct spi_device *spi, const u8 *buf, size_t len)
|
|
{
|
|
struct spi_transfer t = {
|
|
.tx_buf = buf,
|
|
.len = len,
|
|
};
|
|
struct spi_message m;
|
|
|
|
spi_message_init(&m);
|
|
spi_message_add_tail(&t, &m);
|
|
return spi_sync(spi, &m);
|
|
}
|
|
|
|
/**
|
|
* spi_read - SPI synchronous read
|
|
* @spi: device from which data will be read
|
|
* @buf: data buffer
|
|
* @len: data buffer size
|
|
* Context: can sleep
|
|
*
|
|
* This reads the buffer and returns zero or a negative error code.
|
|
* Callable only from contexts that can sleep.
|
|
*/
|
|
static inline int
|
|
spi_read(struct spi_device *spi, u8 *buf, size_t len)
|
|
{
|
|
struct spi_transfer t = {
|
|
.rx_buf = buf,
|
|
.len = len,
|
|
};
|
|
struct spi_message m;
|
|
|
|
spi_message_init(&m);
|
|
spi_message_add_tail(&t, &m);
|
|
return spi_sync(spi, &m);
|
|
}
|
|
|
|
/* this copies txbuf and rxbuf data; for small transfers only! */
|
|
extern int spi_write_then_read(struct spi_device *spi,
|
|
const u8 *txbuf, unsigned n_tx,
|
|
u8 *rxbuf, unsigned n_rx);
|
|
|
|
/**
|
|
* spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
|
|
* @spi: device with which data will be exchanged
|
|
* @cmd: command to be written before data is read back
|
|
* Context: can sleep
|
|
*
|
|
* This returns the (unsigned) eight bit number returned by the
|
|
* device, or else a negative error code. Callable only from
|
|
* contexts that can sleep.
|
|
*/
|
|
static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
|
|
{
|
|
ssize_t status;
|
|
u8 result;
|
|
|
|
status = spi_write_then_read(spi, &cmd, 1, &result, 1);
|
|
|
|
/* return negative errno or unsigned value */
|
|
return (status < 0) ? status : result;
|
|
}
|
|
|
|
/**
|
|
* spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
|
|
* @spi: device with which data will be exchanged
|
|
* @cmd: command to be written before data is read back
|
|
* Context: can sleep
|
|
*
|
|
* This returns the (unsigned) sixteen bit number returned by the
|
|
* device, or else a negative error code. Callable only from
|
|
* contexts that can sleep.
|
|
*
|
|
* The number is returned in wire-order, which is at least sometimes
|
|
* big-endian.
|
|
*/
|
|
static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
|
|
{
|
|
ssize_t status;
|
|
u16 result;
|
|
|
|
status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
|
|
|
|
/* return negative errno or unsigned value */
|
|
return (status < 0) ? status : result;
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
/*
|
|
* INTERFACE between board init code and SPI infrastructure.
|
|
*
|
|
* No SPI driver ever sees these SPI device table segments, but
|
|
* it's how the SPI core (or adapters that get hotplugged) grows
|
|
* the driver model tree.
|
|
*
|
|
* As a rule, SPI devices can't be probed. Instead, board init code
|
|
* provides a table listing the devices which are present, with enough
|
|
* information to bind and set up the device's driver. There's basic
|
|
* support for nonstatic configurations too; enough to handle adding
|
|
* parport adapters, or microcontrollers acting as USB-to-SPI bridges.
|
|
*/
|
|
|
|
/**
|
|
* struct spi_board_info - board-specific template for a SPI device
|
|
* @modalias: Initializes spi_device.modalias; identifies the driver.
|
|
* @platform_data: Initializes spi_device.platform_data; the particular
|
|
* data stored there is driver-specific.
|
|
* @controller_data: Initializes spi_device.controller_data; some
|
|
* controllers need hints about hardware setup, e.g. for DMA.
|
|
* @irq: Initializes spi_device.irq; depends on how the board is wired.
|
|
* @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
|
|
* from the chip datasheet and board-specific signal quality issues.
|
|
* @bus_num: Identifies which spi_master parents the spi_device; unused
|
|
* by spi_new_device(), and otherwise depends on board wiring.
|
|
* @chip_select: Initializes spi_device.chip_select; depends on how
|
|
* the board is wired.
|
|
* @mode: Initializes spi_device.mode; based on the chip datasheet, board
|
|
* wiring (some devices support both 3WIRE and standard modes), and
|
|
* possibly presence of an inverter in the chipselect path.
|
|
*
|
|
* When adding new SPI devices to the device tree, these structures serve
|
|
* as a partial device template. They hold information which can't always
|
|
* be determined by drivers. Information that probe() can establish (such
|
|
* as the default transfer wordsize) is not included here.
|
|
*
|
|
* These structures are used in two places. Their primary role is to
|
|
* be stored in tables of board-specific device descriptors, which are
|
|
* declared early in board initialization and then used (much later) to
|
|
* populate a controller's device tree after the that controller's driver
|
|
* initializes. A secondary (and atypical) role is as a parameter to
|
|
* spi_new_device() call, which happens after those controller drivers
|
|
* are active in some dynamic board configuration models.
|
|
*/
|
|
struct spi_board_info {
|
|
/* the device name and module name are coupled, like platform_bus;
|
|
* "modalias" is normally the driver name.
|
|
*
|
|
* platform_data goes to spi_device.dev.platform_data,
|
|
* controller_data goes to spi_device.controller_data,
|
|
* irq is copied too
|
|
*/
|
|
char modalias[SPI_NAME_SIZE];
|
|
const void *platform_data;
|
|
void *controller_data;
|
|
int irq;
|
|
|
|
/* slower signaling on noisy or low voltage boards */
|
|
u32 max_speed_hz;
|
|
|
|
|
|
/* bus_num is board specific and matches the bus_num of some
|
|
* spi_master that will probably be registered later.
|
|
*
|
|
* chip_select reflects how this chip is wired to that master;
|
|
* it's less than num_chipselect.
|
|
*/
|
|
u16 bus_num;
|
|
u16 chip_select;
|
|
|
|
/* mode becomes spi_device.mode, and is essential for chips
|
|
* where the default of SPI_CS_HIGH = 0 is wrong.
|
|
*/
|
|
u8 mode;
|
|
|
|
/* ... may need additional spi_device chip config data here.
|
|
* avoid stuff protocol drivers can set; but include stuff
|
|
* needed to behave without being bound to a driver:
|
|
* - quirks like clock rate mattering when not selected
|
|
*/
|
|
};
|
|
|
|
#ifdef CONFIG_SPI
|
|
extern int
|
|
spi_register_board_info(struct spi_board_info const *info, unsigned n);
|
|
#else
|
|
/* board init code may ignore whether SPI is configured or not */
|
|
static inline int
|
|
spi_register_board_info(struct spi_board_info const *info, unsigned n)
|
|
{ return 0; }
|
|
#endif
|
|
|
|
|
|
/* If you're hotplugging an adapter with devices (parport, usb, etc)
|
|
* use spi_new_device() to describe each device. You can also call
|
|
* spi_unregister_device() to start making that device vanish, but
|
|
* normally that would be handled by spi_unregister_master().
|
|
*
|
|
* You can also use spi_alloc_device() and spi_add_device() to use a two
|
|
* stage registration sequence for each spi_device. This gives the caller
|
|
* some more control over the spi_device structure before it is registered,
|
|
* but requires that caller to initialize fields that would otherwise
|
|
* be defined using the board info.
|
|
*/
|
|
extern struct spi_device *
|
|
spi_alloc_device(struct spi_master *master);
|
|
|
|
extern int
|
|
spi_add_device(struct spi_device *spi);
|
|
|
|
extern struct spi_device *
|
|
spi_new_device(struct spi_master *, struct spi_board_info *);
|
|
|
|
static inline void
|
|
spi_unregister_device(struct spi_device *spi)
|
|
{
|
|
if (spi)
|
|
device_unregister(&spi->dev);
|
|
}
|
|
|
|
extern const struct spi_device_id *
|
|
spi_get_device_id(const struct spi_device *sdev);
|
|
|
|
#endif /* __LINUX_SPI_H */
|