181 lines
4.7 KiB
C
181 lines
4.7 KiB
C
/*
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* Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <linux/device.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/random.h>
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#include <soc/tegra/fuse.h>
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#include "fuse.h"
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#define FUSE_BEGIN 0x100
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/* Tegra30 and later */
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#define FUSE_VENDOR_CODE 0x100
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#define FUSE_FAB_CODE 0x104
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#define FUSE_LOT_CODE_0 0x108
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#define FUSE_LOT_CODE_1 0x10c
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#define FUSE_WAFER_ID 0x110
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#define FUSE_X_COORDINATE 0x114
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#define FUSE_Y_COORDINATE 0x118
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#define FUSE_HAS_REVISION_INFO BIT(0)
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#if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
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defined(CONFIG_ARCH_TEGRA_114_SOC) || \
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defined(CONFIG_ARCH_TEGRA_124_SOC) || \
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defined(CONFIG_ARCH_TEGRA_132_SOC) || \
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defined(CONFIG_ARCH_TEGRA_210_SOC) || \
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defined(CONFIG_ARCH_TEGRA_186_SOC)
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static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset)
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{
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if (WARN_ON(!fuse->base))
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return 0;
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return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
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}
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static u32 tegra30_fuse_read(struct tegra_fuse *fuse, unsigned int offset)
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{
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u32 value;
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int err;
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err = clk_prepare_enable(fuse->clk);
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if (err < 0) {
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dev_err(fuse->dev, "failed to enable FUSE clock: %d\n", err);
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return 0;
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}
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value = readl_relaxed(fuse->base + FUSE_BEGIN + offset);
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clk_disable_unprepare(fuse->clk);
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return value;
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}
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static void __init tegra30_fuse_add_randomness(void)
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{
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u32 randomness[12];
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randomness[0] = tegra_sku_info.sku_id;
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randomness[1] = tegra_read_straps();
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randomness[2] = tegra_read_chipid();
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randomness[3] = tegra_sku_info.cpu_process_id << 16;
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randomness[3] |= tegra_sku_info.soc_process_id;
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randomness[4] = tegra_sku_info.cpu_speedo_id << 16;
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randomness[4] |= tegra_sku_info.soc_speedo_id;
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randomness[5] = tegra_fuse_read_early(FUSE_VENDOR_CODE);
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randomness[6] = tegra_fuse_read_early(FUSE_FAB_CODE);
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randomness[7] = tegra_fuse_read_early(FUSE_LOT_CODE_0);
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randomness[8] = tegra_fuse_read_early(FUSE_LOT_CODE_1);
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randomness[9] = tegra_fuse_read_early(FUSE_WAFER_ID);
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randomness[10] = tegra_fuse_read_early(FUSE_X_COORDINATE);
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randomness[11] = tegra_fuse_read_early(FUSE_Y_COORDINATE);
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add_device_randomness(randomness, sizeof(randomness));
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}
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static void __init tegra30_fuse_init(struct tegra_fuse *fuse)
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{
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fuse->read_early = tegra30_fuse_read_early;
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fuse->read = tegra30_fuse_read;
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tegra_init_revision();
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if (fuse->soc->speedo_init)
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fuse->soc->speedo_init(&tegra_sku_info);
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tegra30_fuse_add_randomness();
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}
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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static const struct tegra_fuse_info tegra30_fuse_info = {
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.read = tegra30_fuse_read,
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.size = 0x2a4,
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.spare = 0x144,
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};
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const struct tegra_fuse_soc tegra30_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra30_init_speedo_data,
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.info = &tegra30_fuse_info,
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};
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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static const struct tegra_fuse_info tegra114_fuse_info = {
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.read = tegra30_fuse_read,
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.size = 0x2a0,
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.spare = 0x180,
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};
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const struct tegra_fuse_soc tegra114_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra114_init_speedo_data,
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.info = &tegra114_fuse_info,
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};
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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static const struct tegra_fuse_info tegra124_fuse_info = {
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.read = tegra30_fuse_read,
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.size = 0x300,
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.spare = 0x200,
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};
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const struct tegra_fuse_soc tegra124_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra124_init_speedo_data,
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.info = &tegra124_fuse_info,
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};
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#endif
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#if defined(CONFIG_ARCH_TEGRA_210_SOC)
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static const struct tegra_fuse_info tegra210_fuse_info = {
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.read = tegra30_fuse_read,
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.size = 0x300,
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.spare = 0x280,
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};
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const struct tegra_fuse_soc tegra210_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra210_init_speedo_data,
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.info = &tegra210_fuse_info,
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};
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#endif
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#if defined(CONFIG_ARCH_TEGRA_186_SOC)
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static const struct tegra_fuse_info tegra186_fuse_info = {
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.read = tegra30_fuse_read,
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.size = 0x300,
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.spare = 0x280,
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};
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const struct tegra_fuse_soc tegra186_fuse_soc = {
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.init = tegra30_fuse_init,
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.info = &tegra186_fuse_info,
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};
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#endif
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