533 lines
15 KiB
C
533 lines
15 KiB
C
#ifndef _ASM_IA64_IA32_PRIV_H
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#define _ASM_IA64_IA32_PRIV_H
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#include <asm/ia32.h>
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#ifdef CONFIG_IA32_SUPPORT
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#include <linux/binfmts.h>
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#include <linux/compat.h>
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#include <linux/rbtree.h>
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#include <asm/processor.h>
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/*
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* 32 bit structures for IA32 support.
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*/
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#define IA32_PAGE_SIZE (1UL << IA32_PAGE_SHIFT)
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#define IA32_PAGE_MASK (~(IA32_PAGE_SIZE - 1))
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#define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK)
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#define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */
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/*
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* partially mapped pages provide precise accounting of which 4k sub pages
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* are mapped and which ones are not, thereby improving IA-32 compatibility.
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*/
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struct ia64_partial_page {
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struct ia64_partial_page *next; /* linked list, sorted by address */
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struct rb_node pp_rb;
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/* 64K is the largest "normal" page supported by ia64 ABI. So 4K*64
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* should suffice.*/
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unsigned long bitmap;
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unsigned int base;
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};
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struct ia64_partial_page_list {
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struct ia64_partial_page *pp_head; /* list head, points to the lowest
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* addressed partial page */
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struct rb_root ppl_rb;
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struct ia64_partial_page *pp_hint; /* pp_hint->next is the last
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* accessed partial page */
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atomic_t pp_count; /* reference count */
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};
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#if PAGE_SHIFT > IA32_PAGE_SHIFT
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struct ia64_partial_page_list* ia32_init_pp_list (void);
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#else
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# define ia32_init_pp_list() 0
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#endif
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/* sigcontext.h */
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/*
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* As documented in the iBCS2 standard..
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*
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* The first part of "struct _fpstate" is just the
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* normal i387 hardware setup, the extra "status"
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* word is used to save the coprocessor status word
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* before entering the handler.
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*/
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struct _fpreg_ia32 {
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unsigned short significand[4];
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unsigned short exponent;
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};
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struct _fpxreg_ia32 {
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unsigned short significand[4];
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unsigned short exponent;
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unsigned short padding[3];
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};
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struct _xmmreg_ia32 {
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unsigned int element[4];
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};
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struct _fpstate_ia32 {
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unsigned int cw,
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sw,
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tag,
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ipoff,
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cssel,
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dataoff,
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datasel;
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struct _fpreg_ia32 _st[8];
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unsigned short status;
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unsigned short magic; /* 0xffff = regular FPU data only */
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/* FXSR FPU environment */
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unsigned int _fxsr_env[6]; /* FXSR FPU env is ignored */
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unsigned int mxcsr;
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unsigned int reserved;
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struct _fpxreg_ia32 _fxsr_st[8]; /* FXSR FPU reg data is ignored */
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struct _xmmreg_ia32 _xmm[8];
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unsigned int padding[56];
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};
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struct sigcontext_ia32 {
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unsigned short gs, __gsh;
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unsigned short fs, __fsh;
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unsigned short es, __esh;
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unsigned short ds, __dsh;
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unsigned int edi;
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unsigned int esi;
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unsigned int ebp;
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unsigned int esp;
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unsigned int ebx;
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unsigned int edx;
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unsigned int ecx;
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unsigned int eax;
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unsigned int trapno;
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unsigned int err;
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unsigned int eip;
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unsigned short cs, __csh;
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unsigned int eflags;
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unsigned int esp_at_signal;
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unsigned short ss, __ssh;
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unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
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unsigned int oldmask;
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unsigned int cr2;
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};
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/* user.h */
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/*
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* IA32 (Pentium III/4) FXSR, SSE support
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*
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* Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
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* interacting with the FXSR-format floating point environment. Floating
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* point data can be accessed in the regular format in the usual manner,
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* and both the standard and SIMD floating point data can be accessed via
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* the new ptrace requests. In either case, changes to the FPU environment
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* will be reflected in the task's state as expected.
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*/
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struct ia32_user_i387_struct {
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int cwd;
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int swd;
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int twd;
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int fip;
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int fcs;
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int foo;
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int fos;
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/* 8*10 bytes for each FP-reg = 80 bytes */
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struct _fpreg_ia32 st_space[8];
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};
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struct ia32_user_fxsr_struct {
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unsigned short cwd;
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unsigned short swd;
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unsigned short twd;
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unsigned short fop;
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int fip;
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int fcs;
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int foo;
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int fos;
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int mxcsr;
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int reserved;
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int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
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int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
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int padding[56];
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};
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/* signal.h */
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#define IA32_SET_SA_HANDLER(ka,handler,restorer) \
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((ka)->sa.sa_handler = (__sighandler_t) \
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(((unsigned long)(restorer) << 32) \
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| ((handler) & 0xffffffff)))
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#define IA32_SA_HANDLER(ka) ((unsigned long) (ka)->sa.sa_handler & 0xffffffff)
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#define IA32_SA_RESTORER(ka) ((unsigned long) (ka)->sa.sa_handler >> 32)
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#define __IA32_NR_sigreturn 119
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#define __IA32_NR_rt_sigreturn 173
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struct sigaction32 {
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unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */
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unsigned int sa_flags;
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unsigned int sa_restorer; /* Another 32 bit pointer */
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compat_sigset_t sa_mask; /* A 32 bit mask */
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};
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struct old_sigaction32 {
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unsigned int sa_handler; /* Really a pointer, but need to deal
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with 32 bits */
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compat_old_sigset_t sa_mask; /* A 32 bit mask */
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unsigned int sa_flags;
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unsigned int sa_restorer; /* Another 32 bit pointer */
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};
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typedef struct sigaltstack_ia32 {
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unsigned int ss_sp;
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int ss_flags;
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unsigned int ss_size;
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} stack_ia32_t;
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struct ucontext_ia32 {
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unsigned int uc_flags;
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unsigned int uc_link;
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stack_ia32_t uc_stack;
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struct sigcontext_ia32 uc_mcontext;
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sigset_t uc_sigmask; /* mask last for extensibility */
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};
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struct stat64 {
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unsigned long long st_dev;
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unsigned char __pad0[4];
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unsigned int __st_ino;
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unsigned int st_mode;
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unsigned int st_nlink;
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unsigned int st_uid;
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unsigned int st_gid;
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unsigned long long st_rdev;
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unsigned char __pad3[4];
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unsigned int st_size_lo;
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unsigned int st_size_hi;
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unsigned int st_blksize;
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unsigned int st_blocks; /* Number 512-byte blocks allocated. */
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unsigned int __pad4; /* future possible st_blocks high bits */
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unsigned int st_atime;
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unsigned int st_atime_nsec;
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unsigned int st_mtime;
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unsigned int st_mtime_nsec;
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unsigned int st_ctime;
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unsigned int st_ctime_nsec;
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unsigned int st_ino_lo;
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unsigned int st_ino_hi;
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};
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typedef struct compat_siginfo {
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int si_signo;
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int si_errno;
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int si_code;
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union {
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int _pad[((128/sizeof(int)) - 3)];
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/* kill() */
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struct {
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unsigned int _pid; /* sender's pid */
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unsigned int _uid; /* sender's uid */
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} _kill;
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/* POSIX.1b timers */
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struct {
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compat_timer_t _tid; /* timer id */
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int _overrun; /* overrun count */
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char _pad[sizeof(unsigned int) - sizeof(int)];
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compat_sigval_t _sigval; /* same as below */
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int _sys_private; /* not to be passed to user */
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} _timer;
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/* POSIX.1b signals */
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struct {
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unsigned int _pid; /* sender's pid */
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unsigned int _uid; /* sender's uid */
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compat_sigval_t _sigval;
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} _rt;
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/* SIGCHLD */
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struct {
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unsigned int _pid; /* which child */
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unsigned int _uid; /* sender's uid */
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int _status; /* exit code */
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compat_clock_t _utime;
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compat_clock_t _stime;
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} _sigchld;
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/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
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struct {
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unsigned int _addr; /* faulting insn/memory ref. */
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} _sigfault;
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/* SIGPOLL */
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struct {
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int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
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int _fd;
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} _sigpoll;
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} _sifields;
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} compat_siginfo_t;
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/*
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* IA-32 ELF specific definitions for IA-64.
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*/
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#define _ASM_IA64_ELF_H /* Don't include elf.h */
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#include <linux/sched.h>
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == EM_386)
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS32
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#define ELF_DATA ELFDATA2LSB
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#define ELF_ARCH EM_386
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#define IA32_STACK_TOP IA32_PAGE_OFFSET
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#define IA32_GATE_OFFSET IA32_PAGE_OFFSET
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#define IA32_GATE_END IA32_PAGE_OFFSET + PAGE_SIZE
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/*
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* The system segments (GDT, TSS, LDT) have to be mapped below 4GB so the IA-32 engine can
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* access them.
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*/
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#define IA32_GDT_OFFSET (IA32_PAGE_OFFSET + PAGE_SIZE)
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#define IA32_TSS_OFFSET (IA32_PAGE_OFFSET + 2*PAGE_SIZE)
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#define IA32_LDT_OFFSET (IA32_PAGE_OFFSET + 3*PAGE_SIZE)
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#define ELF_EXEC_PAGESIZE IA32_PAGE_SIZE
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/*
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* This is the location that an ET_DYN program is loaded if exec'ed.
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* Typical use of this is to invoke "./ld.so someprog" to test out a
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* new version of the loader. We need to make sure that it is out of
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* the way of the program that it will "exec", and that there is
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* sufficient room for the brk.
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*/
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#define ELF_ET_DYN_BASE (IA32_PAGE_OFFSET/3 + 0x1000000)
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void ia64_elf32_init(struct pt_regs *regs);
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#define ELF_PLAT_INIT(_r, load_addr) ia64_elf32_init(_r)
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/* This macro yields a bitmask that programs can use to figure out
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what instruction set this CPU supports. */
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#define ELF_HWCAP 0
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/* This macro yields a string that ld.so will use to load
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implementation specific libraries for optimization. Not terribly
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relevant until we have real hardware to play with... */
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#define ELF_PLATFORM NULL
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#ifdef __KERNEL__
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# define SET_PERSONALITY(EX) \
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(current->personality = PER_LINUX)
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#endif
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#define IA32_EFLAG 0x200
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/*
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* IA-32 ELF specific definitions for IA-64.
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*/
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#define __USER_CS 0x23
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#define __USER_DS 0x2B
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/*
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* The per-cpu GDT has 32 entries: see <asm-i386/segment.h>
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*/
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#define GDT_ENTRIES 32
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#define GDT_SIZE (GDT_ENTRIES * 8)
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#define TSS_ENTRY 14
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#define LDT_ENTRY (TSS_ENTRY + 1)
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#define IA32_SEGSEL_RPL (0x3 << 0)
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#define IA32_SEGSEL_TI (0x1 << 2)
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#define IA32_SEGSEL_INDEX_SHIFT 3
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#define _TSS ((unsigned long) TSS_ENTRY << IA32_SEGSEL_INDEX_SHIFT)
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#define _LDT ((unsigned long) LDT_ENTRY << IA32_SEGSEL_INDEX_SHIFT)
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#define IA32_SEG_BASE 16
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#define IA32_SEG_TYPE 40
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#define IA32_SEG_SYS 44
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#define IA32_SEG_DPL 45
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#define IA32_SEG_P 47
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#define IA32_SEG_HIGH_LIMIT 48
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#define IA32_SEG_AVL 52
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#define IA32_SEG_DB 54
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#define IA32_SEG_G 55
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#define IA32_SEG_HIGH_BASE 56
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#define IA32_SEG_DESCRIPTOR(base, limit, segtype, nonsysseg, dpl, segpresent, avl, segdb, gran) \
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(((limit) & 0xffff) \
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| (((unsigned long) (base) & 0xffffff) << IA32_SEG_BASE) \
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| ((unsigned long) (segtype) << IA32_SEG_TYPE) \
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| ((unsigned long) (nonsysseg) << IA32_SEG_SYS) \
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| ((unsigned long) (dpl) << IA32_SEG_DPL) \
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| ((unsigned long) (segpresent) << IA32_SEG_P) \
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| ((((unsigned long) (limit) >> 16) & 0xf) << IA32_SEG_HIGH_LIMIT) \
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| ((unsigned long) (avl) << IA32_SEG_AVL) \
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| ((unsigned long) (segdb) << IA32_SEG_DB) \
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| ((unsigned long) (gran) << IA32_SEG_G) \
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| ((((unsigned long) (base) >> 24) & 0xff) << IA32_SEG_HIGH_BASE))
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#define SEG_LIM 32
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#define SEG_TYPE 52
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#define SEG_SYS 56
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#define SEG_DPL 57
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#define SEG_P 59
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#define SEG_AVL 60
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#define SEG_DB 62
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#define SEG_G 63
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/* Unscramble an IA-32 segment descriptor into the IA-64 format. */
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#define IA32_SEG_UNSCRAMBLE(sd) \
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( (((sd) >> IA32_SEG_BASE) & 0xffffff) | ((((sd) >> IA32_SEG_HIGH_BASE) & 0xff) << 24) \
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| ((((sd) & 0xffff) | ((((sd) >> IA32_SEG_HIGH_LIMIT) & 0xf) << 16)) << SEG_LIM) \
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| ((((sd) >> IA32_SEG_TYPE) & 0xf) << SEG_TYPE) \
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| ((((sd) >> IA32_SEG_SYS) & 0x1) << SEG_SYS) \
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| ((((sd) >> IA32_SEG_DPL) & 0x3) << SEG_DPL) \
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| ((((sd) >> IA32_SEG_P) & 0x1) << SEG_P) \
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| ((((sd) >> IA32_SEG_AVL) & 0x1) << SEG_AVL) \
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| ((((sd) >> IA32_SEG_DB) & 0x1) << SEG_DB) \
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| ((((sd) >> IA32_SEG_G) & 0x1) << SEG_G))
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#define IA32_IOBASE 0x2000000000000000UL /* Virtual address for I/O space */
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#define IA32_CR0 0x80000001 /* Enable PG and PE bits */
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#define IA32_CR4 0x600 /* MMXEX and FXSR on */
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/*
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* IA32 floating point control registers starting values
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*/
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#define IA32_FSR_DEFAULT 0x55550000 /* set all tag bits */
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#define IA32_FCR_DEFAULT 0x17800000037fUL /* extended precision, all masks */
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#define IA32_PTRACE_GETREGS 12
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#define IA32_PTRACE_SETREGS 13
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#define IA32_PTRACE_GETFPREGS 14
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#define IA32_PTRACE_SETFPREGS 15
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#define IA32_PTRACE_GETFPXREGS 18
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#define IA32_PTRACE_SETFPXREGS 19
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#define ia32_start_thread(regs,new_ip,new_sp) do { \
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set_fs(USER_DS); \
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ia64_psr(regs)->cpl = 3; /* set user mode */ \
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ia64_psr(regs)->ri = 0; /* clear return slot number */ \
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ia64_psr(regs)->is = 1; /* IA-32 instruction set */ \
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regs->cr_iip = new_ip; \
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regs->ar_rsc = 0xc; /* enforced lazy mode, priv. level 3 */ \
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regs->ar_rnat = 0; \
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regs->loadrs = 0; \
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regs->r12 = new_sp; \
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} while (0)
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/*
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* Local Descriptor Table (LDT) related declarations.
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*/
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#define IA32_LDT_ENTRIES 8192 /* Maximum number of LDT entries supported. */
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#define IA32_LDT_ENTRY_SIZE 8 /* The size of each LDT entry. */
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#define LDT_entry_a(info) \
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((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
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#define LDT_entry_b(info) \
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(((info)->base_addr & 0xff000000) | \
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(((info)->base_addr & 0x00ff0000) >> 16) | \
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((info)->limit & 0xf0000) | \
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(((info)->read_exec_only ^ 1) << 9) | \
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((info)->contents << 10) | \
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(((info)->seg_not_present ^ 1) << 15) | \
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((info)->seg_32bit << 22) | \
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((info)->limit_in_pages << 23) | \
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((info)->useable << 20) | \
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0x7100)
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#define LDT_empty(info) ( \
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(info)->base_addr == 0 && \
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(info)->limit == 0 && \
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(info)->contents == 0 && \
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(info)->read_exec_only == 1 && \
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(info)->seg_32bit == 0 && \
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(info)->limit_in_pages == 0 && \
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(info)->seg_not_present == 1 && \
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(info)->useable == 0 )
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static inline void
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load_TLS (struct thread_struct *t, unsigned int cpu)
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{
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extern unsigned long *cpu_gdt_table[NR_CPUS];
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memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0], sizeof(long));
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memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1], sizeof(long));
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memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2], sizeof(long));
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}
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struct ia32_user_desc {
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unsigned int entry_number;
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unsigned int base_addr;
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unsigned int limit;
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unsigned int seg_32bit:1;
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unsigned int contents:2;
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unsigned int read_exec_only:1;
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unsigned int limit_in_pages:1;
|
|
unsigned int seg_not_present:1;
|
|
unsigned int useable:1;
|
|
};
|
|
|
|
struct linux_binprm;
|
|
|
|
extern void ia32_init_addr_space (struct pt_regs *regs);
|
|
extern int ia32_setup_arg_pages (struct linux_binprm *bprm, int exec_stack);
|
|
extern unsigned long ia32_do_mmap (struct file *, unsigned long, unsigned long, int, int, loff_t);
|
|
extern void ia32_load_segment_descriptors (struct task_struct *task);
|
|
|
|
#define ia32f2ia64f(dst,src) \
|
|
do { \
|
|
ia64_ldfe(6,src); \
|
|
ia64_stop(); \
|
|
ia64_stf_spill(dst, 6); \
|
|
} while(0)
|
|
|
|
#define ia64f2ia32f(dst,src) \
|
|
do { \
|
|
ia64_ldf_fill(6, src); \
|
|
ia64_stop(); \
|
|
ia64_stfe(dst, 6); \
|
|
} while(0)
|
|
|
|
struct user_regs_struct32 {
|
|
__u32 ebx, ecx, edx, esi, edi, ebp, eax;
|
|
unsigned short ds, __ds, es, __es;
|
|
unsigned short fs, __fs, gs, __gs;
|
|
__u32 orig_eax, eip;
|
|
unsigned short cs, __cs;
|
|
__u32 eflags, esp;
|
|
unsigned short ss, __ss;
|
|
};
|
|
|
|
/* Prototypes for use in elfcore32.h */
|
|
extern int save_ia32_fpstate (struct task_struct *, struct ia32_user_i387_struct __user *);
|
|
extern int save_ia32_fpxstate (struct task_struct *, struct ia32_user_fxsr_struct __user *);
|
|
|
|
#endif /* !CONFIG_IA32_SUPPORT */
|
|
|
|
#endif /* _ASM_IA64_IA32_PRIV_H */
|