70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <acpi/reboot.h>
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void acpi_reboot(void)
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{
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struct acpi_generic_address *rr;
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struct pci_bus *bus0;
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u8 reset_value;
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unsigned int devfn;
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if (acpi_disabled)
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return;
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rr = &acpi_gbl_FADT.reset_register;
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/*
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* Is the ACPI reset register supported?
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*
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* According to ACPI 3.0, FADT.flags.RESET_REG_SUP indicates
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* whether the ACPI reset mechanism is supported.
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*
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* However, some boxes have this bit clear, yet a valid
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* ACPI_RESET_REG & RESET_VALUE, and ACPI reboot is the only
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* mechanism that works for them after S3.
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*
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* This suggests that other operating systems may not be checking
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* the RESET_REG_SUP bit, and are using other means to decide
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* whether to use the ACPI reboot mechanism or not.
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*
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* So when acpi reboot is requested,
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* only the reset_register is checked. If the following
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* conditions are met, it indicates that the reset register is supported.
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* a. reset_register is not zero
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* b. the access width is eight
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* c. the bit_offset is zero
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*/
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if (!(rr->address) || rr->bit_width != 8 || rr->bit_offset != 0)
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return;
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reset_value = acpi_gbl_FADT.reset_value;
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/* The reset register can only exist in I/O, Memory or PCI config space
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* on a device on bus 0. */
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switch (rr->space_id) {
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case ACPI_ADR_SPACE_PCI_CONFIG:
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/* The reset register can only live on bus 0. */
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bus0 = pci_find_bus(0, 0);
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if (!bus0)
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return;
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/* Form PCI device/function pair. */
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devfn = PCI_DEVFN((rr->address >> 32) & 0xffff,
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(rr->address >> 16) & 0xffff);
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printk(KERN_DEBUG "Resetting with ACPI PCI RESET_REG.");
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/* Write the value that resets us. */
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pci_bus_write_config_byte(bus0, devfn,
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(rr->address & 0xffff), reset_value);
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break;
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case ACPI_ADR_SPACE_SYSTEM_MEMORY:
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case ACPI_ADR_SPACE_SYSTEM_IO:
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printk(KERN_DEBUG "ACPI MEMORY or I/O RESET_REG.\n");
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acpi_hw_low_level_write(8, reset_value, rr);
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break;
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}
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/* Wait ten seconds */
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acpi_os_stall(10000000);
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}
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