289 lines
7.2 KiB
C
289 lines
7.2 KiB
C
/*
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* Setup code for SH7720, SH7721.
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*
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* Copyright (C) 2007 Markus Brunner, Mark Jonas
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* Copyright (C) 2009 Paul Mundt
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*
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* Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
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*
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2006 Jamie Lenehan
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/io.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <linux/sh_intc.h>
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#include <linux/usb/ohci_pdriver.h>
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#include <asm/rtc.h>
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#include <cpu/serial.h>
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static struct resource rtc_resources[] = {
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[0] = {
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.start = 0xa413fec0,
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.end = 0xa413fec0 + 0x28 - 1,
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.flags = IORESOURCE_IO,
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},
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[1] = {
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/* Shared Period/Carry/Alarm IRQ */
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.start = evt2irq(0x480),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_rtc_platform_info rtc_info = {
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.capabilities = RTC_CAP_4_DIGIT_YEAR,
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};
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static struct platform_device rtc_device = {
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.name = "sh-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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.dev = {
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.platform_data = &rtc_info,
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},
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};
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static struct plat_sci_port scif0_platform_data = {
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.type = PORT_SCIF,
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.ops = &sh7720_sci_port_ops,
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.regtype = SCIx_SH7705_SCIF_REGTYPE,
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};
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static struct resource scif0_resources[] = {
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DEFINE_RES_MEM(0xa4430000, 0x100),
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DEFINE_RES_IRQ(evt2irq(0xc00)),
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};
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static struct platform_device scif0_device = {
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.name = "sh-sci",
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.id = 0,
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.resource = scif0_resources,
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.num_resources = ARRAY_SIZE(scif0_resources),
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.dev = {
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.platform_data = &scif0_platform_data,
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},
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};
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static struct plat_sci_port scif1_platform_data = {
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.type = PORT_SCIF,
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.ops = &sh7720_sci_port_ops,
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.regtype = SCIx_SH7705_SCIF_REGTYPE,
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};
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static struct resource scif1_resources[] = {
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DEFINE_RES_MEM(0xa4438000, 0x100),
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DEFINE_RES_IRQ(evt2irq(0xc20)),
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};
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static struct platform_device scif1_device = {
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.name = "sh-sci",
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.id = 1,
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.resource = scif1_resources,
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.num_resources = ARRAY_SIZE(scif1_resources),
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.dev = {
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.platform_data = &scif1_platform_data,
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},
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};
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static struct resource usb_ohci_resources[] = {
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[0] = {
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.start = 0xA4428000,
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.end = 0xA44280FF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = evt2irq(0xa60),
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.end = evt2irq(0xa60),
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 usb_ohci_dma_mask = 0xffffffffUL;
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static struct usb_ohci_pdata usb_ohci_pdata;
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static struct platform_device usb_ohci_device = {
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.name = "ohci-platform",
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.id = -1,
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.dev = {
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.dma_mask = &usb_ohci_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &usb_ohci_pdata,
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},
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.num_resources = ARRAY_SIZE(usb_ohci_resources),
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.resource = usb_ohci_resources,
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};
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static struct resource usbf_resources[] = {
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[0] = {
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.name = "sh_udc",
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.start = 0xA4420000,
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.end = 0xA44200FF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.name = "sh_udc",
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.start = evt2irq(0xa20),
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.end = evt2irq(0xa20),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device usbf_device = {
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.name = "sh_udc",
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.id = -1,
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.dev = {
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.dma_mask = NULL,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(usbf_resources),
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.resource = usbf_resources,
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};
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static struct sh_timer_config cmt_platform_data = {
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.channels_mask = 0x1f,
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};
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static struct resource cmt_resources[] = {
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DEFINE_RES_MEM(0x044a0000, 0x60),
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DEFINE_RES_IRQ(evt2irq(0xf00)),
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};
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static struct platform_device cmt_device = {
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.name = "sh-cmt-32",
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.id = 0,
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.dev = {
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.platform_data = &cmt_platform_data,
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},
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.resource = cmt_resources,
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.num_resources = ARRAY_SIZE(cmt_resources),
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};
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static struct sh_timer_config tmu0_platform_data = {
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.channels_mask = 7,
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};
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static struct resource tmu0_resources[] = {
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DEFINE_RES_MEM(0xa412fe90, 0x28),
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DEFINE_RES_IRQ(evt2irq(0x400)),
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DEFINE_RES_IRQ(evt2irq(0x420)),
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DEFINE_RES_IRQ(evt2irq(0x440)),
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};
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static struct platform_device tmu0_device = {
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.name = "sh-tmu-sh3",
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.id = 0,
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.dev = {
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.platform_data = &tmu0_platform_data,
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},
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.resource = tmu0_resources,
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.num_resources = ARRAY_SIZE(tmu0_resources),
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};
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static struct platform_device *sh7720_devices[] __initdata = {
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&scif0_device,
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&scif1_device,
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&cmt_device,
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&tmu0_device,
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&rtc_device,
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&usb_ohci_device,
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&usbf_device,
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};
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static int __init sh7720_devices_setup(void)
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{
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return platform_add_devices(sh7720_devices,
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ARRAY_SIZE(sh7720_devices));
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}
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arch_initcall(sh7720_devices_setup);
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static struct platform_device *sh7720_early_devices[] __initdata = {
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&scif0_device,
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&scif1_device,
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&cmt_device,
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&tmu0_device,
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};
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void __init plat_early_device_setup(void)
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{
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early_platform_add_devices(sh7720_early_devices,
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ARRAY_SIZE(sh7720_early_devices));
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}
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enum {
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UNUSED = 0,
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/* interrupt sources */
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TMU0, TMU1, TMU2, RTC,
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WDT, REF_RCMI, SIM,
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IRQ0, IRQ1, IRQ2, IRQ3,
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USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
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DMAC1, LCDC, SSL,
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ADC, DMAC2, USBFI, CMT,
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SCIF0, SCIF1,
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PINT07, PINT815, TPU, IIC,
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SIOF0, SIOF1, MMC, PCC,
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USBHI, AFEIF,
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H_UDI,
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};
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static struct intc_vect vectors[] __initdata = {
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/* IRQ0->5 are handled in setup-sh3.c */
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INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
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INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),
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INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),
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INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),
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INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),
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INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
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/* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0),
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INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800),
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INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840),
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INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900),
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#if defined(CONFIG_CPU_SUBTYPE_SH7720)
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INTC_VECT(SSL, 0x980),
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#endif
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INTC_VECT(USBFI, 0xa20), INTC_VECT(USBFI, 0xa40),
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INTC_VECT(USBHI, 0xa60),
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INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
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INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
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INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
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INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00),
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INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80),
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INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0),
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INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00),
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INTC_VECT(MMC, 0xe80), INTC_VECT(MMC, 0xea0),
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INTC_VECT(MMC, 0xec0), INTC_VECT(MMC, 0xee0),
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INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
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INTC_VECT(AFEIF, 0xfe0),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
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{ 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
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{ 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
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{ 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
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{ 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
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{ 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
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{ 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
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{ 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
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{ 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
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};
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static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
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NULL, prio_registers, NULL);
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void __init plat_irq_setup(void)
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{
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register_intc_controller(&intc_desc);
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plat_irq_setup_sh3();
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}
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