372 lines
8.1 KiB
C
372 lines
8.1 KiB
C
/*
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* ff-protocol-ff400.c - a part of driver for RME Fireface series
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*
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* Copyright (c) 2015-2017 Takashi Sakamoto
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*
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* Licensed under the terms of the GNU General Public License, version 2.
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*/
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#include <linux/delay.h>
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#include "ff.h"
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#define FF400_STF 0x000080100500ull
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#define FF400_RX_PACKET_FORMAT 0x000080100504ull
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#define FF400_ISOC_COMM_START 0x000080100508ull
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#define FF400_TX_PACKET_FORMAT 0x00008010050cull
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#define FF400_ISOC_COMM_STOP 0x000080100510ull
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#define FF400_SYNC_STATUS 0x0000801c0000ull
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#define FF400_FETCH_PCM_FRAMES 0x0000801c0000ull /* For block request. */
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#define FF400_CLOCK_CONFIG 0x0000801c0004ull
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#define FF400_MIDI_HIGH_ADDR 0x0000801003f4ull
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#define FF400_MIDI_RX_PORT_0 0x000080180000ull
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#define FF400_MIDI_RX_PORT_1 0x000080190000ull
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static int ff400_get_clock(struct snd_ff *ff, unsigned int *rate,
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enum snd_ff_clock_src *src)
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{
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__le32 reg;
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u32 data;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
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FF400_SYNC_STATUS, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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data = le32_to_cpu(reg);
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/* Calculate sampling rate. */
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switch ((data >> 1) & 0x03) {
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case 0x01:
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*rate = 32000;
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break;
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case 0x00:
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*rate = 44100;
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break;
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case 0x03:
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*rate = 48000;
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break;
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case 0x02:
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default:
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return -EIO;
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}
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if (data & 0x08)
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*rate *= 2;
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else if (data & 0x10)
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*rate *= 4;
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/* Calculate source of clock. */
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if (data & 0x01) {
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*src = SND_FF_CLOCK_SRC_INTERNAL;
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} else {
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/* TODO: 0x00, 0x01, 0x02, 0x06, 0x07? */
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switch ((data >> 10) & 0x07) {
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case 0x03:
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*src = SND_FF_CLOCK_SRC_SPDIF;
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break;
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case 0x04:
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*src = SND_FF_CLOCK_SRC_WORD;
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break;
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case 0x05:
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*src = SND_FF_CLOCK_SRC_LTC;
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break;
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case 0x00:
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default:
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*src = SND_FF_CLOCK_SRC_ADAT;
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break;
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}
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}
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return 0;
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}
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static int ff400_begin_session(struct snd_ff *ff, unsigned int rate)
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{
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__le32 reg;
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int i, err;
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/* Check whether the given value is supported or not. */
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for (i = 0; i < CIP_SFC_COUNT; i++) {
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if (amdtp_rate_table[i] == rate)
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break;
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}
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if (i == CIP_SFC_COUNT)
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return -EINVAL;
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/* Set the number of data blocks transferred in a second. */
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reg = cpu_to_le32(rate);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_STF, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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msleep(100);
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/*
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* Set isochronous channel and the number of quadlets of received
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* packets.
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*/
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reg = cpu_to_le32(((ff->rx_stream.data_block_quadlets << 3) << 8) |
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ff->rx_resources.channel);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_RX_PACKET_FORMAT, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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/*
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* Set isochronous channel and the number of quadlets of transmitted
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* packet.
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*/
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/* TODO: investigate the purpose of this 0x80. */
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reg = cpu_to_le32((0x80 << 24) |
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(ff->tx_resources.channel << 5) |
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(ff->tx_stream.data_block_quadlets));
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_TX_PACKET_FORMAT, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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/* Allow to transmit packets. */
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reg = cpu_to_le32(0x00000001);
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return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_ISOC_COMM_START, ®, sizeof(reg), 0);
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}
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static void ff400_finish_session(struct snd_ff *ff)
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{
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__le32 reg;
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reg = cpu_to_le32(0x80000000);
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snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_ISOC_COMM_STOP, ®, sizeof(reg), 0);
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}
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static int ff400_switch_fetching_mode(struct snd_ff *ff, bool enable)
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{
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__le32 *reg;
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int i;
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reg = kzalloc(sizeof(__le32) * 18, GFP_KERNEL);
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if (reg == NULL)
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return -ENOMEM;
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if (enable) {
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/*
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* Each quadlet is corresponding to data channels in a data
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* blocks in reverse order. Precisely, quadlets for available
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* data channels should be enabled. Here, I take second best
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* to fetch PCM frames from all of data channels regardless of
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* stf.
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*/
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for (i = 0; i < 18; ++i)
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reg[i] = cpu_to_le32(0x00000001);
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}
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return snd_fw_transaction(ff->unit, TCODE_WRITE_BLOCK_REQUEST,
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FF400_FETCH_PCM_FRAMES, reg,
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sizeof(__le32) * 18, 0);
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}
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static void ff400_dump_sync_status(struct snd_ff *ff,
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struct snd_info_buffer *buffer)
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{
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__le32 reg;
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u32 data;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
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FF400_SYNC_STATUS, ®, sizeof(reg), 0);
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if (err < 0)
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return;
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data = le32_to_cpu(reg);
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snd_iprintf(buffer, "External source detection:\n");
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snd_iprintf(buffer, "Word Clock:");
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if ((data >> 24) & 0x20) {
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if ((data >> 24) & 0x40)
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snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
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} else {
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snd_iprintf(buffer, "none\n");
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}
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snd_iprintf(buffer, "S/PDIF:");
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if ((data >> 16) & 0x10) {
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if ((data >> 16) & 0x04)
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snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
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} else {
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snd_iprintf(buffer, "none\n");
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}
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snd_iprintf(buffer, "ADAT:");
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if ((data >> 8) & 0x04) {
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if ((data >> 8) & 0x10)
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snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
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} else {
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snd_iprintf(buffer, "none\n");
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}
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snd_iprintf(buffer, "\nUsed external source:\n");
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if (((data >> 22) & 0x07) == 0x07) {
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snd_iprintf(buffer, "None\n");
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} else {
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switch ((data >> 22) & 0x07) {
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case 0x00:
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snd_iprintf(buffer, "ADAT:");
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break;
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case 0x03:
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snd_iprintf(buffer, "S/PDIF:");
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break;
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case 0x04:
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snd_iprintf(buffer, "Word:");
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break;
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case 0x07:
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snd_iprintf(buffer, "Nothing:");
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break;
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case 0x01:
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case 0x02:
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case 0x05:
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case 0x06:
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default:
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snd_iprintf(buffer, "unknown:");
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break;
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}
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if ((data >> 25) & 0x07) {
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switch ((data >> 25) & 0x07) {
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case 0x01:
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snd_iprintf(buffer, "32000\n");
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break;
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case 0x02:
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snd_iprintf(buffer, "44100\n");
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break;
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case 0x03:
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snd_iprintf(buffer, "48000\n");
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break;
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case 0x04:
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snd_iprintf(buffer, "64000\n");
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break;
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case 0x05:
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snd_iprintf(buffer, "88200\n");
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break;
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case 0x06:
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snd_iprintf(buffer, "96000\n");
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break;
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case 0x07:
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snd_iprintf(buffer, "128000\n");
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break;
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case 0x08:
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snd_iprintf(buffer, "176400\n");
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break;
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case 0x09:
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snd_iprintf(buffer, "192000\n");
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break;
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case 0x00:
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snd_iprintf(buffer, "unknown\n");
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break;
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}
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}
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}
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snd_iprintf(buffer, "Multiplied:");
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snd_iprintf(buffer, "%d\n", (data & 0x3ff) * 250);
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}
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static void ff400_dump_clock_config(struct snd_ff *ff,
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struct snd_info_buffer *buffer)
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{
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__le32 reg;
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u32 data;
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unsigned int rate;
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const char *src;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST,
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FF400_CLOCK_CONFIG, ®, sizeof(reg), 0);
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if (err < 0)
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return;
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data = le32_to_cpu(reg);
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snd_iprintf(buffer, "Output S/PDIF format: %s (Emphasis: %s)\n",
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(data & 0x20) ? "Professional" : "Consumer",
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(data & 0x40) ? "on" : "off");
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snd_iprintf(buffer, "Optical output interface format: %s\n",
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((data >> 8) & 0x01) ? "S/PDIF" : "ADAT");
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snd_iprintf(buffer, "Word output single speed: %s\n",
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((data >> 8) & 0x20) ? "on" : "off");
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snd_iprintf(buffer, "S/PDIF input interface: %s\n",
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((data >> 8) & 0x02) ? "Optical" : "Coaxial");
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switch ((data >> 1) & 0x03) {
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case 0x01:
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rate = 32000;
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break;
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case 0x00:
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rate = 44100;
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break;
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case 0x03:
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rate = 48000;
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break;
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case 0x02:
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default:
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return;
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}
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if (data & 0x08)
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rate *= 2;
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else if (data & 0x10)
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rate *= 4;
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snd_iprintf(buffer, "Sampling rate: %d\n", rate);
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if (data & 0x01) {
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src = "Internal";
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} else {
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switch ((data >> 10) & 0x07) {
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case 0x00:
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src = "ADAT";
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break;
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case 0x03:
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src = "S/PDIF";
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break;
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case 0x04:
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src = "Word";
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break;
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case 0x05:
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src = "LTC";
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break;
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default:
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return;
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}
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}
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snd_iprintf(buffer, "Sync to clock source: %s\n", src);
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}
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const struct snd_ff_protocol snd_ff_protocol_ff400 = {
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.get_clock = ff400_get_clock,
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.begin_session = ff400_begin_session,
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.finish_session = ff400_finish_session,
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.switch_fetching_mode = ff400_switch_fetching_mode,
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.dump_sync_status = ff400_dump_sync_status,
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.dump_clock_config = ff400_dump_clock_config,
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.midi_high_addr_reg = FF400_MIDI_HIGH_ADDR,
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.midi_rx_port_0_reg = FF400_MIDI_RX_PORT_0,
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.midi_rx_port_1_reg = FF400_MIDI_RX_PORT_1,
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};
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