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Update x86_64 minimal ISA instruction set 

Change-Id: I3ca7f8a0799e6aef09ab1dfb719d218c7338ebf8
Signed-off-by: Mingwei Shi <mingwei.shi@intel.com>
This commit is contained in:
Mingwei Shi 2015-03-09 19:44:49 +08:00
parent 46ba5456ad
commit 357778de34
2 changed files with 6 additions and 0 deletions
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3
core/combo/TARGET_linux-x86_64.mk
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@ -117,6 +117,9 @@ endif
ifeq ($(ARCH_X86_HAVE_SSE4_2),true)
TARGET_GLOBAL_CFLAGS += -msse4.2
endif
ifeq ($(ARCH_X86_HAVE_POPCNT),true)
TARGET_GLOBAL_CFLAGS += -mpopcnt
endif
ifeq ($(ARCH_X86_HAVE_AVX),true)
TARGET_GLOBAL_CFLAGS += -mavx
endif

3
core/combo/arch/x86_64/x86_64.mk
View File

@ -8,6 +8,9 @@
ARCH_X86_HAVE_SSSE3 := true
ARCH_X86_HAVE_MOVBE := false # Only supported on Atom.
ARCH_X86_HAVE_POPCNT := true
ARCH_X86_HAVE_SSE4 := true
ARCH_X86_HAVE_SSE4_1 := true
ARCH_X86_HAVE_SSE4_2 := true
# CFLAGS for this arch