From 357778de34c7e8aa31a0baec1ab45fcf31dde234 Mon Sep 17 00:00:00 2001
From: Mingwei Shi <mingwei.shi@intel.com>
Date: Mon, 9 Mar 2015 19:44:49 +0800
Subject: [PATCH] Update x86_64 minimal ISA instruction set

Change-Id: I3ca7f8a0799e6aef09ab1dfb719d218c7338ebf8
Signed-off-by: Mingwei Shi <mingwei.shi@intel.com>
---
 core/combo/TARGET_linux-x86_64.mk | 3 +++
 core/combo/arch/x86_64/x86_64.mk  | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/core/combo/TARGET_linux-x86_64.mk b/core/combo/TARGET_linux-x86_64.mk
index 046a42bb5..303ea826b 100644
--- a/core/combo/TARGET_linux-x86_64.mk
+++ b/core/combo/TARGET_linux-x86_64.mk
@@ -117,6 +117,9 @@ endif
 ifeq ($(ARCH_X86_HAVE_SSE4_2),true)
     TARGET_GLOBAL_CFLAGS += -msse4.2
 endif
+ifeq ($(ARCH_X86_HAVE_POPCNT),true)
+    TARGET_GLOBAL_CFLAGS += -mpopcnt
+endif
 ifeq ($(ARCH_X86_HAVE_AVX),true)
     TARGET_GLOBAL_CFLAGS += -mavx
 endif
diff --git a/core/combo/arch/x86_64/x86_64.mk b/core/combo/arch/x86_64/x86_64.mk
index 9d2b62013..08dd9cd86 100755
--- a/core/combo/arch/x86_64/x86_64.mk
+++ b/core/combo/arch/x86_64/x86_64.mk
@@ -8,6 +8,9 @@
 ARCH_X86_HAVE_SSSE3 := true
 ARCH_X86_HAVE_MOVBE := false # Only supported on Atom.
 ARCH_X86_HAVE_POPCNT := true
+ARCH_X86_HAVE_SSE4 := true
+ARCH_X86_HAVE_SSE4_1 := true
+ARCH_X86_HAVE_SSE4_2 := true
 
 
 # CFLAGS for this arch