2017-06-13 15:27:46 +08:00
|
|
|
* Rockchip PDM controller
|
|
|
|
|
|
|
|
Required properties:
|
|
|
|
|
|
|
|
- compatible: "rockchip,pdm"
|
2019-04-04 11:53:15 +08:00
|
|
|
- "rockchip,px30-pdm"
|
2019-04-04 11:55:45 +08:00
|
|
|
- "rockchip,rk1808-pdm"
|
2019-04-04 11:53:15 +08:00
|
|
|
- "rockchip,rk3308-pdm"
|
2017-06-13 15:27:46 +08:00
|
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
|
|
region.
|
|
|
|
- dmas: DMA specifiers for rx dma. See the DMA client binding,
|
|
|
|
Documentation/devicetree/bindings/dma/dma.txt
|
|
|
|
- dma-names: should include "rx".
|
|
|
|
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
|
|
|
|
- clock-names: should contain following:
|
|
|
|
- "pdm_hclk": clock for PDM BUS
|
|
|
|
- "pdm_clk" : clock for PDM controller
|
2019-04-04 11:53:15 +08:00
|
|
|
- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
|
|
|
|
- reset-names: reset names, should include "pdm-m".
|
2017-06-13 15:27:46 +08:00
|
|
|
- pinctrl-names: Must contain a "default" entry.
|
|
|
|
- pinctrl-N: One property must exist for each entry in
|
|
|
|
pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
|
|
|
|
for details of the property values.
|
|
|
|
|
|
|
|
Example for rk3328 PDM controller:
|
|
|
|
|
|
|
|
pdm: pdm@ff040000 {
|
|
|
|
compatible = "rockchip,pdm";
|
|
|
|
reg = <0x0 0xff040000 0x0 0x1000>;
|
|
|
|
clocks = <&clk_pdm>, <&clk_gates28 0>;
|
|
|
|
clock-names = "pdm_clk", "pdm_hclk";
|
|
|
|
dmas = <&pdma 16>;
|
|
|
|
#dma-cells = <1>;
|
|
|
|
dma-names = "rx";
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
pinctrl-0 = <&pdmm0_clk
|
|
|
|
&pdmm0_sdi0
|
|
|
|
&pdmm0_sdi1
|
|
|
|
&pdmm0_sdi2
|
|
|
|
&pdmm0_sdi3>;
|
2017-08-21 16:25:07 +08:00
|
|
|
pinctrl-1 = <&pdmm0_clk_sleep
|
|
|
|
&pdmm0_sdi0_sleep
|
|
|
|
&pdmm0_sdi1_sleep
|
|
|
|
&pdmm0_sdi2_sleep
|
|
|
|
&pdmm0_sdi3_sleep>;
|
2017-06-13 15:27:46 +08:00
|
|
|
};
|