2013-04-02 13:15:16 +08:00
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/ {
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memory {
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reg = <0x10000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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reg_usb_otg_vbus: usb_otg_vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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2013-06-13 19:51:00 +08:00
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2013-08-12 16:46:24 +08:00
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reg_usb_h1_vbus: usb_h1_vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 29 0>;
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enable-active-high;
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};
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2013-06-13 19:51:00 +08:00
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reg_audio: wm8962_supply {
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compatible = "regulator-fixed";
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regulator-name = "wm8962-supply";
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gpio = <&gpio4 10 0>;
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enable-active-high;
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};
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2013-04-02 13:15:16 +08:00
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};
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gpio-keys {
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compatible = "gpio-keys";
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volume-up {
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label = "Volume Up";
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gpios = <&gpio1 4 0>;
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2013-07-19 21:40:23 +08:00
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gpio-key,wakeup;
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2013-04-02 13:15:16 +08:00
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linux,code = <115>; /* KEY_VOLUMEUP */
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio1 5 0>;
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2013-07-19 21:40:23 +08:00
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gpio-key,wakeup;
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2013-04-02 13:15:16 +08:00
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linux,code = <114>; /* KEY_VOLUMEDOWN */
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};
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};
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2013-06-14 13:22:46 +08:00
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sound {
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compatible = "fsl,imx6q-sabresd-wm8962",
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"fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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ssi-controller = <&ssi2>;
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audio-codec = <&codec>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"MICBIAS", "AMIC",
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"IN3R", "MICBIAS",
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"DMIC", "MICBIAS",
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"DMICDAT", "DMIC";
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mux-int-port = <2>;
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mux-ext-port = <3>;
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};
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2013-10-12 03:48:16 +08:00
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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status = "okay";
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};
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2013-04-02 13:15:16 +08:00
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};
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2013-06-14 13:19:57 +08:00
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux_2>;
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status = "okay";
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};
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2013-06-21 10:19:11 +08:00
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&ecspi1 {
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio4 9 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1_2>;
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status = "okay";
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p32";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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2013-04-02 13:15:16 +08:00
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_1>;
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phy-mode = "rgmii";
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2013-09-27 22:12:41 +08:00
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phy-reset-gpios = <&gpio1 25 0>;
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2013-04-02 13:15:16 +08:00
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status = "okay";
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};
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2013-06-13 19:51:01 +08:00
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_2>;
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status = "okay";
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codec: wm8962@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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2013-07-18 14:42:28 +08:00
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clocks = <&clks 201>;
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2013-06-13 19:51:01 +08:00
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0013 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x8014 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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};
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2013-07-25 04:20:03 +08:00
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3_2>;
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status = "okay";
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egalax_ts@04 {
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compatible = "eeti,egalax_ts";
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reg = <0x04>;
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interrupt-parent = <&gpio6>;
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interrupts = <7 2>;
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wakeup-gpios = <&gpio6 7 0>;
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};
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};
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2013-07-11 13:58:36 +08:00
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
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MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
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MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
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MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
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MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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2013-07-25 04:20:03 +08:00
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MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
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2013-08-12 16:46:24 +08:00
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
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2013-08-12 16:51:39 +08:00
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
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2013-09-27 22:12:41 +08:00
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
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2013-07-11 13:58:36 +08:00
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>;
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};
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};
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};
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2013-07-16 22:15:18 +08:00
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&ldb {
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status = "okay";
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lvds-channel@1 {
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fsl,data-mapping = "spwg";
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fsl,data-width = <18>;
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status = "okay";
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display-timings {
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native-mode = <&timing0>;
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timing0: hsd100pxn1 {
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clock-frequency = <65000000>;
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hactive = <1024>;
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vactive = <768>;
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hback-porch = <220>;
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hfront-porch = <40>;
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vback-porch = <21>;
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vfront-porch = <7>;
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hsync-len = <60>;
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vsync-len = <10>;
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};
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};
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};
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};
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2013-10-12 03:48:16 +08:00
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_1>;
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status = "okay";
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};
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2013-06-14 13:19:57 +08:00
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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2013-04-02 13:15:16 +08:00
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_1>;
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status = "okay";
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};
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&usbh1 {
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2013-08-12 16:46:24 +08:00
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vbus-supply = <®_usb_h1_vbus>;
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2013-04-02 13:15:16 +08:00
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg_2>;
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disable-over-current;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_1>;
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2013-09-18 00:46:23 +08:00
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bus-width = <8>;
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2013-04-02 13:15:16 +08:00
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cd-gpios = <&gpio2 2 0>;
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wp-gpios = <&gpio2 3 0>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_1>;
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2013-09-18 00:46:23 +08:00
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bus-width = <8>;
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2013-04-02 13:15:16 +08:00
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cd-gpios = <&gpio2 0 0>;
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wp-gpios = <&gpio2 1 0>;
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status = "okay";
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};
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