2012-05-12 20:57:59 +08:00
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/ {
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model = "QNAP TS219 family";
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2012-07-19 01:22:54 +08:00
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compatible = "qnap,ts219", "marvell,kirkwood";
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2012-05-12 20:57:59 +08:00
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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2013-07-26 21:18:05 +08:00
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mbus {
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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2012-05-12 20:57:59 +08:00
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ocp@f1000000 {
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i2c@11000 {
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status = "okay";
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clock-frequency = <400000>;
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2013-05-24 17:44:56 +08:00
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pinctrl-0 = <&pmx_twsi0>;
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pinctrl-names = "default";
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2012-05-12 20:57:59 +08:00
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s35390a: s35390a@30 {
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compatible = "s35390a";
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reg = <0x30>;
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};
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};
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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2013-05-24 17:44:56 +08:00
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pinctrl-0 = <&pmx_uart0>;
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pinctrl-names = "default";
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2012-05-12 20:57:59 +08:00
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};
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serial@12100 {
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clock-frequency = <200000000>;
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status = "okay";
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2013-05-24 17:44:56 +08:00
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pinctrl-0 = <&pmx_uart1>;
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pinctrl-names = "default";
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2012-05-12 20:57:59 +08:00
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};
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2012-12-28 20:25:10 +08:00
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poweroff@12100 {
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compatible = "qnap,power-off";
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reg = <0x12000 0x100>;
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clocks = <&gate_clk 7>;
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};
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2012-05-12 20:57:59 +08:00
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spi@10600 {
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status = "okay";
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2013-05-24 17:44:56 +08:00
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pinctrl-0 = <&pmx_spi>;
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pinctrl-names = "default";
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2012-05-12 20:57:59 +08:00
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m25p128@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "m25p128";
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reg = <0>;
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spi-max-frequency = <20000000>;
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mode = <0>;
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partition@0000000 {
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reg = <0x00000000 0x00080000>;
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label = "U-Boot";
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};
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partition@00200000 {
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reg = <0x00200000 0x00200000>;
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label = "Kernel";
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};
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partition@00400000 {
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reg = <0x00400000 0x00900000>;
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label = "RootFS1";
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};
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partition@00d00000 {
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reg = <0x00d00000 0x00300000>;
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label = "RootFS2";
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};
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partition@00040000 {
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reg = <0x00080000 0x00040000>;
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label = "U-Boot Config";
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};
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partition@000c0000 {
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reg = <0x000c0000 0x00140000>;
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label = "NAS Config";
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};
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};
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};
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2012-06-10 22:58:11 +08:00
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sata@80000 {
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2013-05-24 17:44:56 +08:00
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pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
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pinctrl-names = "default";
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2012-06-10 22:58:11 +08:00
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status = "okay";
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nr-ports = <2>;
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};
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2012-05-12 20:57:59 +08:00
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};
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};
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2013-07-08 04:34:56 +08:00
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&mdio {
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status = "okay";
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ethphy0: ethernet-phy {
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/* overwrite reg property in board file */
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};
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};
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ð0 {
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status = "okay";
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ethernet0-port@0 {
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phy-handle = <ðphy0>;
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};
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};
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