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linux/arch/sparc/kernel/pci.c

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
// SPDX-License-Identifier: GPL-2.0
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
/* pci.c: UltraSparc PCI controller support.
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
*
* Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
* Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be)
* Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
*
* OF tree based PCI bus probing taken from the PowerPC port
* with minor modifications, see there for credits.
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
*/
sparc: move symbol exporters to use export.h not module.h Many of the core sparc kernel files are not modules, but just including module.h for exporting symbols. Now these files can use the lighter footprint export.h for this role. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2011-07-23 01:18:16 +08:00
#include <linux/export.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/capability.h>
#include <linux/errno.h>
[SPARC64]: Kill asm-sparc64/pbm.h Everything it contains can be hidden in pci_impl.h Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-08 15:43:56 +08:00
#include <linux/pci.h>
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
#include <linux/msi.h>
#include <linux/irq.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#include <linux/init.h>
sparc: Kill EBUS driver layer. All that remains is the EBUS DMA programming library for sparc64. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-30 15:36:11 +08:00
#include <linux/of.h>
#include <linux/of_device.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
Replace <asm/uaccess.h> with <linux/uaccess.h> globally This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>' sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-12-25 03:46:01 +08:00
#include <linux/uaccess.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#include <asm/pgtable.h>
#include <asm/irq.h>
[SPARC64]: Use in-kernel OBP device tree for PCI controller probing. It can be pushed even further down, but this is a first step. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-06-22 09:18:47 +08:00
#include <asm/prom.h>
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
#include <asm/apb.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
[SPARC64]: Internalize pci_memspace_mask. The only user was bus_dvma_to_mem() which is no longer used by any driver, so kill that, and the export of pci_memspace_mask. The only user now is the PCI mmap support code. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:38:38 +08:00
#include "pci_impl.h"
sparc64: fix sparse warning in pci.c Fix following warning: pci.c:886:5: warning: symbol 'pci64_dma_supported' was not declared. Should it be static? Add proper prototype in kernel.h and delete local prototype in iommu.c Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-05-17 05:25:58 +08:00
#include "kernel.h"
[SPARC64]: Internalize pci_memspace_mask. The only user was bus_dvma_to_mem() which is no longer used by any driver, so kill that, and the export of pci_memspace_mask. The only user now is the PCI mmap support code. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:38:38 +08:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* List of all PCI controllers found in the system. */
[SPARC64] PCI: Use root list of pbm's instead of pci_controller_info's The idea is to move more and more things into the pbm, with the eventual goal of eliminating the pci_controller_info entirely as there really isn't any need for it. This stage of the transformations requires some reworking of the PCI error interrupt handling. It might be tricky to get rid of the pci_controller_info parenting for a few reasons: 1) When we get an uncorrectable or correctable error we want to interrogate the IOMMU and streaming cache of both PBMs for error status. These errors come from the UPA front-end which is shared between the two PBM PCI bus segments. Historically speaking this is why I choose the datastructure hierarchy of pci_controller_info-->pci_pbm_info 2) The probing does a portid/devhandle match to look for the 'other' pbm, but this is entirely an artifact and can be eliminated trivially. What we could do to solve #1 is to have a "buddy" pointer from one pbm to another. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-08 14:06:27 +08:00
struct pci_pbm_info *pci_pbm_root = NULL;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
[SPARC64]: Move index info pci_pbm_info. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-08 14:49:01 +08:00
/* Each PBM found gets a unique index. */
int pci_num_pbms = 0;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
volatile int pci_poke_in_progress;
volatile int pci_poke_cpu = -1;
volatile int pci_poke_faulted;
static DEFINE_SPINLOCK(pci_poke_lock);
void pci_config_read8(u8 *addr, u8 *ret)
{
unsigned long flags;
u8 byte;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"lduba [%1] %2, %0\n\t"
"membar #Sync"
: "=r" (byte)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
if (!pci_poke_faulted)
*ret = byte;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
void pci_config_read16(u16 *addr, u16 *ret)
{
unsigned long flags;
u16 word;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"lduha [%1] %2, %0\n\t"
"membar #Sync"
: "=r" (word)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
if (!pci_poke_faulted)
*ret = word;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
void pci_config_read32(u32 *addr, u32 *ret)
{
unsigned long flags;
u32 dword;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"lduwa [%1] %2, %0\n\t"
"membar #Sync"
: "=r" (dword)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
if (!pci_poke_faulted)
*ret = dword;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
void pci_config_write8(u8 *addr, u8 val)
{
unsigned long flags;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"stba %0, [%1] %2\n\t"
"membar #Sync"
: /* no outputs */
: "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
void pci_config_write16(u16 *addr, u16 val)
{
unsigned long flags;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"stha %0, [%1] %2\n\t"
"membar #Sync"
: /* no outputs */
: "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
void pci_config_write32(u32 *addr, u32 val)
{
unsigned long flags;
spin_lock_irqsave(&pci_poke_lock, flags);
pci_poke_cpu = smp_processor_id();
pci_poke_in_progress = 1;
pci_poke_faulted = 0;
__asm__ __volatile__("membar #Sync\n\t"
"stwa %0, [%1] %2\n\t"
"membar #Sync"
: /* no outputs */
: "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
: "memory");
pci_poke_in_progress = 0;
pci_poke_cpu = -1;
spin_unlock_irqrestore(&pci_poke_lock, flags);
}
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
static int ofpci_verbose;
static int __init ofpci_debug(char *str)
{
int val = 0;
get_option(&str, &val);
if (val)
ofpci_verbose = 1;
return 1;
}
__setup("ofpci_debug=", ofpci_debug);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
static unsigned long pci_parse_of_flags(u32 addr0)
{
unsigned long flags = 0;
if (addr0 & 0x02000000) {
flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
sparc/PCI: Add mem64 resource parsing for root bus David reported that a T5-8 sparc system failed to boot with: pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff]) pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff]) pci 0000:00:01.0: can't claim BAR 15 [mem 0x100000000-0x4afffffff pref]: no compatible bridge window Note that we don't know about a host bridge aperture that contains BAR 15. OF does report a MEM64 aperture, but before this patch, pci_determine_mem_io_space() ignored it. Add support for host bridge apertures with 64-bit PCI addresses. Also set IORESOURCE_MEM_64 for PCI device and bridge resources in PCI 64-bit memory space. Sparc doesn't actually print the device and bridge resources, but after this patch, we should have the equivalent of this: pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff]) pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff]) pci_bus 0000:00: root bus resource [mem 0x800100000000-0x8007ffffffff] (bus address [0x100000000-0x7ffffffff]) pci 0000:00:01.0: bridge window [mem 0x800100000000-0x8004afffffff 64bit pref] [bhelgaas: changelog, URL to David's report] Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows") Link: http://lkml.kernel.org/r/5514391F.2030300@oracle.com Reported-by: David Ahern <david.ahern@oracle.com> Tested-by: David Ahern <david.ahern@oracle.com> Tested-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-10-21 00:36:53 +08:00
if (addr0 & 0x01000000)
flags |= IORESOURCE_MEM_64
| PCI_BASE_ADDRESS_MEM_TYPE_64;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (addr0 & 0x40000000)
flags |= IORESOURCE_PREFETCH
| PCI_BASE_ADDRESS_MEM_PREFETCH;
} else if (addr0 & 0x01000000)
flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
return flags;
}
/* The of_device layer has translated all of the assigned-address properties
* into physical address resources, we only have to figure out the register
* mapping.
*/
sparc: remove references to of_device and to_of_device of_device is just a #define alias to platform_device. This patch replaces all references to it with platform_device. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David S. Miller <davem@davemloft.net>
2010-07-23 06:04:30 +08:00
static void pci_parse_of_addrs(struct platform_device *op,
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct device_node *node,
struct pci_dev *dev)
{
struct resource *op_res;
const u32 *addrs;
int proplen;
addrs = of_get_property(node, "assigned-addresses", &proplen);
if (!addrs)
return;
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " parse addresses (%d bytes) @ %p\n",
proplen, addrs);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
op_res = &op->resource[0];
for (; proplen >= 20; proplen -= 20, addrs += 5, op_res++) {
struct resource *res;
unsigned long flags;
int i;
flags = pci_parse_of_flags(addrs[0]);
if (!flags)
continue;
i = addrs[0] & 0xff;
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " start: %llx, end: %llx, i: %x\n",
op_res->start, op_res->end, i);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
} else if (i == dev->rom_base_reg) {
res = &dev->resource[PCI_ROM_RESOURCE];
cleanup IORESOURCE_CACHEABLE vs ioremap() Quoting Arnd: I was thinking the opposite approach and basically removing all uses of IORESOURCE_CACHEABLE from the kernel. There are only a handful of them.and we can probably replace them all with hardcoded ioremap_cached() calls in the cases they are actually useful. All existing usages of IORESOURCE_CACHEABLE call ioremap() instead of ioremap_nocache() if the resource is cacheable, however ioremap() is uncached by default. Clearly none of the existing usages care about the cacheability. Particularly devm_ioremap_resource() never worked as advertised since it always fell back to plain ioremap(). Clean this up as the new direction we want is to convert ioremap_<type>() usages to memremap(..., flags). Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2015-08-11 11:07:06 +08:00
flags |= IORESOURCE_READONLY | IORESOURCE_SIZEALIGN;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
} else {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_err(dev, "bad cfg reg num 0x%x\n", i);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
continue;
}
res->start = op_res->start;
res->end = op_res->end;
res->flags = flags;
res->name = pci_name(dev);
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "reg 0x%x: %pR\n", i, res);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
}
sparc/pci: Refactor dev_archdata initialization into pci_init_dev_archdata The function pcibios_add_device() added by commit d0c31e020057 ("sparc/PCI: Fix for panic while enabling SR-IOV") initializes the dev_archdata by doing a memcpy from the PF. This has the problem that it erroneously copies the OF device without explicitly refcounting it. As David Miller pointed out: "Generally speaking we don't really support hot-plug for OF probed devices, but if we did all of the device tree pointers have to be refcounted properly." To fix this error, and also avoid code duplication, this patch creates a new helper function, pci_init_dev_archdata(), that initializes the fields in dev_archdata, and can be invoked by callers after they have taken the needed refcounts Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Tested-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-12 08:57:05 +08:00
static void pci_init_dev_archdata(struct dev_archdata *sd, void *iommu,
void *stc, void *host_controller,
struct platform_device *op,
int numa_node)
{
sd->iommu = iommu;
sd->stc = stc;
sd->host_controller = host_controller;
sd->op = op;
sd->numa_node = numa_node;
}
sparc64: Fix sparse warnings in pci.c 1) Declare pci_poke_* in pci_impl.h 2) of_create_pci_dev() should be static 3) ->setup_msi_irq() wants an unsigned int pointer not a plain int one 4) void value expression return in arch_teardown_msi_irq() Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-12 14:57:40 +08:00
static struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
struct device_node *node,
struct pci_bus *bus, int devfn)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
{
struct dev_archdata *sd;
sparc: remove references to of_device and to_of_device of_device is just a #define alias to platform_device. This patch replaces all references to it with platform_device. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David S. Miller <davem@davemloft.net>
2010-07-23 06:04:30 +08:00
struct platform_device *op;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_dev *dev;
const char *type;
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
u32 class;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
PCI: Convert alloc_pci_dev(void) to pci_alloc_dev(bus) Use the new pci_alloc_dev(bus) to replace the existing using of alloc_pci_dev(void). [bhelgaas: drop pci_bus ref later in pci_release_dev()] Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com> Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: David Airlie <airlied@linux.ie> Cc: Neela Syam Kolli <megaraidlinux@lsi.com> Cc: "James E.J. Bottomley" <JBottomley@parallels.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Andrew Morton <akpm@linux-foundation.org>
2013-05-25 21:48:31 +08:00
dev = pci_alloc_dev(bus);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (!dev)
return NULL;
sparc/pci: Refactor dev_archdata initialization into pci_init_dev_archdata The function pcibios_add_device() added by commit d0c31e020057 ("sparc/PCI: Fix for panic while enabling SR-IOV") initializes the dev_archdata by doing a memcpy from the PF. This has the problem that it erroneously copies the OF device without explicitly refcounting it. As David Miller pointed out: "Generally speaking we don't really support hot-plug for OF probed devices, but if we did all of the device tree pointers have to be refcounted properly." To fix this error, and also avoid code duplication, this patch creates a new helper function, pci_init_dev_archdata(), that initializes the fields in dev_archdata, and can be invoked by callers after they have taken the needed refcounts Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Tested-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-12 08:57:05 +08:00
op = of_find_device_by_node(node);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
sd = &dev->dev.archdata;
sparc/pci: Refactor dev_archdata initialization into pci_init_dev_archdata The function pcibios_add_device() added by commit d0c31e020057 ("sparc/PCI: Fix for panic while enabling SR-IOV") initializes the dev_archdata by doing a memcpy from the PF. This has the problem that it erroneously copies the OF device without explicitly refcounting it. As David Miller pointed out: "Generally speaking we don't really support hot-plug for OF probed devices, but if we did all of the device tree pointers have to be refcounted properly." To fix this error, and also avoid code duplication, this patch creates a new helper function, pci_init_dev_archdata(), that initializes the fields in dev_archdata, and can be invoked by callers after they have taken the needed refcounts Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Tested-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-12 08:57:05 +08:00
pci_init_dev_archdata(sd, pbm->iommu, &pbm->stc, pbm, op,
pbm->numa_node);
sparc64: Propagate PCI device archdata into OF device tree for EBUS. In order to convert EBUS drivers doing DMA into pure OF drivers, we need the of_device->dev.archdata setup properly. EBUS instances that can provide DMA for device nodes sit on PCI, so detect and propagate the information there. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-30 13:42:34 +08:00
sd = &op->dev.archdata;
[SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-07-28 13:39:14 +08:00
sd->iommu = pbm->iommu;
sd->stc = &pbm->stc;
[SPARC64]: NUMA device infrastructure. Record and propagate NUMA information for devices. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-03-19 19:52:48 +08:00
sd->numa_node = pbm->numa_node;
[SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-07-28 13:39:14 +08:00
sparc64: Propagate PCI device archdata into OF device tree for EBUS. In order to convert EBUS drivers doing DMA into pure OF drivers, we need the of_device->dev.archdata setup properly. EBUS instances that can provide DMA for device nodes sit on PCI, so detect and propagate the information there. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-08-30 13:42:34 +08:00
if (!strcmp(node->name, "ebus"))
of_propagate_archdata(op);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
type = of_get_property(node, "device_type", NULL);
if (type == NULL)
type = "";
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(bus," create device, devfn: %x, type: %s\n",
devfn, type);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
dev->sysdata = node;
dev->dev.parent = bus->bridge;
dev->dev.bus = &pci_bus_type;
pci/of: Match PCI devices to OF nodes dynamically powerpc has two different ways of matching PCI devices to their corresponding OF node (if any) for historical reasons. The ppc64 one does a scan looking for matching bus/dev/fn, while the ppc32 one does a scan looking only for matching dev/fn on each level in order to be agnostic to busses being renumbered (which Linux does on some platforms). This removes both and instead moves the matching code to the PCI core itself. It's the most logical place to do it: when a pci_dev is created, we know the parent and thus can do a single level scan for the matching device_node (if any). The benefit is that all archs now get the matching for free. There's one hook the arch might want to provide to match a PHB bus to its device node. A default weak implementation is provided that looks for the parent device device node, but it's not entirely reliable on powerpc for various reasons so powerpc provides its own. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-04-11 09:37:07 +08:00
dev->dev.of_node = of_node_get(node);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
dev->devfn = devfn;
dev->multifunction = 0; /* maybe a lie? */
sparc64: Sync of_create_pci_dev() with drivers/pci/probe.c changes. Mirrors powerpc commits bb209c8287d2d55ec4a67e3933346e0a3ee0da76 ("powerpc/pci: Add calls to set_pcie_port_type() and set_pcie_hotplug_bridge()") and 26b4a0ca46985ae9586c194f7859f3838b1230f8 ("powerpc/pci: Add missing hookup to pci_slot") We also need to initialize ->dma_mask explicitly here too. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-18 08:42:08 +08:00
set_pcie_port_type(dev);
PCI: Hold pci_slot_mutex while searching bus->slots list Previously, pci_setup_device() and similar functions searched the pci_bus->slots list without any locking. It was possible for another thread to update the list while we searched it. Add pci_dev_assign_slot() to search the list while holding pci_slot_mutex. [bhelgaas: changelog, fold in CONFIG_SYSFS fix] Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-07-17 17:16:32 +08:00
pci_dev_assign_slot(dev);
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
dev->vendor = of_getintprop_default(node, "vendor-id", 0xffff);
dev->device = of_getintprop_default(node, "device-id", 0xffff);
dev->subsystem_vendor =
of_getintprop_default(node, "subsystem-vendor-id", 0);
dev->subsystem_device =
of_getintprop_default(node, "subsystem-id", 0);
dev->cfg_size = pci_cfg_space_size(dev);
/* We can't actually use the firmware value, we have
* to read what is in the register right now. One
* reason is that in the case of IDE interfaces the
* firmware can sample the value before the the IDE
* interface is programmed into native mode.
*/
pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
dev->class = class >> 8;
dev->revision = class & 0xff;
sparc64: fix up bus_id changes in sparc core code This converts all instances of bus_id in the sparc core kernel to use either dev_set_name(), or dev_name() depending on the need. This is done in anticipation of removing the bus_id field from struct driver. Cc: Kay Sievers <kay.sievers@vrfy.org> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-05-02 12:02:41 +08:00
dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
[SPARC64]: Force dummy host controller onto bus zero. This helps deal with the invisible bridge that sits between the host controller and the top-most visisble PCI devices on hypervisor systems. For example, on T1000 the bus-range property says 2 --> 4 and so there is a PCI express bridge at bus 2, devfn 0, etc. So if we don't force the dummy host controller to bus zero, we'll try to create two devices with the same domain/bus/devfn triplet. Also, add some more log diagnostics to make debugging stuff like this easyer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-13 10:40:26 +08:00
[SPARC64]: SUN4U PCI-E controller support. Some minor refactoring in the generic code was necessary for this: 1) This controller requires 8-byte access to the interrupt map and clear register. They are 64-bits on all the other SBUS and PCI controllers anyways, so this was easy to cure. 2) The IMAP register has a different layout and some bits that we need to preserve, so use a read/modify/write when making changes to the IMAP register in generic code. 3) Flushing the entire IOMMU TLB is best done with a single write to a register on this PCI controller, add a iommu->iommu_flushinv for this. Still lacks MSI support, that will come later. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-03 08:31:36 +08:00
/* I have seen IDE devices which will not respond to
* the bmdma simplex check reads if bus mastering is
* disabled.
*/
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
pci_set_master(dev);
sparc/PCI: Use PCI_UNKNOWN for unknown power state Previously we initialized dev->current_state to 4 (PCI_D3cold), but I think we wanted PCI_UNKNOWN (5) here based on the comment and the fact that the generic version of this code, pci_setup_device(), uses PCI_UNKNOWN. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net>
2013-05-21 07:15:20 +08:00
dev->current_state = PCI_UNKNOWN; /* unknown power state */
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
dev->error_state = pci_channel_io_normal;
sparc64: Sync of_create_pci_dev() with drivers/pci/probe.c changes. Mirrors powerpc commits bb209c8287d2d55ec4a67e3933346e0a3ee0da76 ("powerpc/pci: Add calls to set_pcie_port_type() and set_pcie_hotplug_bridge()") and 26b4a0ca46985ae9586c194f7859f3838b1230f8 ("powerpc/pci: Add missing hookup to pci_slot") We also need to initialize ->dma_mask explicitly here too. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-18 08:42:08 +08:00
dev->dma_mask = 0xffffffff;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
sparc64: Fix missing devices due to PCI bridge test in of_create_pci_dev(). Just like in the arch/sparc64/kernel/of_device.c code fix commit 071d7f4c3b411beae08d27656e958070c43b78b4 ("sparc64: Fix SMP bootup with CONFIG_STACK_DEBUG or ftrace.") we have to check the OF device node name for "pci" instead of relying upon the 'device_type' property being there on all PCI bridges. Tested by Meelis Roos, and confirmed to make the PCI QFE devices reappear on the E3500 system. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-23 06:42:24 +08:00
if (!strcmp(node->name, "pci")) {
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
/* a PCI-PCI bridge */
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
dev->rom_base_reg = PCI_ROM_ADDRESS1;
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
} else if (!strcmp(type, "cardbus")) {
dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
} else {
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
dev->rom_base_reg = PCI_ROM_ADDRESS;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
sparc/of: Move of_device fields into struct pdev_archdata This patch moves SPARC architecture specific data members out of struct of_device and into the pdev_archdata structure. The reason for this change is to unify the struct of_device definition amongst all the architectures. It also remvoes the .sysdata, .slot, .portid and .clock_freq properties because they aren't actually used by anything. A subsequent patch will replace struct of_device entirely with struct platform_device and the of_platform support code will share common routines with the platform bus (but the bus instances themselves can remain separate). This patch also adds 'struct resources *resource' and num_resources to match the fields defined in struct platform_device. After this change, 'struct platform_device' can be used as a drop-in replacement for 'struct of_platform'. This change is in preparation for merging the of_platform_bus_type with the platform_bus_type. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David S. Miller <davem@davemloft.net> Cc: Stephen Rothwell <sfr@canb.auug.org.au>
2010-06-19 01:09:58 +08:00
dev->irq = sd->op->archdata.irqs[0];
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
if (dev->irq == 0xffffffff)
dev->irq = PCI_IRQ_NONE;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "[%04x:%04x] type %02x class %#08x\n",
dev->vendor, dev->device, dev->hdr_type, dev->class);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
pci_parse_of_addrs(sd->op, node, dev);
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " adding to system ...\n");
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
pci_device_add(dev, bus);
return dev;
}
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
{
u32 idx, first, last;
first = 8;
last = 0;
for (idx = 0; idx < 8; idx++) {
if ((map & (1 << idx)) != 0) {
if (first > idx)
first = idx;
if (last < idx)
last = idx;
}
}
*first_p = first;
*last_p = last;
}
/* Cook up fake bus resources for SUNW,simba PCI bridges which lack
* a proper 'ranges' property.
*/
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void apb_fake_ranges(struct pci_dev *dev,
struct pci_bus *bus,
struct pci_pbm_info *pbm)
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
{
sparc/PCI: convert devtree and arch-probed bus addresses to resource Normal PCI enumeration via PCI config space uses __pci_read_base(), where the PCI core applies any bus-to-resource offset. But sparc sometimes reads PCI config space itself, and sometimes it gets addresses from the device tree. In ac1edcc579b6, I converted sparc to use the PCI core bus-to-resource conversion, but I missed these sparc-specific paths. I don't have a way to test it, but I think sparc is broken between that commit and this one. This patch replaces the sparc-specific pci_resource_adjust() with the generic pcibios_bus_to_resource() in the following paths: pci_cfg_fake_ranges() (addresses read from PCI config) apb_fake_ranges() (addresses computed based on PCI config) of_scan_pci_bridge() (addresses from OF "ranges" property) N.B.: Resources of non-P2P bridge devices are set in pci_parse_of_addrs() and, as far as I can see, never converted to CPU addresses. I do not understand why these would be treated differently than bridge windows. CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-03-17 07:48:24 +08:00
struct pci_bus_region region;
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
struct resource *res;
u32 first, last;
u8 map;
pci_read_config_byte(dev, APB_IO_ADDRESS_MAP, &map);
apb_calc_first_last(map, &first, &last);
res = bus->resource[0];
res->flags = IORESOURCE_IO;
sparc/PCI: convert devtree and arch-probed bus addresses to resource Normal PCI enumeration via PCI config space uses __pci_read_base(), where the PCI core applies any bus-to-resource offset. But sparc sometimes reads PCI config space itself, and sometimes it gets addresses from the device tree. In ac1edcc579b6, I converted sparc to use the PCI core bus-to-resource conversion, but I missed these sparc-specific paths. I don't have a way to test it, but I think sparc is broken between that commit and this one. This patch replaces the sparc-specific pci_resource_adjust() with the generic pcibios_bus_to_resource() in the following paths: pci_cfg_fake_ranges() (addresses read from PCI config) apb_fake_ranges() (addresses computed based on PCI config) of_scan_pci_bridge() (addresses from OF "ranges" property) N.B.: Resources of non-P2P bridge devices are set in pci_parse_of_addrs() and, as far as I can see, never converted to CPU addresses. I do not understand why these would be treated differently than bridge windows. CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-03-17 07:48:24 +08:00
region.start = (first << 21);
region.end = (last << 21) + ((1 << 21) - 1);
PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev These interfaces: pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource) pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region) took a pci_dev, but they really depend only on the pci_bus. And we want to use them in resource allocation paths where we have the bus but not a device, so this patch converts them to take the pci_bus instead of the pci_dev: pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource) pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region) In fact, with standard PCI-PCI bridges, they only depend on the host bridge, because that's the only place address translation occurs, but we aren't going that far yet. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-10 14:54:40 +08:00
pcibios_bus_to_resource(dev->bus, res, &region);
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
apb_calc_first_last(map, &first, &last);
res = bus->resource[1];
res->flags = IORESOURCE_MEM;
sparc: PCI: Fix incorrect address calculation of PCI Bridge windows on Simba-bridges The SIMBA APB Bridges lacks the 'ranges' of-property describing the PCI I/O and memory areas located beneath the bridge. Faking this information has been performed by reading range registers in the APB bridge, and calculating the corresponding areas. In commit 01f94c4a6ced476ce69b895426fc29bfc48c69bd ("Fix sabre pci controllers with new probing scheme.") a bug was introduced into this calculation, causing the PCI memory areas to be calculated incorrectly: The shift size was set to be identical for I/O and MEM ranges, which is incorrect. This patch set the shift size of the MEM range back to the value used before 01f94c4a6ced476ce69b895426fc29bfc48c69bd. Signed-off-by: Kjetil Oftedal <oftedal@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-10-19 04:28:29 +08:00
region.start = (first << 29);
region.end = (last << 29) + ((1 << 29) - 1);
PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev These interfaces: pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource) pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region) took a pci_dev, but they really depend only on the pci_bus. And we want to use them in resource allocation paths where we have the bus but not a device, so this patch converts them to take the pci_bus instead of the pci_dev: pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource) pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region) In fact, with standard PCI-PCI bridges, they only depend on the host bridge, because that's the only place address translation occurs, but we aren't going that far yet. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-10 14:54:40 +08:00
pcibios_bus_to_resource(dev->bus, res, &region);
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
}
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void pci_of_scan_bus(struct pci_pbm_info *pbm,
struct device_node *node,
struct pci_bus *bus);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
#define GET_64BIT(prop, i) ((((u64) (prop)[(i)]) << 32) | (prop)[(i)+1])
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void of_scan_pci_bridge(struct pci_pbm_info *pbm,
struct device_node *node,
struct pci_dev *dev)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
{
struct pci_bus *bus;
const u32 *busrange, *ranges;
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
int len, i, simba;
sparc/PCI: convert devtree and arch-probed bus addresses to resource Normal PCI enumeration via PCI config space uses __pci_read_base(), where the PCI core applies any bus-to-resource offset. But sparc sometimes reads PCI config space itself, and sometimes it gets addresses from the device tree. In ac1edcc579b6, I converted sparc to use the PCI core bus-to-resource conversion, but I missed these sparc-specific paths. I don't have a way to test it, but I think sparc is broken between that commit and this one. This patch replaces the sparc-specific pci_resource_adjust() with the generic pcibios_bus_to_resource() in the following paths: pci_cfg_fake_ranges() (addresses read from PCI config) apb_fake_ranges() (addresses computed based on PCI config) of_scan_pci_bridge() (addresses from OF "ranges" property) N.B.: Resources of non-P2P bridge devices are set in pci_parse_of_addrs() and, as far as I can see, never converted to CPU addresses. I do not understand why these would be treated differently than bridge windows. CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-03-17 07:48:24 +08:00
struct pci_bus_region region;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct resource *res;
unsigned int flags;
u64 size;
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "of_scan_pci_bridge(%s)\n", node->full_name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
/* parse bus-range property */
busrange = of_get_property(node, "bus-range", &len);
if (busrange == NULL || len != 8) {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "Can't get bus-range for PCI-PCI bridge %s\n",
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
node->full_name);
return;
}
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " Bridge bus range [%u --> %u]\n",
busrange[0], busrange[1]);
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
ranges = of_get_property(node, "ranges", &len);
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
simba = 0;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (ranges == NULL) {
[SPARC64]: Fix PCI rework to adhere to of_get_property() const return. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-29 16:50:16 +08:00
const char *model = of_get_property(node, "model", NULL);
[SPARC64]: Handle PCI bridges without 'ranges' property. This fixes the IDE controller not showing up on Netra-T1 systems. Just like Simba bridges, some PCI bridges can lack the 'ranges' OBP property. So we handle this similarly to the existing Simba code: 1) In of_device register address resolving, we push the translation to the parent. 2) In PCI device scanning, we interrogate the PCI config space registers of the PCI bus device in order to resolve the resources, just like the generic Linux PCI probing code does. With much help and testing from Fabio, who also reported the initial problem. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Fabio Massimo Di Nitto <fabbione@ubuntu.com>
2007-06-08 12:59:44 +08:00
if (model && !strcmp(model, "SUNW,simba"))
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
simba = 1;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
if (!bus) {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_err(dev, "Failed to create pci bus for %s\n",
node->full_name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
return;
}
bus->primary = dev->bus->number;
sparc/PCI: register busn_res for root buses Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog, fix "pci_last_busn" typo] Acked-by: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-05-18 09:51:12 +08:00
pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
bus->bridge_ctl = 0;
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " Bridge ranges[%p] simba[%d]\n",
ranges, simba);
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
/* parse ranges property, or cook one up by hand for Simba */
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
/* PCI #address-cells == 3 and #size-cells == 2 always */
res = &dev->resource[PCI_BRIDGE_RESOURCES];
for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
res->flags = 0;
bus->resource[i] = res;
++res;
}
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
if (simba) {
apb_fake_ranges(dev, bus, pbm);
[SPARC64]: Handle PCI bridges without 'ranges' property. This fixes the IDE controller not showing up on Netra-T1 systems. Just like Simba bridges, some PCI bridges can lack the 'ranges' OBP property. So we handle this similarly to the existing Simba code: 1) In of_device register address resolving, we push the translation to the parent. 2) In PCI device scanning, we interrogate the PCI config space registers of the PCI bus device in order to resolve the resources, just like the generic Linux PCI probing code does. With much help and testing from Fabio, who also reported the initial problem. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Fabio Massimo Di Nitto <fabbione@ubuntu.com>
2007-06-08 12:59:44 +08:00
goto after_ranges;
} else if (ranges == NULL) {
sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases() The generic code to read P2P bridge windows is functionally equivalent to the sparc-specific pci_cfg_fake_ranges(), so use the generic code. The "if (!res->start) res->start = ..." removed from the I/O window code here was an artifact of the Intel 1K window support from 9d265124d051 and is no longer necessary (it probably was just cloned from x86 and was never useful on sparc). Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-07-10 03:39:52 +08:00
pci_read_bridge_bases(bus);
[SPARC64]: Handle PCI bridges without 'ranges' property. This fixes the IDE controller not showing up on Netra-T1 systems. Just like Simba bridges, some PCI bridges can lack the 'ranges' OBP property. So we handle this similarly to the existing Simba code: 1) In of_device register address resolving, we push the translation to the parent. 2) In PCI device scanning, we interrogate the PCI config space registers of the PCI bus device in order to resolve the resources, just like the generic Linux PCI probing code does. With much help and testing from Fabio, who also reported the initial problem. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Fabio Massimo Di Nitto <fabbione@ubuntu.com>
2007-06-08 12:59:44 +08:00
goto after_ranges;
[SPARC64]: Fix sabre pci controllers with new probing scheme. The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-05 04:53:19 +08:00
}
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
i = 1;
for (; len >= 32; len -= 32, ranges += 8) {
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
u64 start;
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " RAW Range[%08x:%08x:%08x:%08x:%08x:%08x:"
"%08x:%08x]\n",
ranges[0], ranges[1], ranges[2], ranges[3],
ranges[4], ranges[5], ranges[6], ranges[7]);
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
flags = pci_parse_of_flags(ranges[0]);
size = GET_64BIT(ranges, 6);
if (flags == 0 || size == 0)
continue;
sparc64: Skip bogus PCI bridge ranges. It seems that when a PCI Express bridge is not in use and has no devices behind it, the ranges property is bogus. Specifically the size property is of the form [0xffffffff:...], and if you add this size to the resource start address the 64-bit calculation will overflow. Just check specifically for this size value signature and skip them. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:27:01 +08:00
/* On PCI-Express systems, PCI bridges that have no devices downstream
* have a bogus size value where the first 32-bit cell is 0xffffffff.
* This results in a bogus range where start + size overflows.
*
* Just skip these otherwise the kernel will complain when the resource
* tries to be claimed.
*/
if (size >> 32 == 0xffffffff)
continue;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (flags & IORESOURCE_IO) {
res = bus->resource[0];
if (res->flags) {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_err(dev, "ignoring extra I/O range"
" for bridge %s\n", node->full_name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
continue;
}
} else {
if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_err(dev, "too many memory ranges"
" for bridge %s\n", node->full_name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
continue;
}
res = bus->resource[i];
++i;
}
res->flags = flags;
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
region.start = start = GET_64BIT(ranges, 1);
sparc/PCI: convert devtree and arch-probed bus addresses to resource Normal PCI enumeration via PCI config space uses __pci_read_base(), where the PCI core applies any bus-to-resource offset. But sparc sometimes reads PCI config space itself, and sometimes it gets addresses from the device tree. In ac1edcc579b6, I converted sparc to use the PCI core bus-to-resource conversion, but I missed these sparc-specific paths. I don't have a way to test it, but I think sparc is broken between that commit and this one. This patch replaces the sparc-specific pci_resource_adjust() with the generic pcibios_bus_to_resource() in the following paths: pci_cfg_fake_ranges() (addresses read from PCI config) apb_fake_ranges() (addresses computed based on PCI config) of_scan_pci_bridge() (addresses from OF "ranges" property) N.B.: Resources of non-P2P bridge devices are set in pci_parse_of_addrs() and, as far as I can see, never converted to CPU addresses. I do not understand why these would be treated differently than bridge windows. CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-03-17 07:48:24 +08:00
region.end = region.start + size - 1;
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " Using flags[%08x] start[%016llx] size[%016llx]\n",
flags, start, size);
sparc64: Expand PCI bridge probing debug logging. Dump the various aspects of the PCI bridge probed at boot time, most importantly the bridge number ranges, and the ranges property. This helps diagnose PCI resource issues and other problems by giving ofpci_debug=1 on the boot command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:22:39 +08:00
PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev These interfaces: pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource) pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region) took a pci_dev, but they really depend only on the pci_bus. And we want to use them in resource allocation paths where we have the bus but not a device, so this patch converts them to take the pci_bus instead of the pci_dev: pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource) pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region) In fact, with standard PCI-PCI bridges, they only depend on the host bridge, because that's the only place address translation occurs, but we aren't going that far yet. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-10 14:54:40 +08:00
pcibios_bus_to_resource(dev->bus, res, &region);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
[SPARC64]: Handle PCI bridges without 'ranges' property. This fixes the IDE controller not showing up on Netra-T1 systems. Just like Simba bridges, some PCI bridges can lack the 'ranges' OBP property. So we handle this similarly to the existing Simba code: 1) In of_device register address resolving, we push the translation to the parent. 2) In PCI device scanning, we interrogate the PCI config space registers of the PCI bus device in order to resolve the resources, just like the generic Linux PCI probing code does. With much help and testing from Fabio, who also reported the initial problem. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Fabio Massimo Di Nitto <fabbione@ubuntu.com>
2007-06-08 12:59:44 +08:00
after_ranges:
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
bus->number);
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, " bus name: %s\n", bus->name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
pci_of_scan_bus(pbm, node, bus);
}
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void pci_of_scan_bus(struct pci_pbm_info *pbm,
struct device_node *node,
struct pci_bus *bus)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
{
struct device_node *child;
const u32 *reg;
[SPARC64]: Fix booting on V100 systems. On the root PCI bus, the OBP device tree lists device 3 twice. Once as 'pm' and once as 'lomp'. Everything goes downhill from there. Ignore the second instance to workaround this. Thanks to Kövedi_Krisztián for the bug report and testing the fix. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-09-12 16:15:59 +08:00
int reglen, devfn, prev_devfn;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_dev *dev;
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(bus, "scan_bus[%s] bus no %d\n",
node->full_name, bus->number);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
child = NULL;
[SPARC64]: Fix booting on V100 systems. On the root PCI bus, the OBP device tree lists device 3 twice. Once as 'pm' and once as 'lomp'. Everything goes downhill from there. Ignore the second instance to workaround this. Thanks to Kövedi_Krisztián for the bug report and testing the fix. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-09-12 16:15:59 +08:00
prev_devfn = -1;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
while ((child = of_get_next_child(node, child)) != NULL) {
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(bus, " * %s\n", child->full_name);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
reg = of_get_property(child, "reg", &reglen);
if (reg == NULL || reglen < 20)
continue;
[SPARC64]: Fix booting on V100 systems. On the root PCI bus, the OBP device tree lists device 3 twice. Once as 'pm' and once as 'lomp'. Everything goes downhill from there. Ignore the second instance to workaround this. Thanks to Kövedi_Krisztián for the bug report and testing the fix. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-09-12 16:15:59 +08:00
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
devfn = (reg[0] >> 8) & 0xff;
[SPARC64]: Fix booting on V100 systems. On the root PCI bus, the OBP device tree lists device 3 twice. Once as 'pm' and once as 'lomp'. Everything goes downhill from there. Ignore the second instance to workaround this. Thanks to Kövedi_Krisztián for the bug report and testing the fix. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-09-12 16:15:59 +08:00
/* This is a workaround for some device trees
* which list PCI devices twice. On the V100
* for example, device number 3 is listed twice.
* Once as "pm" and once again as "lomp".
*/
if (devfn == prev_devfn)
continue;
prev_devfn = devfn;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
/* create a new pci_dev for this device */
sparc64: Stop creating dummy root PCI host controller devices. It just creates confusion, errors, and bugs. For one thing, this can cause dup sysfs or procfs nodes to get created: [ 1.198015] proc_dir_entry '00.0' already registered [ 1.198036] Call Trace: [ 1.198052] [00000000004f2534] create_proc_entry+0x7c/0x98 [ 1.198092] [00000000005719e4] pci_proc_attach_device+0xa4/0xd4 [ 1.198126] [00000000007d991c] pci_proc_init+0x64/0x88 [ 1.198158] [00000000007c62a4] kernel_init+0x190/0x330 [ 1.198183] [0000000000426cf8] kernel_thread+0x38/0x48 [ 1.198210] [00000000006a0d90] rest_init+0x18/0x5c Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-01 16:12:40 +08:00
dev = of_create_pci_dev(pbm, child, bus, devfn);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (!dev)
continue;
[SPARC64]: PCI device scan is way too verbose by default. These messages were very useful when bringing up the OBP based PCI device scan code, but it's just a lot of noise every bootup now especially on big machines. The messages can be re-enabled via 'ofpci_debug=1' on the kernel command line. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-22 16:24:14 +08:00
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "dev header type: %x\n", dev->hdr_type);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
sparc/PCI: Use pci_is_bridge() to simplify code Use pci_is_bridge() to simplify code. No functional change. Requires: 326c1cdae741 PCI: Rename pci_is_bridge() to pci_has_subordinate() Requires: 1c86438c9423 PCI: Add new pci_is_bridge() interface Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net>
2014-05-04 12:23:42 +08:00
if (pci_is_bridge(dev))
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
of_scan_pci_bridge(pbm, child, dev);
}
}
static ssize_t
show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * buf)
{
struct pci_dev *pdev;
struct device_node *dp;
pdev = to_pci_dev(dev);
of: Always use 'struct device.of_node' to get device node pointer. The following structure elements duplicate the information in 'struct device.of_node' and so are being eliminated. This patch makes all readers of these elements use device.of_node instead. (struct of_device *)->node (struct dev_archdata *)->prom_node (sparc) (struct dev_archdata *)->of_node (powerpc & microblaze) Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-04-14 07:12:29 +08:00
dp = pdev->dev.of_node;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
return snprintf (buf, PAGE_SIZE, "%s\n", dp->full_name);
}
static DEVICE_ATTR(obppath, S_IRUSR | S_IRGRP | S_IROTH, show_pciobppath_attr, NULL);
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void pci_bus_register_of_sysfs(struct pci_bus *bus)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
{
struct pci_dev *dev;
[SPARC64]: Fix obppath pci device sysfs creation. Need to traverse recursively down child busses else we only get the file created under devices at the top-level. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-02 03:46:13 +08:00
struct pci_bus *child_bus;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
int err;
list_for_each_entry(dev, &bus->devices, bus_list) {
/* we don't really care if we can create this file or
* not, but we need to assign the result of the call
* or the world will fall under alien invasion and
* everybody will be frozen on a spaceship ready to be
* eaten on alpha centauri by some green and jelly
* humanoid.
*/
err = sysfs_create_file(&dev->dev.kobj, &dev_attr_obppath.attr);
sparc64: Fix build errors with gcc-4.6.0 Most of the warnings emitted (we fail arch/sparc file builds with -Werror) were legitimate but harmless, however one case (n2_pcr_write) was a genuine bug. Based almost entirely upon a patch by Sam Ravnborg. Reported-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-02-27 15:40:02 +08:00
(void) err;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
[SPARC64]: Fix obppath pci device sysfs creation. Need to traverse recursively down child busses else we only get the file created under devices at the top-level. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-02 03:46:13 +08:00
list_for_each_entry(child_bus, &bus->children, node)
pci_bus_register_of_sysfs(child_bus);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
}
sparc/PCI: Request legacy VGA framebuffer only for VGA devices Previously we unconditionally requested the legacy VGA framebuffer (bus address 0xa0000-0xbffff) before we even know what PCI devices are present, in these paths: pci_fire_pbm_init, schizo_pbm_init, pci_sun4v_pbm_init, psycho_pbm_init_common pci_determine_mem_io_space pci_register_legacy_regions p->start = mem_res->start + 0xa0000 request_resource(mem_res, p) # claim VGA framebuffer pci_scan_one_pbm pci_of_scan_bus # scan DT for PCI devices pci_claim_bus_resources # claim PCI device BARs If we found a PCI device with a BAR or bridge window that overlapped the framebuffer area, we complained about not being able to claim the BAR, e.g., pci 0000:00:01.0: can't claim BAR 8 [mem 0x1ff00000000-0x1ffbfffffff]: address conflict with Video RAM area [??? 0x1ff000a0000-0x1ff000bffff flags 0x80000000] pci 0000:02:01.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:03:0f.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:04:04.0: can't claim BAR 1 [mem 0x1ff02808000-0x1ff02808fff]: no compatible bridge window This may make the conflicting device unusable because we try not to enable devices that have unassigned or conflicting BARs, e.g., qla1280 0000:04:04.0: can't ioremap BAR 1: [mem size 0x00001000] qla1280: Unable to map I/O memory If there is no VGA device in the same PCI segment, there's no reason to reserve the framebuffer and there's no conflict. If there *is* a VGA device in the same segment, both the VGA device and the device with an overlapping BAR may respond to the framebuffer addresses, which may cause bus errors. Request the legacy framebuffer area only when we actually find a VGA device. The fact that VGA devices use the legacy framebuffer even though it's not reported in a BAR is not sparc-specific, so the reservation of that area could be made more generic in the PCI core eventually. Note that on some systems, e.g., Blade 100, we still report a conflict between an ISA bridge (00:07.0) and a VGA device (00:13.0): pci_bus 0000:00: root bus resource [mem 0x1ff00000000-0x1ffffffffff] (bus address [0x00000000-0xffffffff]) pci 0000:00:07.0: reg 0x14: [mem 0x1ff00000000-0x1ff000fffff] pci 0000:00:13.0: can't claim VGA legacy [mem 0x1ff000a0000-0x1ff000bffff]: address conflict with 0000:00:07.0 [mem 0x1ff00000000-0x1ff000fffff] This is probably harmless, but if the VGA device and something behind the ISA bridge both responded to reads of the framebuffer, it would cause a bus error. Link: https://lkml.kernel.org/r/alpine.LRH.2.21.1804112323170.25495@math.ut.ee Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=117191#c35 Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-10 21:47:34 +08:00
static void pci_claim_legacy_resources(struct pci_dev *dev)
{
struct pci_bus_region region;
struct resource *p, *root, *conflict;
if ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
return;
p = kzalloc(sizeof(*p), GFP_KERNEL);
if (!p)
return;
p->name = "Video RAM area";
p->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
region.start = 0xa0000UL;
region.end = region.start + 0x1ffffUL;
pcibios_bus_to_resource(dev->bus, p, &region);
root = pci_find_parent_resource(dev, p);
if (!root) {
pci_info(dev, "can't claim VGA legacy %pR: no compatible bridge window\n", p);
goto err;
}
conflict = request_resource_conflict(root, p);
if (conflict) {
pci_info(dev, "can't claim VGA legacy %pR: address conflict with %s %pR\n",
p, conflict->name, conflict);
goto err;
}
pci_info(dev, "VGA legacy framebuffer %pR\n", p);
return;
err:
kfree(p);
}
sparc64: Properly claim resources as each PCI bus is probed. Perform a pci_claim_resource() on all valid resources discovered during the OF device tree scan. Based almost entirely upon the PCI OF bus probing code which does the same thing there. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:29:09 +08:00
static void pci_claim_bus_resources(struct pci_bus *bus)
{
struct pci_bus *child_bus;
struct pci_dev *dev;
list_for_each_entry(dev, &bus->devices, bus_list) {
int i;
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
if (r->parent || !r->start || !r->flags)
continue;
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "Claiming Resource %d: %pR\n",
i, r);
sparc64: Properly claim resources as each PCI bus is probed. Perform a pci_claim_resource() on all valid resources discovered during the OF device tree scan. Based almost entirely upon the PCI OF bus probing code which does the same thing there. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:29:09 +08:00
Revert "sparc/PCI: Clip bridge windows to fit in upstream windows" This reverts commit d63e2e1f3df904bf6bd150bdafb42ddbb3257ea8. David Ahern reported that d63e2e1f3df9 breaks booting on an 8-socket T5 sparc system. He also verified that the system boots with d63e2e1f3df9 reverted. Yinghai has some fixes, but they need a little more polishing than we can do before v4.0. Link: http://lkml.kernel.org/r/5514391F.2030300@oracle.com # report Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org # patches Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.19+
2015-04-08 23:04:55 +08:00
pci_claim_resource(dev, i);
sparc64: Properly claim resources as each PCI bus is probed. Perform a pci_claim_resource() on all valid resources discovered during the OF device tree scan. Based almost entirely upon the PCI OF bus probing code which does the same thing there. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:29:09 +08:00
}
sparc/PCI: Request legacy VGA framebuffer only for VGA devices Previously we unconditionally requested the legacy VGA framebuffer (bus address 0xa0000-0xbffff) before we even know what PCI devices are present, in these paths: pci_fire_pbm_init, schizo_pbm_init, pci_sun4v_pbm_init, psycho_pbm_init_common pci_determine_mem_io_space pci_register_legacy_regions p->start = mem_res->start + 0xa0000 request_resource(mem_res, p) # claim VGA framebuffer pci_scan_one_pbm pci_of_scan_bus # scan DT for PCI devices pci_claim_bus_resources # claim PCI device BARs If we found a PCI device with a BAR or bridge window that overlapped the framebuffer area, we complained about not being able to claim the BAR, e.g., pci 0000:00:01.0: can't claim BAR 8 [mem 0x1ff00000000-0x1ffbfffffff]: address conflict with Video RAM area [??? 0x1ff000a0000-0x1ff000bffff flags 0x80000000] pci 0000:02:01.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:03:0f.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:04:04.0: can't claim BAR 1 [mem 0x1ff02808000-0x1ff02808fff]: no compatible bridge window This may make the conflicting device unusable because we try not to enable devices that have unassigned or conflicting BARs, e.g., qla1280 0000:04:04.0: can't ioremap BAR 1: [mem size 0x00001000] qla1280: Unable to map I/O memory If there is no VGA device in the same PCI segment, there's no reason to reserve the framebuffer and there's no conflict. If there *is* a VGA device in the same segment, both the VGA device and the device with an overlapping BAR may respond to the framebuffer addresses, which may cause bus errors. Request the legacy framebuffer area only when we actually find a VGA device. The fact that VGA devices use the legacy framebuffer even though it's not reported in a BAR is not sparc-specific, so the reservation of that area could be made more generic in the PCI core eventually. Note that on some systems, e.g., Blade 100, we still report a conflict between an ISA bridge (00:07.0) and a VGA device (00:13.0): pci_bus 0000:00: root bus resource [mem 0x1ff00000000-0x1ffffffffff] (bus address [0x00000000-0xffffffff]) pci 0000:00:07.0: reg 0x14: [mem 0x1ff00000000-0x1ff000fffff] pci 0000:00:13.0: can't claim VGA legacy [mem 0x1ff000a0000-0x1ff000bffff]: address conflict with 0000:00:07.0 [mem 0x1ff00000000-0x1ff000fffff] This is probably harmless, but if the VGA device and something behind the ISA bridge both responded to reads of the framebuffer, it would cause a bus error. Link: https://lkml.kernel.org/r/alpine.LRH.2.21.1804112323170.25495@math.ut.ee Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=117191#c35 Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-10 21:47:34 +08:00
pci_claim_legacy_resources(dev);
sparc64: Properly claim resources as each PCI bus is probed. Perform a pci_claim_resource() on all valid resources discovered during the OF device tree scan. Based almost entirely upon the PCI OF bus probing code which does the same thing there. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:29:09 +08:00
}
list_for_each_entry(child_bus, &bus->children, node)
pci_claim_bus_resources(child_bus);
}
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
struct device *parent)
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
{
sparc/PCI: convert to pci_create_root_bus() Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because sparc fixed the resources before scanning the bus, but it makes sparc more consistent with other architectures. v2: fix build error (from sfr) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-29 06:27:53 +08:00
LIST_HEAD(resources);
of: Always use 'struct device.of_node' to get device node pointer. The following structure elements duplicate the information in 'struct device.of_node' and so are being eliminated. This patch makes all readers of these elements use device.of_node instead. (struct of_device *)->node (struct dev_archdata *)->prom_node (sparc) (struct dev_archdata *)->of_node (powerpc & microblaze) Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-04-14 07:12:29 +08:00
struct device_node *node = pbm->op->dev.of_node;
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_bus *bus;
printk("PCI: Scanning PBM %s\n", node->full_name);
sparc/PCI: get rid of device resource fixups Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. N.B. Leon apparently never uses initial BAR values, so it didn't matter that we never fixed up the I/O resources from bus address to CPU addresses. Other sparc uses pci_of_scan_bus(), which sets device resources directly to CPU addresses, not bus addresses, so it didn't need pcibios_fixup_bus() either. But by telling the core about the offsets, we can nuke pcibios_resource_to_bus(). CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-02-24 11:19:04 +08:00
pci_add_resource_offset(&resources, &pbm->io_space,
sparc/PCI: Support arbitrary host bridge address offset Add support for arbitrary bus address offset. Previously we ignored the child (PCI) address in the "ranges" property and assumed it was always zero. That means every host bridge window mapped to PCI bus address zero, e.g., pci_bus 0000:00: root bus resource [mem 0x2000000000000-0x200007fffffff] (bus address [0x00000000-0x7fffffff]) But some systems have host bridge windows with non-zero child addresses, so parse the child address and compute the offset between the parent (CPU) and child (PCI) addresses. This allows windows like these: /pci@305: PCI MEM [mem 0x2000000100000-0x200007effffff] offset 2000000000000 pci_sun4v f02ae7f8: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x2000000100000-0x200007effffff] (bus address [0x00100000-0x7effffff]) [bhelgaas: changelog] Tested-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: sparclinux@vger.kernel.org
2017-04-21 13:04:48 +08:00
pbm->io_offset);
sparc/PCI: get rid of device resource fixups Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. N.B. Leon apparently never uses initial BAR values, so it didn't matter that we never fixed up the I/O resources from bus address to CPU addresses. Other sparc uses pci_of_scan_bus(), which sets device resources directly to CPU addresses, not bus addresses, so it didn't need pcibios_fixup_bus() either. But by telling the core about the offsets, we can nuke pcibios_resource_to_bus(). CC: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-02-24 11:19:04 +08:00
pci_add_resource_offset(&resources, &pbm->mem_space,
sparc/PCI: Support arbitrary host bridge address offset Add support for arbitrary bus address offset. Previously we ignored the child (PCI) address in the "ranges" property and assumed it was always zero. That means every host bridge window mapped to PCI bus address zero, e.g., pci_bus 0000:00: root bus resource [mem 0x2000000000000-0x200007fffffff] (bus address [0x00000000-0x7fffffff]) But some systems have host bridge windows with non-zero child addresses, so parse the child address and compute the offset between the parent (CPU) and child (PCI) addresses. This allows windows like these: /pci@305: PCI MEM [mem 0x2000000100000-0x200007effffff] offset 2000000000000 pci_sun4v f02ae7f8: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x2000000100000-0x200007effffff] (bus address [0x00100000-0x7effffff]) [bhelgaas: changelog] Tested-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: sparclinux@vger.kernel.org
2017-04-21 13:04:48 +08:00
pbm->mem_offset);
sparc/PCI: Add mem64 resource parsing for root bus David reported that a T5-8 sparc system failed to boot with: pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff]) pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff]) pci 0000:00:01.0: can't claim BAR 15 [mem 0x100000000-0x4afffffff pref]: no compatible bridge window Note that we don't know about a host bridge aperture that contains BAR 15. OF does report a MEM64 aperture, but before this patch, pci_determine_mem_io_space() ignored it. Add support for host bridge apertures with 64-bit PCI addresses. Also set IORESOURCE_MEM_64 for PCI device and bridge resources in PCI 64-bit memory space. Sparc doesn't actually print the device and bridge resources, but after this patch, we should have the equivalent of this: pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [io 0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff]) pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff]) pci_bus 0000:00: root bus resource [mem 0x800100000000-0x8007ffffffff] (bus address [0x100000000-0x7ffffffff]) pci 0000:00:01.0: bridge window [mem 0x800100000000-0x8004afffffff 64bit pref] [bhelgaas: changelog, URL to David's report] Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows") Link: http://lkml.kernel.org/r/5514391F.2030300@oracle.com Reported-by: David Ahern <david.ahern@oracle.com> Tested-by: David Ahern <david.ahern@oracle.com> Tested-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-10-21 00:36:53 +08:00
if (pbm->mem64_space.flags)
pci_add_resource_offset(&resources, &pbm->mem64_space,
sparc/PCI: Support arbitrary host bridge address offset Add support for arbitrary bus address offset. Previously we ignored the child (PCI) address in the "ranges" property and assumed it was always zero. That means every host bridge window mapped to PCI bus address zero, e.g., pci_bus 0000:00: root bus resource [mem 0x2000000000000-0x200007fffffff] (bus address [0x00000000-0x7fffffff]) But some systems have host bridge windows with non-zero child addresses, so parse the child address and compute the offset between the parent (CPU) and child (PCI) addresses. This allows windows like these: /pci@305: PCI MEM [mem 0x2000000100000-0x200007effffff] offset 2000000000000 pci_sun4v f02ae7f8: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x2000000100000-0x200007effffff] (bus address [0x00100000-0x7effffff]) [bhelgaas: changelog] Tested-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: sparclinux@vger.kernel.org
2017-04-21 13:04:48 +08:00
pbm->mem64_offset);
sparc/PCI: register busn_res for root buses Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog, fix "pci_last_busn" typo] Acked-by: "David S. Miller" <davem@davemloft.net> CC: sparclinux@vger.kernel.org Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-05-18 09:51:12 +08:00
pbm->busn.start = pbm->pci_first_busno;
pbm->busn.end = pbm->pci_last_busno;
pbm->busn.flags = IORESOURCE_BUS;
pci_add_resource(&resources, &pbm->busn);
sparc/PCI: convert to pci_create_root_bus() Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because sparc fixed the resources before scanning the bus, but it makes sparc more consistent with other architectures. v2: fix build error (from sfr) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-29 06:27:53 +08:00
bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
pbm, &resources);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
if (!bus) {
printk(KERN_ERR "Failed to create bus for %s\n",
node->full_name);
sparc/PCI: convert to pci_create_root_bus() Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because sparc fixed the resources before scanning the bus, but it makes sparc more consistent with other architectures. v2: fix build error (from sfr) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-29 06:27:53 +08:00
pci_free_resource_list(&resources);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
return NULL;
}
pci_of_scan_bus(pbm, node, bus);
pci_bus_register_of_sysfs(bus);
sparc64: Properly claim resources as each PCI bus is probed. Perform a pci_claim_resource() on all valid resources discovered during the OF device tree scan. Based almost entirely upon the PCI OF bus probing code which does the same thing there. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-13 14:29:09 +08:00
pci_claim_bus_resources(bus);
sparc/PCI: Request legacy VGA framebuffer only for VGA devices Previously we unconditionally requested the legacy VGA framebuffer (bus address 0xa0000-0xbffff) before we even know what PCI devices are present, in these paths: pci_fire_pbm_init, schizo_pbm_init, pci_sun4v_pbm_init, psycho_pbm_init_common pci_determine_mem_io_space pci_register_legacy_regions p->start = mem_res->start + 0xa0000 request_resource(mem_res, p) # claim VGA framebuffer pci_scan_one_pbm pci_of_scan_bus # scan DT for PCI devices pci_claim_bus_resources # claim PCI device BARs If we found a PCI device with a BAR or bridge window that overlapped the framebuffer area, we complained about not being able to claim the BAR, e.g., pci 0000:00:01.0: can't claim BAR 8 [mem 0x1ff00000000-0x1ffbfffffff]: address conflict with Video RAM area [??? 0x1ff000a0000-0x1ff000bffff flags 0x80000000] pci 0000:02:01.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:03:0f.0: can't claim BAR 8 [mem 0x1ff00100000-0x1ff028fffff]: no compatible bridge window pci 0000:04:04.0: can't claim BAR 1 [mem 0x1ff02808000-0x1ff02808fff]: no compatible bridge window This may make the conflicting device unusable because we try not to enable devices that have unassigned or conflicting BARs, e.g., qla1280 0000:04:04.0: can't ioremap BAR 1: [mem size 0x00001000] qla1280: Unable to map I/O memory If there is no VGA device in the same PCI segment, there's no reason to reserve the framebuffer and there's no conflict. If there *is* a VGA device in the same segment, both the VGA device and the device with an overlapping BAR may respond to the framebuffer addresses, which may cause bus errors. Request the legacy framebuffer area only when we actually find a VGA device. The fact that VGA devices use the legacy framebuffer even though it's not reported in a BAR is not sparc-specific, so the reservation of that area could be made more generic in the PCI core eventually. Note that on some systems, e.g., Blade 100, we still report a conflict between an ISA bridge (00:07.0) and a VGA device (00:13.0): pci_bus 0000:00: root bus resource [mem 0x1ff00000000-0x1ffffffffff] (bus address [0x00000000-0xffffffff]) pci 0000:00:07.0: reg 0x14: [mem 0x1ff00000000-0x1ff000fffff] pci 0000:00:13.0: can't claim VGA legacy [mem 0x1ff000a0000-0x1ff000bffff]: address conflict with 0000:00:07.0 [mem 0x1ff00000000-0x1ff000fffff] This is probably harmless, but if the VGA device and something behind the ISA bridge both responded to reads of the framebuffer, it would cause a bus error. Link: https://lkml.kernel.org/r/alpine.LRH.2.21.1804112323170.25495@math.ut.ee Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=117191#c35 Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-10 21:47:34 +08:00
sparc/PCI: Claim bus resources before pci_bus_add_devices() Pci_claim_bus_resources() should be called before pci_bus_add_devices(), or driver may failed to load, because the resources had not claimed. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-03-13 04:05:56 +08:00
pci_bus_add_devices(bus);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
return bus;
}
int pcibios_enable_device(struct pci_dev *dev, int mask)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
{
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
u16 cmd, oldcmd;
int i;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
oldcmd = cmd;
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
struct resource *res = &dev->resource[i];
/* Only set up the requested stuff */
if (!(mask & (1<<i)))
continue;
if (res->flags & IORESOURCE_IO)
cmd |= PCI_COMMAND_IO;
if (res->flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
if (cmd != oldcmd) {
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(dev, "enabling device (%04x -> %04x)\n", oldcmd, cmd);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
return 0;
}
/* Platform support for /proc/bus/pci/X/Y mmap()s. */
/* If the user uses a host-bridge as the PCI device, he may use
* this to perform a raw mmap() of the I/O or MEM space behind
* that controller.
*
* This can be useful for execution of x86 PCI bios initialization code
* on a PCI card, like the xfree86 int10 stuff does.
*/
static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state)
{
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
unsigned long space_size, user_offset, user_size;
[SPARC64]: Kill pci_controller->pbms_same_domain We don't do the "Simba APB is a PBM" bogosity for Sabre controllers any longer, so this pbms_same_domain thing is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-09 14:52:11 +08:00
if (mmap_state == pci_mmap_io) {
treewide: Convert uses of struct resource to resource_size(ptr) Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-06-10 00:13:32 +08:00
space_size = resource_size(&pbm->io_space);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
} else {
treewide: Convert uses of struct resource to resource_size(ptr) Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-06-10 00:13:32 +08:00
space_size = resource_size(&pbm->mem_space);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
}
/* Make sure the request is in range. */
user_offset = vma->vm_pgoff << PAGE_SHIFT;
user_size = vma->vm_end - vma->vm_start;
if (user_offset >= space_size ||
(user_offset + user_size) > space_size)
return -EINVAL;
[SPARC64]: Kill pci_controller->pbms_same_domain We don't do the "Simba APB is a PBM" bogosity for Sabre controllers any longer, so this pbms_same_domain thing is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-09 14:52:11 +08:00
if (mmap_state == pci_mmap_io) {
vma->vm_pgoff = (pbm->io_space.start +
user_offset) >> PAGE_SHIFT;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
} else {
[SPARC64]: Kill pci_controller->pbms_same_domain We don't do the "Simba APB is a PBM" bogosity for Sabre controllers any longer, so this pbms_same_domain thing is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-09 14:52:11 +08:00
vma->vm_pgoff = (pbm->mem_space.start +
user_offset) >> PAGE_SHIFT;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
}
return 0;
}
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
/* Adjust vm_pgoff of VMA such that it is the physical page offset
* corresponding to the 32-bit pci bus offset for DEV requested by the user.
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
*
* Basically, the user finds the base address for his device which he wishes
* to mmap. They read the 32-bit value from the config space base register,
* add whatever PAGE_SIZE multiple offset they wish, and feed this into the
* offset parameter of mmap on /proc/bus/pci/XXX for that device.
*
* Returns negative error code on failure, zero on success.
*/
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
static int __pci_mmap_make_offset(struct pci_dev *pdev,
struct vm_area_struct *vma,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
enum pci_mmap_state mmap_state)
{
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
unsigned long user_paddr, user_size;
int i, err;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
/* First compute the physical address in vma->vm_pgoff,
* making sure the user offset is within range in the
* appropriate PCI space.
*/
err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
if (err)
return err;
/* If this is a mapping on a host bridge, any address
* is OK.
*/
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
return err;
/* Otherwise make sure it's in the range for one of the
* device's resources.
*/
user_paddr = vma->vm_pgoff << PAGE_SHIFT;
user_size = vma->vm_end - vma->vm_start;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
struct resource *rp = &pdev->resource[i];
sparc64: Fix PCI resource mapping on sparc64 There is a problem discovered in recent versions of ATI Mach64 driver in X.org on sparc64 architecture. In short, the driver fails to mmap MMIO aperture (PCI resource #2). I've found that kernel's __pci_mmap_make_offset() returns EINVAL. It checks whether user attempts to mmap more than the resource length, which is 0x1000 bytes in our case. But PAGE_SIZE on SPARC64 is 0x2000 and this is what actually is being mmaped. So __pci_mmap_make_offset() failed for this PCI resource. Signed-off-by: Max Dmitrichenko <dmitrmax@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-02 15:34:10 +08:00
resource_size_t aligned_end;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* Active? */
if (!rp->flags)
continue;
/* Same type? */
if (i == PCI_ROM_RESOURCE) {
if (mmap_state != pci_mmap_mem)
continue;
} else {
if ((mmap_state == pci_mmap_io &&
(rp->flags & IORESOURCE_IO) == 0) ||
(mmap_state == pci_mmap_mem &&
(rp->flags & IORESOURCE_MEM) == 0))
continue;
}
sparc64: Fix PCI resource mapping on sparc64 There is a problem discovered in recent versions of ATI Mach64 driver in X.org on sparc64 architecture. In short, the driver fails to mmap MMIO aperture (PCI resource #2). I've found that kernel's __pci_mmap_make_offset() returns EINVAL. It checks whether user attempts to mmap more than the resource length, which is 0x1000 bytes in our case. But PAGE_SIZE on SPARC64 is 0x2000 and this is what actually is being mmaped. So __pci_mmap_make_offset() failed for this PCI resource. Signed-off-by: Max Dmitrichenko <dmitrmax@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-02 15:34:10 +08:00
/* Align the resource end to the next page address.
* PAGE_SIZE intentionally added instead of (PAGE_SIZE - 1),
* because actually we need the address of the next byte
* after rp->end.
*/
aligned_end = (rp->end + PAGE_SIZE) & PAGE_MASK;
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
if ((rp->start <= user_paddr) &&
sparc64: Fix PCI resource mapping on sparc64 There is a problem discovered in recent versions of ATI Mach64 driver in X.org on sparc64 architecture. In short, the driver fails to mmap MMIO aperture (PCI resource #2). I've found that kernel's __pci_mmap_make_offset() returns EINVAL. It checks whether user attempts to mmap more than the resource length, which is 0x1000 bytes in our case. But PAGE_SIZE on SPARC64 is 0x2000 and this is what actually is being mmaped. So __pci_mmap_make_offset() failed for this PCI resource. Signed-off-by: Max Dmitrichenko <dmitrmax@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-02 15:34:10 +08:00
(user_paddr + user_size) <= aligned_end)
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
break;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
}
[SPARC64]: Kill pci_memspace_mask. It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-12 06:41:01 +08:00
if (i > PCI_ROM_RESOURCE)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
return -EINVAL;
return 0;
}
/* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
* device mapping.
*/
static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state)
{
[SPARC]: Kill io_remap_page_range() It's been deprecated long enough and there are no in-tree users any longer. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-09-02 12:51:26 +08:00
/* Our io_remap_pfn_range takes care of this, do nothing. */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
}
/* Perform the actual remap of the pages for a PCI device mapping, as appropriate
* for this architecture. The region in the process to map is described by vm_start
* and vm_end members of VMA, the base physical address is found in vm_pgoff.
* The pci device structure is provided so that architectures may make mapping
* decisions on a per-device or per-bus basis.
*
* Returns a negative error code on failure, zero on success.
*/
PCI: Add BAR index argument to pci_mmap_page_range() In all cases we know which BAR it is. Passing it in means that arch code (or generic code; watch this space) won't have to go looking for it again. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-04-12 20:25:58 +08:00
int pci_mmap_page_range(struct pci_dev *dev, int bar,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
{
int ret;
ret = __pci_mmap_make_offset(dev, vma, mmap_state);
if (ret < 0)
return ret;
__pci_mmap_set_pgprot(dev, vma, mmap_state);
[SPARC]: Respect vm_page_prot in io_remap_page_range(). Make sure the callers do a pgprot_noncached() on vma->vm_page_prot. Pointed out by Hugh Dickens. Signed-off-by: David S. Miller <davem@davemloft.net>
2006-03-21 18:29:39 +08:00
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
ret = io_remap_pfn_range(vma, vma->vm_start,
vma->vm_pgoff,
vma->vm_end - vma->vm_start,
vma->vm_page_prot);
if (ret)
return ret;
return 0;
}
[SPARC64]: NUMA device infrastructure. Record and propagate NUMA information for devices. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-03-19 19:52:48 +08:00
#ifdef CONFIG_NUMA
int pcibus_to_node(struct pci_bus *pbus)
{
struct pci_pbm_info *pbm = pbus->sysdata;
return pbm->numa_node;
}
EXPORT_SYMBOL(pcibus_to_node);
#endif
sparc64: Get rid of pci_controller_info. It is just used as a parent to encapsulate two PBM objects. But that layout is only really relevant and necessary for psycho PCI controllers, which unlike all the others share a single IOMMU instance between sibling PCI busses. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-10 14:54:02 +08:00
/* Return the domain number for this pci bus */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
int pci_domain_nr(struct pci_bus *pbus)
{
struct pci_pbm_info *pbm = pbus->sysdata;
int ret;
sparc64: Get rid of pci_controller_info. It is just used as a parent to encapsulate two PBM objects. But that layout is only really relevant and necessary for psycho PCI controllers, which unlike all the others share a single IOMMU instance between sibling PCI busses. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-10 14:54:02 +08:00
if (!pbm) {
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
ret = -ENXIO;
} else {
[SPARC64]: Move index info pci_pbm_info. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-08 14:49:01 +08:00
ret = pbm->index;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
}
return ret;
}
EXPORT_SYMBOL(pci_domain_nr);
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
#ifdef CONFIG_PCI_MSI
int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
sparc64: rename virt_irq => irq - II The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-22 19:32:20 +08:00
unsigned int irq;
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
[SPARC64]: Move {setup,teardown}_msi_irq into pci_pbm_info. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-05-08 14:28:50 +08:00
if (!pbm->setup_msi_irq)
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
return -EINVAL;
sparc64: rename virt_irq => irq - II The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-22 19:32:20 +08:00
return pbm->setup_msi_irq(&irq, pdev, desc);
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
}
sparc64: rename virt_irq => irq - II The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-22 19:32:20 +08:00
void arch_teardown_msi_irq(unsigned int irq)
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
{
sparc: Convert to new irq function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: sparclinux@vger.kernel.org
2011-03-25 00:52:54 +08:00
struct msi_desc *entry = irq_get_msi_desc(irq);
sparc/PCI: Use helper functions to access fields in struct msi_desc Use helper functions to access fields in struct msi_desc, so we could easily refine struct msi_desc later. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Stuart Yoder <stuart.yoder@freescale.com> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Eric Snowberg <eric.snowberg@oracle.com> Link: http://lkml.kernel.org/r/1436428847-8886-8-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-09 16:00:42 +08:00
struct pci_dev *pdev = msi_desc_to_pci_dev(entry);
[SPARC64]: Probe PCI bus using OF device tree. Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-03-01 15:35:04 +08:00
struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
sparc64: Fix sparse warnings in pci.c 1) Declare pci_poke_* in pci_impl.h 2) of_create_pci_dev() should be static 3) ->setup_msi_irq() wants an unsigned int pointer not a plain int one 4) void value expression return in arch_teardown_msi_irq() Signed-off-by: David S. Miller <davem@davemloft.net>
2008-09-12 14:57:40 +08:00
if (pbm->teardown_msi_irq)
sparc64: rename virt_irq => irq - II The generic irq support uses the term 'irq' for the allocated irq number. Fix it so sparc64 use the same term for an irq as the generic irq support does. For a naive reader this is less confusing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-22 19:32:20 +08:00
pbm->teardown_msi_irq(irq, pdev);
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-11 09:41:02 +08:00
}
#endif /* !(CONFIG_PCI_MSI) */
[SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-07-28 13:39:14 +08:00
static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
{
struct pci_dev *ali_isa_bridge;
u8 val;
/* ALI sound chips generate 31-bits of DMA, a special register
* determines what bit 31 is emitted as.
*/
ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL,
PCI_DEVICE_ID_AL_M1533,
NULL);
pci_read_config_byte(ali_isa_bridge, 0x7e, &val);
if (set_bit)
val |= 0x01;
else
val &= ~0x01;
pci_write_config_byte(ali_isa_bridge, 0x7e, val);
pci_dev_put(ali_isa_bridge);
}
sparc: Use asm-generic/pci-dma-compat This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-08-10 10:53:16 +08:00
int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask)
[SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-07-28 13:39:14 +08:00
{
u64 dma_addr_mask;
if (pdev == NULL) {
dma_addr_mask = 0xffffffff;
} else {
struct iommu *iommu = pdev->dev.archdata.iommu;
dma_addr_mask = iommu->dma_addr_mask;
if (pdev->vendor == PCI_VENDOR_ID_AL &&
pdev->device == PCI_DEVICE_ID_AL_M5451 &&
device_mask == 0x7fffffff) {
ali_sound_dma_hack(pdev,
(dma_addr_mask & 0x80000000) != 0);
return 1;
}
}
if (device_mask >= (1UL << 32UL))
return 0;
return (device_mask & dma_addr_mask) == dma_addr_mask;
}
[SPARC64]: Implement pci_resource_to_user() This makes libpciaccess able to mmap() resources of the device properly. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-12-25 18:20:33 +08:00
void pci_resource_to_user(const struct pci_dev *pdev, int bar,
const struct resource *rp, resource_size_t *start,
resource_size_t *end)
{
sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus() "User" addresses are shown in /sys/devices/pci.../.../resource and /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F files. On sparc, these are PCI bus addresses, i.e., raw BAR values. Previously pci_resource_to_user() computed the user address by subtracting either pbm->io_space.start or pbm->mem_space.start from the resource start. We've already told the PCI core about those offsets here: pci_scan_one_pbm() pci_add_resource_offset(&resources, &pbm->io_space, pbm->io_space.start); pci_add_resource_offset(&resources, &pbm->mem_space, pbm->mem_space.start); pci_add_resource_offset(&resources, &pbm->mem64_space, pbm->mem_space.start); so pcibios_resource_to_bus() knows how to do that translation. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2016-06-18 03:43:34 +08:00
struct pci_bus_region region;
[SPARC64]: Implement pci_resource_to_user() This makes libpciaccess able to mmap() resources of the device properly. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-12-25 18:20:33 +08:00
sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus() "User" addresses are shown in /sys/devices/pci.../.../resource and /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F files. On sparc, these are PCI bus addresses, i.e., raw BAR values. Previously pci_resource_to_user() computed the user address by subtracting either pbm->io_space.start or pbm->mem_space.start from the resource start. We've already told the PCI core about those offsets here: pci_scan_one_pbm() pci_add_resource_offset(&resources, &pbm->io_space, pbm->io_space.start); pci_add_resource_offset(&resources, &pbm->mem_space, pbm->mem_space.start); pci_add_resource_offset(&resources, &pbm->mem64_space, pbm->mem_space.start); so pcibios_resource_to_bus() knows how to do that translation. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2016-06-18 03:43:34 +08:00
/*
* "User" addresses are shown in /sys/devices/pci.../.../resource
* and /proc/bus/pci/devices and used as mmap offsets for
* /proc/bus/pci/BB/DD.F files (see proc_bus_pci_mmap()).
*
* On sparc, these are PCI bus addresses, i.e., raw BAR values.
*/
pcibios_resource_to_bus(pdev->bus, &region, (struct resource *) rp);
*start = region.start;
*end = region.end;
[SPARC64]: Implement pci_resource_to_user() This makes libpciaccess able to mmap() resources of the device properly. Signed-off-by: David S. Miller <davem@davemloft.net>
2007-12-25 18:20:33 +08:00
}
sparc64/PCI: drop PCI_CACHE_LINE_BYTES sparc64 is now the only user of PCI_CACHE_LINE_BYTES. Drop it and set pci_dfl_cache_line_size from pcibios_init() instead and drop PCI_CACHE_LINE_BYTES handling from generic pci code. Orignally-From: David Miller <davem@davemloft.net> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-22 16:34:17 +08:00
PCI: SPARC: convert pcibios_set_master() to a non-inlined function This patch converts SPARC's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow SPARC's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-29 05:48:10 +08:00
void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling */
}
sparc/PCI: Fix for panic while enabling SR-IOV We noticed this panic while enabling SR-IOV in sparc. mlx4_core: Mellanox ConnectX core driver v2.2-1 (Jan 1 2015) mlx4_core: Initializing 0007:01:00.0 mlx4_core 0007:01:00.0: Enabling SR-IOV with 5 VFs mlx4_core: Initializing 0007:01:00.1 Unable to handle kernel NULL pointer dereference insmod(10010): Oops [#1] CPU: 391 PID: 10010 Comm: insmod Not tainted 4.1.12-32.el6uek.kdump2.sparc64 #1 TPC: <dma_supported+0x20/0x80> I7: <__mlx4_init_one+0x324/0x500 [mlx4_core]> Call Trace: [00000000104c5ea4] __mlx4_init_one+0x324/0x500 [mlx4_core] [00000000104c613c] mlx4_init_one+0xbc/0x120 [mlx4_core] [0000000000725f14] local_pci_probe+0x34/0xa0 [0000000000726028] pci_call_probe+0xa8/0xe0 [0000000000726310] pci_device_probe+0x50/0x80 [000000000079f700] really_probe+0x140/0x420 [000000000079fa24] driver_probe_device+0x44/0xa0 [000000000079fb5c] __device_attach+0x3c/0x60 [000000000079d85c] bus_for_each_drv+0x5c/0xa0 [000000000079f588] device_attach+0x88/0xc0 [000000000071acd0] pci_bus_add_device+0x30/0x80 [0000000000736090] virtfn_add.clone.1+0x210/0x360 [00000000007364a4] sriov_enable+0x2c4/0x520 [000000000073672c] pci_enable_sriov+0x2c/0x40 [00000000104c2d58] mlx4_enable_sriov+0xf8/0x180 [mlx4_core] [00000000104c49ac] mlx4_load_one+0x42c/0xd40 [mlx4_core] Disabling lock debugging due to kernel taint Caller[00000000104c5ea4]: __mlx4_init_one+0x324/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb5c]: __device_attach+0x3c/0x60 Caller[000000000079d85c]: bus_for_each_drv+0x5c/0xa0 Caller[000000000079f588]: device_attach+0x88/0xc0 Caller[000000000071acd0]: pci_bus_add_device+0x30/0x80 Caller[0000000000736090]: virtfn_add.clone.1+0x210/0x360 Caller[00000000007364a4]: sriov_enable+0x2c4/0x520 Caller[000000000073672c]: pci_enable_sriov+0x2c/0x40 Caller[00000000104c2d58]: mlx4_enable_sriov+0xf8/0x180 [mlx4_core] Caller[00000000104c49ac]: mlx4_load_one+0x42c/0xd40 [mlx4_core] Caller[00000000104c5f90]: __mlx4_init_one+0x410/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb08]: __driver_attach+0x88/0xa0 Caller[000000000079d90c]: bus_for_each_dev+0x6c/0xa0 Caller[000000000079f29c]: driver_attach+0x1c/0x40 Caller[000000000079e35c]: bus_add_driver+0x17c/0x220 Caller[00000000007a02d4]: driver_register+0x74/0x120 Caller[00000000007263fc]: __pci_register_driver+0x3c/0x60 Caller[00000000104f62bc]: mlx4_init+0x60/0xcc [mlx4_core] Kernel panic - not syncing: Fatal exception Press Stop-A (L1-A) to return to the boot prom ---[ end Kernel panic - not syncing: Fatal exception Details: Here is the call sequence virtfn_add->__mlx4_init_one->dma_set_mask->dma_supported The panic happened at line 760(file arch/sparc/kernel/iommu.c) 758 int dma_supported(struct device *dev, u64 device_mask) 759 { 760 struct iommu *iommu = dev->archdata.iommu; 761 u64 dma_addr_mask = iommu->dma_addr_mask; 762 763 if (device_mask >= (1UL << 32UL)) 764 return 0; 765 766 if ((device_mask & dma_addr_mask) == dma_addr_mask) 767 return 1; 768 769 #ifdef CONFIG_PCI 770 if (dev_is_pci(dev)) 771 return pci64_dma_supported(to_pci_dev(dev), device_mask); 772 #endif 773 774 return 0; 775 } 776 EXPORT_SYMBOL(dma_supported); Same panic happened with Intel ixgbe driver also. SR-IOV code looks for arch specific data while enabling VFs. When VF device is added, driver probe function makes set of calls to initialize the pci device. Because the VF device is added different way than the normal PF device(which happens via of_create_pci_dev for sparc), some of the arch specific initialization does not happen for VF device. That causes panic when archdata is accessed. To fix this, I have used already defined weak function pcibios_setup_device to copy archdata from PF to VF. Also verified the fix. Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Reviewed-by: Ethan Zhao <ethan.zhao@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-25 04:02:22 +08:00
#ifdef CONFIG_PCI_IOV
int pcibios_add_device(struct pci_dev *dev)
{
struct pci_dev *pdev;
/* Add sriov arch specific initialization here.
* Copy dev_archdata from PF to VF
*/
if (dev->is_virtfn) {
sparc/pci: Refactor dev_archdata initialization into pci_init_dev_archdata The function pcibios_add_device() added by commit d0c31e020057 ("sparc/PCI: Fix for panic while enabling SR-IOV") initializes the dev_archdata by doing a memcpy from the PF. This has the problem that it erroneously copies the OF device without explicitly refcounting it. As David Miller pointed out: "Generally speaking we don't really support hot-plug for OF probed devices, but if we did all of the device tree pointers have to be refcounted properly." To fix this error, and also avoid code duplication, this patch creates a new helper function, pci_init_dev_archdata(), that initializes the fields in dev_archdata, and can be invoked by callers after they have taken the needed refcounts Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Tested-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-12 08:57:05 +08:00
struct dev_archdata *psd;
sparc/PCI: Fix for panic while enabling SR-IOV We noticed this panic while enabling SR-IOV in sparc. mlx4_core: Mellanox ConnectX core driver v2.2-1 (Jan 1 2015) mlx4_core: Initializing 0007:01:00.0 mlx4_core 0007:01:00.0: Enabling SR-IOV with 5 VFs mlx4_core: Initializing 0007:01:00.1 Unable to handle kernel NULL pointer dereference insmod(10010): Oops [#1] CPU: 391 PID: 10010 Comm: insmod Not tainted 4.1.12-32.el6uek.kdump2.sparc64 #1 TPC: <dma_supported+0x20/0x80> I7: <__mlx4_init_one+0x324/0x500 [mlx4_core]> Call Trace: [00000000104c5ea4] __mlx4_init_one+0x324/0x500 [mlx4_core] [00000000104c613c] mlx4_init_one+0xbc/0x120 [mlx4_core] [0000000000725f14] local_pci_probe+0x34/0xa0 [0000000000726028] pci_call_probe+0xa8/0xe0 [0000000000726310] pci_device_probe+0x50/0x80 [000000000079f700] really_probe+0x140/0x420 [000000000079fa24] driver_probe_device+0x44/0xa0 [000000000079fb5c] __device_attach+0x3c/0x60 [000000000079d85c] bus_for_each_drv+0x5c/0xa0 [000000000079f588] device_attach+0x88/0xc0 [000000000071acd0] pci_bus_add_device+0x30/0x80 [0000000000736090] virtfn_add.clone.1+0x210/0x360 [00000000007364a4] sriov_enable+0x2c4/0x520 [000000000073672c] pci_enable_sriov+0x2c/0x40 [00000000104c2d58] mlx4_enable_sriov+0xf8/0x180 [mlx4_core] [00000000104c49ac] mlx4_load_one+0x42c/0xd40 [mlx4_core] Disabling lock debugging due to kernel taint Caller[00000000104c5ea4]: __mlx4_init_one+0x324/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb5c]: __device_attach+0x3c/0x60 Caller[000000000079d85c]: bus_for_each_drv+0x5c/0xa0 Caller[000000000079f588]: device_attach+0x88/0xc0 Caller[000000000071acd0]: pci_bus_add_device+0x30/0x80 Caller[0000000000736090]: virtfn_add.clone.1+0x210/0x360 Caller[00000000007364a4]: sriov_enable+0x2c4/0x520 Caller[000000000073672c]: pci_enable_sriov+0x2c/0x40 Caller[00000000104c2d58]: mlx4_enable_sriov+0xf8/0x180 [mlx4_core] Caller[00000000104c49ac]: mlx4_load_one+0x42c/0xd40 [mlx4_core] Caller[00000000104c5f90]: __mlx4_init_one+0x410/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb08]: __driver_attach+0x88/0xa0 Caller[000000000079d90c]: bus_for_each_dev+0x6c/0xa0 Caller[000000000079f29c]: driver_attach+0x1c/0x40 Caller[000000000079e35c]: bus_add_driver+0x17c/0x220 Caller[00000000007a02d4]: driver_register+0x74/0x120 Caller[00000000007263fc]: __pci_register_driver+0x3c/0x60 Caller[00000000104f62bc]: mlx4_init+0x60/0xcc [mlx4_core] Kernel panic - not syncing: Fatal exception Press Stop-A (L1-A) to return to the boot prom ---[ end Kernel panic - not syncing: Fatal exception Details: Here is the call sequence virtfn_add->__mlx4_init_one->dma_set_mask->dma_supported The panic happened at line 760(file arch/sparc/kernel/iommu.c) 758 int dma_supported(struct device *dev, u64 device_mask) 759 { 760 struct iommu *iommu = dev->archdata.iommu; 761 u64 dma_addr_mask = iommu->dma_addr_mask; 762 763 if (device_mask >= (1UL << 32UL)) 764 return 0; 765 766 if ((device_mask & dma_addr_mask) == dma_addr_mask) 767 return 1; 768 769 #ifdef CONFIG_PCI 770 if (dev_is_pci(dev)) 771 return pci64_dma_supported(to_pci_dev(dev), device_mask); 772 #endif 773 774 return 0; 775 } 776 EXPORT_SYMBOL(dma_supported); Same panic happened with Intel ixgbe driver also. SR-IOV code looks for arch specific data while enabling VFs. When VF device is added, driver probe function makes set of calls to initialize the pci device. Because the VF device is added different way than the normal PF device(which happens via of_create_pci_dev for sparc), some of the arch specific initialization does not happen for VF device. That causes panic when archdata is accessed. To fix this, I have used already defined weak function pcibios_setup_device to copy archdata from PF to VF. Also verified the fix. Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Reviewed-by: Ethan Zhao <ethan.zhao@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-25 04:02:22 +08:00
pdev = dev->physfn;
sparc/pci: Refactor dev_archdata initialization into pci_init_dev_archdata The function pcibios_add_device() added by commit d0c31e020057 ("sparc/PCI: Fix for panic while enabling SR-IOV") initializes the dev_archdata by doing a memcpy from the PF. This has the problem that it erroneously copies the OF device without explicitly refcounting it. As David Miller pointed out: "Generally speaking we don't really support hot-plug for OF probed devices, but if we did all of the device tree pointers have to be refcounted properly." To fix this error, and also avoid code duplication, this patch creates a new helper function, pci_init_dev_archdata(), that initializes the fields in dev_archdata, and can be invoked by callers after they have taken the needed refcounts Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Tested-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-12 08:57:05 +08:00
psd = &pdev->dev.archdata;
pci_init_dev_archdata(&dev->dev.archdata, psd->iommu,
psd->stc, psd->host_controller, NULL,
psd->numa_node);
sparc/PCI: Fix for panic while enabling SR-IOV We noticed this panic while enabling SR-IOV in sparc. mlx4_core: Mellanox ConnectX core driver v2.2-1 (Jan 1 2015) mlx4_core: Initializing 0007:01:00.0 mlx4_core 0007:01:00.0: Enabling SR-IOV with 5 VFs mlx4_core: Initializing 0007:01:00.1 Unable to handle kernel NULL pointer dereference insmod(10010): Oops [#1] CPU: 391 PID: 10010 Comm: insmod Not tainted 4.1.12-32.el6uek.kdump2.sparc64 #1 TPC: <dma_supported+0x20/0x80> I7: <__mlx4_init_one+0x324/0x500 [mlx4_core]> Call Trace: [00000000104c5ea4] __mlx4_init_one+0x324/0x500 [mlx4_core] [00000000104c613c] mlx4_init_one+0xbc/0x120 [mlx4_core] [0000000000725f14] local_pci_probe+0x34/0xa0 [0000000000726028] pci_call_probe+0xa8/0xe0 [0000000000726310] pci_device_probe+0x50/0x80 [000000000079f700] really_probe+0x140/0x420 [000000000079fa24] driver_probe_device+0x44/0xa0 [000000000079fb5c] __device_attach+0x3c/0x60 [000000000079d85c] bus_for_each_drv+0x5c/0xa0 [000000000079f588] device_attach+0x88/0xc0 [000000000071acd0] pci_bus_add_device+0x30/0x80 [0000000000736090] virtfn_add.clone.1+0x210/0x360 [00000000007364a4] sriov_enable+0x2c4/0x520 [000000000073672c] pci_enable_sriov+0x2c/0x40 [00000000104c2d58] mlx4_enable_sriov+0xf8/0x180 [mlx4_core] [00000000104c49ac] mlx4_load_one+0x42c/0xd40 [mlx4_core] Disabling lock debugging due to kernel taint Caller[00000000104c5ea4]: __mlx4_init_one+0x324/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb5c]: __device_attach+0x3c/0x60 Caller[000000000079d85c]: bus_for_each_drv+0x5c/0xa0 Caller[000000000079f588]: device_attach+0x88/0xc0 Caller[000000000071acd0]: pci_bus_add_device+0x30/0x80 Caller[0000000000736090]: virtfn_add.clone.1+0x210/0x360 Caller[00000000007364a4]: sriov_enable+0x2c4/0x520 Caller[000000000073672c]: pci_enable_sriov+0x2c/0x40 Caller[00000000104c2d58]: mlx4_enable_sriov+0xf8/0x180 [mlx4_core] Caller[00000000104c49ac]: mlx4_load_one+0x42c/0xd40 [mlx4_core] Caller[00000000104c5f90]: __mlx4_init_one+0x410/0x500 [mlx4_core] Caller[00000000104c613c]: mlx4_init_one+0xbc/0x120 [mlx4_core] Caller[0000000000725f14]: local_pci_probe+0x34/0xa0 Caller[0000000000726028]: pci_call_probe+0xa8/0xe0 Caller[0000000000726310]: pci_device_probe+0x50/0x80 Caller[000000000079f700]: really_probe+0x140/0x420 Caller[000000000079fa24]: driver_probe_device+0x44/0xa0 Caller[000000000079fb08]: __driver_attach+0x88/0xa0 Caller[000000000079d90c]: bus_for_each_dev+0x6c/0xa0 Caller[000000000079f29c]: driver_attach+0x1c/0x40 Caller[000000000079e35c]: bus_add_driver+0x17c/0x220 Caller[00000000007a02d4]: driver_register+0x74/0x120 Caller[00000000007263fc]: __pci_register_driver+0x3c/0x60 Caller[00000000104f62bc]: mlx4_init+0x60/0xcc [mlx4_core] Kernel panic - not syncing: Fatal exception Press Stop-A (L1-A) to return to the boot prom ---[ end Kernel panic - not syncing: Fatal exception Details: Here is the call sequence virtfn_add->__mlx4_init_one->dma_set_mask->dma_supported The panic happened at line 760(file arch/sparc/kernel/iommu.c) 758 int dma_supported(struct device *dev, u64 device_mask) 759 { 760 struct iommu *iommu = dev->archdata.iommu; 761 u64 dma_addr_mask = iommu->dma_addr_mask; 762 763 if (device_mask >= (1UL << 32UL)) 764 return 0; 765 766 if ((device_mask & dma_addr_mask) == dma_addr_mask) 767 return 1; 768 769 #ifdef CONFIG_PCI 770 if (dev_is_pci(dev)) 771 return pci64_dma_supported(to_pci_dev(dev), device_mask); 772 #endif 773 774 return 0; 775 } 776 EXPORT_SYMBOL(dma_supported); Same panic happened with Intel ixgbe driver also. SR-IOV code looks for arch specific data while enabling VFs. When VF device is added, driver probe function makes set of calls to initialize the pci device. Because the VF device is added different way than the normal PF device(which happens via of_create_pci_dev for sparc), some of the arch specific initialization does not happen for VF device. That causes panic when archdata is accessed. To fix this, I have used already defined weak function pcibios_setup_device to copy archdata from PF to VF. Also verified the fix. Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com> Reviewed-by: Ethan Zhao <ethan.zhao@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-25 04:02:22 +08:00
}
return 0;
}
#endif /* CONFIG_PCI_IOV */
sparc64/PCI: drop PCI_CACHE_LINE_BYTES sparc64 is now the only user of PCI_CACHE_LINE_BYTES. Drop it and set pci_dfl_cache_line_size from pcibios_init() instead and drop PCI_CACHE_LINE_BYTES handling from generic pci code. Orignally-From: David Miller <davem@davemloft.net> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-22 16:34:17 +08:00
static int __init pcibios_init(void)
{
pci_dfl_cache_line_size = 64 >> 2;
return 0;
}
subsys_initcall(pcibios_init);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
#ifdef CONFIG_SYSFS
sparc64: pci slots information is not populated in sysfs Add PCI slot numbers within sysfs for PCIe hardware. Larger PCIe systems with nested PCI bridges and slots further down on these bridges were not being populated within sysfs. This will add ACPI style PCI slot numbers for these systems since the OF 'slot-names' information is not available on all PCIe platforms. Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27 23:59:19 +08:00
#define SLOT_NAME_SIZE 11 /* Max decimal digits + null in u32 */
static void pcie_bus_slot_names(struct pci_bus *pbus)
{
struct pci_dev *pdev;
struct pci_bus *bus;
list_for_each_entry(pdev, &pbus->devices, bus_list) {
char name[SLOT_NAME_SIZE];
struct pci_slot *pci_slot;
const u32 *slot_num;
int len;
slot_num = of_get_property(pdev->dev.of_node,
"physical-slot#", &len);
if (slot_num == NULL || len != 4)
continue;
snprintf(name, sizeof(name), "%u", slot_num[0]);
pci_slot = pci_create_slot(pbus, slot_num[0], name, NULL);
if (IS_ERR(pci_slot))
pr_err("PCI: pci_create_slot returned %ld.\n",
PTR_ERR(pci_slot));
}
list_for_each_entry(bus, &pbus->children, node)
pcie_bus_slot_names(bus);
}
sparc: remove __devinit, __devexit annotations __devinit, __devexit annotations are nops - so drop them. Likewise for __devexit_p. Adjusted alignment of arguments when needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-01 23:02:33 +08:00
static void pci_bus_slot_names(struct device_node *node, struct pci_bus *bus)
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
{
const struct pci_slot_names {
u32 slot_mask;
char names[0];
} *prop;
const char *sp;
int len, i;
u32 mask;
prop = of_get_property(node, "slot-names", &len);
if (!prop)
return;
mask = prop->slot_mask;
sp = prop->names;
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(bus, "Making slots for [%s] mask[0x%02x]\n",
node->full_name, mask);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
i = 0;
while (mask) {
struct pci_slot *pci_slot;
u32 this_bit = 1 << i;
if (!(mask & this_bit)) {
i++;
continue;
}
if (ofpci_verbose)
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_info(bus, "Making slot [%s]\n", sp);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
pci_slot = pci_create_slot(bus, i, sp, NULL);
if (IS_ERR(pci_slot))
sparc/PCI: Use dev_printk() when possible Use the pci_info() and pci_err() wrappers for dev_printk() when possible. Log PCI device vendor and device IDs and BAR information in the same format used by other architectures. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-04-22 03:35:42 +08:00
pci_err(bus, "pci_create_slot returned %ld\n",
PTR_ERR(pci_slot));
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
sp += strlen(sp) + 1;
mask &= ~this_bit;
i++;
}
}
static int __init of_pci_slot_init(void)
{
struct pci_bus *pbus = NULL;
while ((pbus = pci_find_next_bus(pbus)) != NULL) {
struct device_node *node;
sparc64: pci slots information is not populated in sysfs Add PCI slot numbers within sysfs for PCIe hardware. Larger PCIe systems with nested PCI bridges and slots further down on these bridges were not being populated within sysfs. This will add ACPI style PCI slot numbers for these systems since the OF 'slot-names' information is not available on all PCIe platforms. Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27 23:59:19 +08:00
struct pci_dev *pdev;
pdev = list_first_entry(&pbus->devices, struct pci_dev,
bus_list);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
sparc64: pci slots information is not populated in sysfs Add PCI slot numbers within sysfs for PCIe hardware. Larger PCIe systems with nested PCI bridges and slots further down on these bridges were not being populated within sysfs. This will add ACPI style PCI slot numbers for these systems since the OF 'slot-names' information is not available on all PCIe platforms. Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27 23:59:19 +08:00
if (pdev && pci_is_pcie(pdev)) {
pcie_bus_slot_names(pbus);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
} else {
sparc64: pci slots information is not populated in sysfs Add PCI slot numbers within sysfs for PCIe hardware. Larger PCIe systems with nested PCI bridges and slots further down on these bridges were not being populated within sysfs. This will add ACPI style PCI slot numbers for these systems since the OF 'slot-names' information is not available on all PCIe platforms. Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27 23:59:19 +08:00
if (pbus->self) {
/* PCI->PCI bridge */
node = pbus->self->dev.of_node;
} else {
struct pci_pbm_info *pbm = pbus->sysdata;
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
sparc64: pci slots information is not populated in sysfs Add PCI slot numbers within sysfs for PCIe hardware. Larger PCIe systems with nested PCI bridges and slots further down on these bridges were not being populated within sysfs. This will add ACPI style PCI slot numbers for these systems since the OF 'slot-names' information is not available on all PCIe platforms. Signed-off-by: Eric Snowberg <eric.snowberg@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27 23:59:19 +08:00
/* Host PCI controller */
node = pbm->op->dev.of_node;
}
pci_bus_slot_names(node, pbus);
}
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
}
return 0;
}
sparc: don't use module_init in non-modular pci.c code The pci.o is built for SPARC64_PCI -- which is bool, and hence this code is either present or absent. It will never be modular, so using module_init as an alias for __initcall can be somewhat misleading. Fix this up now, so that we can relocate module_init from init.h into module.h in the future. If we don't do this, we'd have to add module.h to obviously non-modular code, and that would be a worse thing. Note that direct use of __initcall is discouraged, vs. one of the priority categorized subgroups. As __initcall gets mapped onto device_initcall, our use of device_initcall directly in this change means that the runtime impact is zero -- it will remain at level 6 in initcall ordering. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-01-13 02:07:30 +08:00
device_initcall(of_pci_slot_init);
sparc64: If 'slot-names' property exist, create sysfs PCI slot information. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-21 11:53:55 +08:00
#endif