2014-06-05 22:15:00 +08:00
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* AMD 10GbE driver (amd-xgbe)
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Required properties:
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- compatible: Should be "amd,xgbe-seattle-v1a"
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- reg: Address and length of the register sets for the device
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- MAC registers
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- PCS registers
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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2014-11-05 06:06:56 +08:00
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- interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
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listed is required and is the general device interrupt. If the optional
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amd,per-channel-interrupt property is specified, then one additional
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interrupt for each DMA channel supported by the device should be specified
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2014-07-29 21:57:19 +08:00
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- clocks:
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- DMA clock for the amd-xgbe device (used for calculating the
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correct Rx interrupt watchdog timer value on a DMA channel
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for coalescing)
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- PTP clock for the amd-xgbe device
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- clock-names: Should be the names of the clocks
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- "dma_clk" for the DMA clock
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- "ptp_clk" for the PTP clock
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2014-06-05 22:15:00 +08:00
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- phy-handle: See ethernet.txt file in the same directory
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- phy-mode: See ethernet.txt file in the same directory
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Optional properties:
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- mac-address: mac address to be assigned to the device. Can be overridden
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by UEFI.
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2014-07-29 21:57:14 +08:00
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- dma-coherent: Present if dma operations are coherent
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2014-11-05 06:06:56 +08:00
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- amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate
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a unique interrupt for each DMA channel - this requires an additional
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interrupt be configured for each DMA channel
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2014-06-05 22:15:00 +08:00
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Example:
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xgbe@e0700000 {
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compatible = "amd,xgbe-seattle-v1a";
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reg = <0 0xe0700000 0 0x80000>,
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<0 0xe0780000 0 0x80000>;
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interrupt-parent = <&gic>;
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2014-11-05 06:06:56 +08:00
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interrupts = <0 325 4>,
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<0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>;
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amd,per-channel-interrupt;
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2014-07-29 21:57:19 +08:00
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clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
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clock-names = "dma_clk", "ptp_clk";
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2014-06-05 22:15:00 +08:00
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phy-handle = <&phy>;
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phy-mode = "xgmii";
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mac-address = [ 02 a1 a2 a3 a4 a5 ];
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};
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