2008-07-23 03:27:11 +08:00
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/*
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2007-10-10 23:16:19 +08:00
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* Kernel-based Virtual Machine driver for Linux
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*
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* This header defines architecture specific interfaces, x86 version
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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2008-10-23 13:26:29 +08:00
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#ifndef _ASM_X86_KVM_HOST_H
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#define _ASM_X86_KVM_HOST_H
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2007-10-10 23:16:19 +08:00
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2007-10-20 15:34:38 +08:00
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#include <linux/types.h>
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#include <linux/mm.h>
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2008-07-25 22:24:52 +08:00
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#include <linux/mmu_notifier.h>
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2009-06-17 20:22:14 +08:00
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#include <linux/tracepoint.h>
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2010-06-30 12:25:15 +08:00
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#include <linux/cpumask.h>
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2011-11-10 20:57:22 +08:00
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#include <linux/irq_work.h>
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2018-07-29 18:15:33 +08:00
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#include <linux/irq.h>
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2007-10-20 15:34:38 +08:00
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#include <linux/kvm.h>
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#include <linux/kvm_para.h>
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2007-12-16 17:02:48 +08:00
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#include <linux/kvm_types.h>
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2011-11-10 20:57:22 +08:00
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#include <linux/perf_event.h>
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2012-11-28 09:29:01 +08:00
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#include <linux/pvclock_gtod.h>
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#include <linux/clocksource.h>
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2015-09-18 22:29:40 +08:00
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#include <linux/irqbypass.h>
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2015-11-10 20:36:34 +08:00
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#include <linux/hyperv.h>
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2007-10-20 15:34:38 +08:00
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2016-06-16 06:23:45 +08:00
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#include <asm/apic.h>
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2008-06-03 22:17:31 +08:00
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#include <asm/pvclock-abi.h>
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2007-12-04 05:30:25 +08:00
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#include <asm/desc.h>
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2008-10-09 16:01:54 +08:00
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#include <asm/mtrr.h>
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2008-11-26 03:17:02 +08:00
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#include <asm/msr-index.h>
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2012-04-21 04:41:59 +08:00
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#include <asm/asm.h>
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KVM: page track: add the framework of guest page tracking
The array, gfn_track[mode][gfn], is introduced in memory slot for every
guest page, this is the tracking count for the gust page on different
modes. If the page is tracked then the count is increased, the page is
not tracked after the count reaches zero
We use 'unsigned short' as the tracking count which should be enough as
shadow page table only can use 2^14 (2^3 for level, 2^1 for cr4_pae, 2^2
for quadrant, 2^3 for access, 2^1 for nxe, 2^1 for cr0_wp, 2^1 for
smep_andnot_wp, 2^1 for smap_andnot_wp, and 2^1 for smm) at most, there
is enough room for other trackers
Two callbacks, kvm_page_track_create_memslot() and
kvm_page_track_free_memslot() are implemented in this patch, they are
internally used to initialize and reclaim the memory of the array
Currently, only write track mode is supported
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-24 17:51:09 +08:00
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#include <asm/kvm_page_track.h>
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2018-03-20 22:02:05 +08:00
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#include <asm/hyperv-tlfs.h>
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2007-12-04 05:30:25 +08:00
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2016-07-13 04:09:29 +08:00
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#define KVM_MAX_VCPUS 288
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2016-07-13 04:09:17 +08:00
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#define KVM_SOFT_MAX_VCPUS 240
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2016-07-13 04:09:30 +08:00
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#define KVM_MAX_VCPU_ID 1023
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2014-11-06 23:52:47 +08:00
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#define KVM_USER_MEM_SLOTS 509
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2012-12-11 01:33:15 +08:00
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/* memory slots that are not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 3
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2012-12-11 01:33:09 +08:00
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#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
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2011-11-24 17:37:48 +08:00
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2017-04-18 18:41:18 +08:00
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#define KVM_HALT_POLL_NS_DEFAULT 200000
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2008-03-21 18:38:23 +08:00
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2013-04-15 16:42:33 +08:00
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#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
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2016-01-07 22:05:10 +08:00
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/* x86-specific vcpu->requests bit members */
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2017-06-04 20:43:51 +08:00
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#define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
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#define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
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#define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
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#define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
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#define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
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2018-06-28 05:59:08 +08:00
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#define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
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2017-06-04 20:43:51 +08:00
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#define KVM_REQ_EVENT KVM_ARCH_REQ(6)
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#define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
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#define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
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#define KVM_REQ_NMI KVM_ARCH_REQ(9)
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#define KVM_REQ_PMU KVM_ARCH_REQ(10)
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#define KVM_REQ_PMI KVM_ARCH_REQ(11)
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#define KVM_REQ_SMI KVM_ARCH_REQ(12)
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#define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
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#define KVM_REQ_MCLOCK_INPROGRESS \
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KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_SCAN_IOAPIC \
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KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
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#define KVM_REQ_APIC_PAGE_RELOAD \
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KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
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#define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
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#define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
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#define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
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#define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
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KVM: nVMX: Do not load EOI-exitmap while running L2
When L1 IOAPIC redirection-table is written, a request of
KVM_REQ_SCAN_IOAPIC is set on all vCPUs. This is done such that
all vCPUs will now recalc their IOAPIC handled vectors and load
it to their EOI-exitmap.
However, it could be that one of the vCPUs is currently running
L2. In this case, load_eoi_exitmap() will be called which would
write to vmcs02->eoi_exit_bitmap, which is wrong because
vmcs02->eoi_exit_bitmap should always be equal to
vmcs12->eoi_exit_bitmap. Furthermore, at this point
KVM_REQ_SCAN_IOAPIC was already consumed and therefore we will
never update vmcs01->eoi_exit_bitmap. This could lead to remote_irr
of some IOAPIC level-triggered entry to remain set forever.
Fix this issue by delaying the load of EOI-exitmap to when vCPU
is running L1.
One may wonder why not just delay entire KVM_REQ_SCAN_IOAPIC
processing to when vCPU is running L1. This is done in order to handle
correctly the case where LAPIC & IO-APIC of L1 is pass-throughed into
L2. In this case, vmcs12->virtual_interrupt_delivery should be 0. In
current nVMX implementation, that results in
vmcs02->virtual_interrupt_delivery to also be 0. Thus,
vmcs02->eoi_exit_bitmap is not used. Therefore, every L2 EOI cause
a #VMExit into L0 (either on MSR_WRITE to x2APIC MSR or
APIC_ACCESS/APIC_WRITE/EPT_MISCONFIG to APIC MMIO page).
In order for such L2 EOI to be broadcasted, if needed, from LAPIC
to IO-APIC, vcpu->arch.ioapic_handled_vectors must be updated
while L2 is running. Therefore, patch makes sure to delay only the
loading of EOI-exitmap but not the update of
vcpu->arch.ioapic_handled_vectors.
Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-21 08:50:31 +08:00
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#define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
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2018-07-19 00:49:01 +08:00
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#define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
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2016-01-07 22:05:10 +08:00
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2011-04-04 18:39:28 +08:00
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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2012-07-02 09:18:48 +08:00
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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2013-04-28 07:37:47 +08:00
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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2017-08-24 20:27:56 +08:00
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| X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
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2016-07-12 16:36:41 +08:00
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| X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
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2011-04-04 18:39:28 +08:00
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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2007-11-19 14:33:37 +08:00
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#define INVALID_PAGE (~(hpa_t)0)
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2010-07-03 16:02:42 +08:00
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#define VALID_PAGE(x) ((x) != INVALID_PAGE)
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2007-11-19 14:33:37 +08:00
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#define UNMAPPED_GVA (~(gpa_t)0)
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2009-06-19 21:16:23 +08:00
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/* KVM Hugepage definitions for x86 */
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2018-09-28 22:08:50 +08:00
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enum {
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PT_PAGE_TABLE_LEVEL = 1,
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PT_DIRECTORY_LEVEL = 2,
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PT_PDPE_LEVEL = 3,
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/* set max level to the biggest one */
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PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
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};
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#define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
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PT_PAGE_TABLE_LEVEL + 1)
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2010-07-01 22:00:11 +08:00
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#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
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#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
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2009-06-19 21:16:23 +08:00
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#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
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#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
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#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
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2008-02-23 22:44:30 +08:00
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2013-10-03 05:22:28 +08:00
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static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
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{
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/* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
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return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
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(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
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}
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2007-12-14 09:41:22 +08:00
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#define KVM_PERMILLE_MMU_PAGES 20
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#define KVM_MIN_ALLOC_MMU_PAGES 64
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kvm: x86: reduce collisions in mmu_page_hash
When using two-dimensional paging, the mmu_page_hash (which provides
lookups for existing kvm_mmu_page structs), becomes imbalanced; with
too many collisions in buckets 0 and 512. This has been seen to cause
mmu_lock to be held for multiple milliseconds in kvm_mmu_get_page on
VMs with a large amount of RAM mapped with 4K pages.
The current hash function uses the lower 10 bits of gfn to index into
mmu_page_hash. When doing shadow paging, gfn is the address of the
guest page table being shadow. These tables are 4K-aligned, which
makes the low bits of gfn a good hash. However, with two-dimensional
paging, no guest page tables are being shadowed, so gfn is the base
address that is mapped by the table. Thus page tables (level=1) have
a 2MB aligned gfn, page directories (level=2) have a 1GB aligned gfn,
etc. This means hashes will only differ in their 10th bit.
hash_64() provides a better hash. For example, on a VM with ~200G
(99458 direct=1 kvm_mmu_page structs):
hash max_mmu_page_hash_collisions
--------------------------------------------
low 10 bits 49847
hash_64 105
perfect 97
While we're changing the hash, increase the table size by 4x to better
support large VMs (further reduces number of collisions in 200G VM to
29).
Note that hash_64() does not provide a good distribution prior to commit
ef703f49a6c5 ("Eliminate bad hash multipliers from hash_32() and
hash_64()").
Signed-off-by: David Matlack <dmatlack@google.com>
Change-Id: I5aa6b13c834722813c6cca46b8b1ed6f53368ade
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-12-20 05:58:25 +08:00
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#define KVM_MMU_HASH_SHIFT 12
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2008-01-07 19:20:25 +08:00
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#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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2007-12-14 09:41:22 +08:00
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#define KVM_MIN_FREE_MMU_PAGES 5
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#define KVM_REFILL_PAGES 25
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2010-12-01 19:17:44 +08:00
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#define KVM_MAX_CPUID_ENTRIES 80
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2008-10-09 16:01:54 +08:00
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#define KVM_NR_FIXED_MTRR_REGION 88
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2014-08-18 22:39:48 +08:00
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#define KVM_NR_VAR_MTRR 8
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2007-12-14 09:41:22 +08:00
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2010-10-14 17:22:46 +08:00
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#define ASYNC_PF_PER_VCPU 64
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2008-06-28 01:58:02 +08:00
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enum kvm_reg {
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2007-11-19 14:56:05 +08:00
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VCPU_REGS_RAX = 0,
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VCPU_REGS_RCX = 1,
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VCPU_REGS_RDX = 2,
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VCPU_REGS_RBX = 3,
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VCPU_REGS_RSP = 4,
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VCPU_REGS_RBP = 5,
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VCPU_REGS_RSI = 6,
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VCPU_REGS_RDI = 7,
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#ifdef CONFIG_X86_64
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VCPU_REGS_R8 = 8,
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VCPU_REGS_R9 = 9,
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VCPU_REGS_R10 = 10,
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VCPU_REGS_R11 = 11,
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VCPU_REGS_R12 = 12,
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VCPU_REGS_R13 = 13,
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VCPU_REGS_R14 = 14,
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VCPU_REGS_R15 = 15,
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#endif
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2008-06-28 01:58:02 +08:00
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VCPU_REGS_RIP,
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2007-11-19 14:56:05 +08:00
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NR_VCPU_REGS
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};
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2009-06-01 03:58:47 +08:00
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enum kvm_reg_ex {
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VCPU_EXREG_PDPTR = NR_VCPU_REGS,
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2010-12-06 00:56:11 +08:00
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VCPU_EXREG_CR3,
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2011-03-07 18:51:22 +08:00
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VCPU_EXREG_RFLAGS,
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2011-04-28 00:42:18 +08:00
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VCPU_EXREG_SEGMENTS,
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2009-06-01 03:58:47 +08:00
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};
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2007-11-19 14:56:05 +08:00
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enum {
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2008-05-27 21:26:01 +08:00
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VCPU_SREG_ES,
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2007-11-19 14:56:05 +08:00
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VCPU_SREG_CS,
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2008-05-27 21:26:01 +08:00
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VCPU_SREG_SS,
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2007-11-19 14:56:05 +08:00
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VCPU_SREG_DS,
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VCPU_SREG_FS,
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VCPU_SREG_GS,
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VCPU_SREG_TR,
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VCPU_SREG_LDTR,
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};
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2009-08-12 20:04:37 +08:00
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#include <asm/kvm_emulate.h>
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2007-11-19 14:56:05 +08:00
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2007-12-14 09:41:22 +08:00
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#define KVM_NR_MEM_OBJS 40
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2008-12-15 20:52:10 +08:00
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#define KVM_NR_DB_REGS 4
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#define DR6_BD (1 << 13)
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#define DR6_BS (1 << 14)
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2018-09-22 01:36:17 +08:00
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#define DR6_BT (1 << 15)
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2014-07-15 22:37:46 +08:00
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#define DR6_RTM (1 << 16)
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#define DR6_FIXED_1 0xfffe0ff0
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#define DR6_INIT 0xffff0ff0
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#define DR6_VOLATILE 0x0001e00f
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2008-12-15 20:52:10 +08:00
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#define DR7_BP_EN_MASK 0x000000ff
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#define DR7_GE (1 << 9)
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#define DR7_GD (1 << 13)
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#define DR7_FIXED_1 0x00000400
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2014-07-15 22:37:46 +08:00
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#define DR7_VOLATILE 0xffff2bff
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2008-12-15 20:52:10 +08:00
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2014-12-25 08:52:16 +08:00
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#define PFERR_PRESENT_BIT 0
|
|
|
|
#define PFERR_WRITE_BIT 1
|
|
|
|
#define PFERR_USER_BIT 2
|
|
|
|
#define PFERR_RSVD_BIT 3
|
|
|
|
#define PFERR_FETCH_BIT 4
|
2016-03-22 16:51:20 +08:00
|
|
|
#define PFERR_PK_BIT 5
|
2016-11-24 01:01:38 +08:00
|
|
|
#define PFERR_GUEST_FINAL_BIT 32
|
|
|
|
#define PFERR_GUEST_PAGE_BIT 33
|
2014-12-25 08:52:16 +08:00
|
|
|
|
|
|
|
#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
|
|
|
|
#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
|
|
|
|
#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
|
|
|
|
#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
|
|
|
|
#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
|
2016-03-22 16:51:20 +08:00
|
|
|
#define PFERR_PK_MASK (1U << PFERR_PK_BIT)
|
2016-11-24 01:01:38 +08:00
|
|
|
#define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
|
|
|
|
#define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
|
|
|
|
|
|
|
|
#define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
|
|
|
|
PFERR_WRITE_MASK | \
|
|
|
|
PFERR_PRESENT_MASK)
|
2014-12-25 08:52:16 +08:00
|
|
|
|
2016-12-07 08:46:15 +08:00
|
|
|
/*
|
|
|
|
* The mask used to denote special SPTEs, which can be either MMIO SPTEs or
|
|
|
|
* Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting
|
|
|
|
* with the SVE bit in EPT PTEs.
|
|
|
|
*/
|
|
|
|
#define SPTE_SPECIAL_MASK (1ULL << 62)
|
|
|
|
|
2012-04-19 19:06:29 +08:00
|
|
|
/* apic attention bits */
|
|
|
|
#define KVM_APIC_CHECK_VAPIC 0
|
2012-06-25 00:25:07 +08:00
|
|
|
/*
|
|
|
|
* The following bit is set with PV-EOI, unset on EOI.
|
|
|
|
* We detect PV-EOI changes by guest by comparing
|
|
|
|
* this bit with PV-EOI in guest memory.
|
|
|
|
* See the implementation in apic_update_pv_eoi.
|
|
|
|
*/
|
|
|
|
#define KVM_APIC_PV_EOI_PENDING 1
|
2012-04-19 19:06:29 +08:00
|
|
|
|
2015-09-18 22:29:49 +08:00
|
|
|
struct kvm_kernel_irq_routing_entry;
|
|
|
|
|
2007-12-14 09:41:22 +08:00
|
|
|
/*
|
|
|
|
* We don't want allocation failures within the mmu code, so we preallocate
|
|
|
|
* enough memory for a single page fault in a cache.
|
|
|
|
*/
|
|
|
|
struct kvm_mmu_memory_cache {
|
|
|
|
int nobjs;
|
|
|
|
void *objects[KVM_NR_MEM_OBJS];
|
|
|
|
};
|
|
|
|
|
KVM: page track: add the framework of guest page tracking
The array, gfn_track[mode][gfn], is introduced in memory slot for every
guest page, this is the tracking count for the gust page on different
modes. If the page is tracked then the count is increased, the page is
not tracked after the count reaches zero
We use 'unsigned short' as the tracking count which should be enough as
shadow page table only can use 2^14 (2^3 for level, 2^1 for cr4_pae, 2^2
for quadrant, 2^3 for access, 2^1 for nxe, 2^1 for cr0_wp, 2^1 for
smep_andnot_wp, 2^1 for smap_andnot_wp, and 2^1 for smm) at most, there
is enough room for other trackers
Two callbacks, kvm_page_track_create_memslot() and
kvm_page_track_free_memslot() are implemented in this patch, they are
internally used to initialize and reclaim the memory of the array
Currently, only write track mode is supported
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-24 17:51:09 +08:00
|
|
|
/*
|
|
|
|
* the pages used as guest page table on soft mmu are tracked by
|
|
|
|
* kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
|
|
|
|
* by indirect shadow page can not be more than 15 bits.
|
|
|
|
*
|
|
|
|
* Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
|
|
|
|
* @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
|
|
|
|
*/
|
2007-12-14 09:41:22 +08:00
|
|
|
union kvm_mmu_page_role {
|
2018-10-09 03:28:10 +08:00
|
|
|
u32 word;
|
2007-12-14 09:41:22 +08:00
|
|
|
struct {
|
2008-03-23 16:02:34 +08:00
|
|
|
unsigned level:4;
|
2010-04-15 00:20:03 +08:00
|
|
|
unsigned cr4_pae:1;
|
2008-03-23 16:02:34 +08:00
|
|
|
unsigned quadrant:2;
|
2009-01-11 19:02:10 +08:00
|
|
|
unsigned direct:1;
|
2008-03-23 16:02:34 +08:00
|
|
|
unsigned access:3;
|
2008-02-21 03:47:24 +08:00
|
|
|
unsigned invalid:1;
|
2009-03-31 16:31:54 +08:00
|
|
|
unsigned nxe:1;
|
2010-05-12 16:48:18 +08:00
|
|
|
unsigned cr0_wp:1;
|
2011-06-06 21:11:54 +08:00
|
|
|
unsigned smep_andnot_wp:1;
|
2015-05-11 22:55:21 +08:00
|
|
|
unsigned smap_andnot_wp:1;
|
2017-07-01 08:26:31 +08:00
|
|
|
unsigned ad_disabled:1;
|
2018-05-10 05:02:04 +08:00
|
|
|
unsigned guest_mode:1;
|
|
|
|
unsigned :6;
|
2015-05-18 21:03:39 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This is left at the top of the word so that
|
|
|
|
* kvm_memslots_for_spte_role can extract it with a
|
|
|
|
* simple shift. While there is room, give it a whole
|
|
|
|
* byte so it is also faster to load it from memory.
|
|
|
|
*/
|
|
|
|
unsigned smm:8;
|
2007-12-14 09:41:22 +08:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2018-10-09 03:28:10 +08:00
|
|
|
union kvm_mmu_extended_role {
|
2018-10-09 03:28:11 +08:00
|
|
|
/*
|
|
|
|
* This structure complements kvm_mmu_page_role caching everything needed for
|
|
|
|
* MMU configuration. If nothing in both these structures changed, MMU
|
|
|
|
* re-configuration can be skipped. @valid bit is set on first usage so we don't
|
|
|
|
* treat all-zero structure as valid data.
|
|
|
|
*/
|
2018-10-09 03:28:10 +08:00
|
|
|
u32 word;
|
2018-10-09 03:28:11 +08:00
|
|
|
struct {
|
|
|
|
unsigned int valid:1;
|
|
|
|
unsigned int execonly:1;
|
|
|
|
unsigned int cr4_pse:1;
|
|
|
|
unsigned int cr4_pke:1;
|
|
|
|
unsigned int cr4_smap:1;
|
|
|
|
unsigned int cr4_smep:1;
|
|
|
|
};
|
2018-10-09 03:28:10 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
union kvm_mmu_role {
|
|
|
|
u64 as_u64;
|
|
|
|
struct {
|
|
|
|
union kvm_mmu_page_role base;
|
|
|
|
union kvm_mmu_extended_role ext;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2015-11-20 16:41:28 +08:00
|
|
|
struct kvm_rmap_head {
|
|
|
|
unsigned long val;
|
|
|
|
};
|
|
|
|
|
2007-12-14 09:41:22 +08:00
|
|
|
struct kvm_mmu_page {
|
|
|
|
struct list_head link;
|
|
|
|
struct hlist_node hash_link;
|
2018-09-06 05:58:16 +08:00
|
|
|
bool unsync;
|
2007-12-14 09:41:22 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The following two entries are used to key the shadow page in the
|
|
|
|
* hash table.
|
|
|
|
*/
|
|
|
|
union kvm_mmu_page_role role;
|
2018-09-06 05:58:16 +08:00
|
|
|
gfn_t gfn;
|
2007-12-14 09:41:22 +08:00
|
|
|
|
|
|
|
u64 *spt;
|
|
|
|
/* hold the gfn of each spte inside spt */
|
|
|
|
gfn_t *gfns;
|
2010-04-16 21:27:54 +08:00
|
|
|
int root_count; /* Currently serving as active root */
|
2008-12-02 08:32:02 +08:00
|
|
|
unsigned int unsync_children;
|
2015-11-20 16:41:28 +08:00
|
|
|
struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
|
2013-06-19 17:09:24 +08:00
|
|
|
|
|
|
|
/* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
|
2013-05-31 08:36:22 +08:00
|
|
|
unsigned long mmu_valid_gen;
|
2013-06-19 17:09:24 +08:00
|
|
|
|
2008-09-24 00:18:40 +08:00
|
|
|
DECLARE_BITMAP(unsync_child_bitmap, 512);
|
2011-07-12 03:32:13 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_X86_32
|
2013-06-19 17:09:20 +08:00
|
|
|
/*
|
|
|
|
* Used out of the mmu-lock to avoid reading spte values while an
|
|
|
|
* update is in progress; see the comments in __get_spte_lockless().
|
|
|
|
*/
|
2011-07-12 03:32:13 +08:00
|
|
|
int clear_spte_count;
|
|
|
|
#endif
|
|
|
|
|
2013-06-19 17:09:21 +08:00
|
|
|
/* Number of writes since the last time traversal visited this page. */
|
2016-02-24 17:51:12 +08:00
|
|
|
atomic_t write_flooding_count;
|
2007-12-14 09:41:22 +08:00
|
|
|
};
|
|
|
|
|
2009-01-04 18:39:07 +08:00
|
|
|
struct kvm_pio_request {
|
|
|
|
unsigned long count;
|
|
|
|
int in;
|
|
|
|
int port;
|
|
|
|
int size;
|
|
|
|
};
|
|
|
|
|
2017-08-24 20:27:55 +08:00
|
|
|
#define PT64_ROOT_MAX_LEVEL 5
|
2017-08-24 20:27:54 +08:00
|
|
|
|
2015-08-05 12:04:21 +08:00
|
|
|
struct rsvd_bits_validate {
|
2017-08-24 20:27:54 +08:00
|
|
|
u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
|
2015-08-05 12:04:21 +08:00
|
|
|
u64 bad_mt_xwr;
|
|
|
|
};
|
|
|
|
|
2018-06-28 05:59:06 +08:00
|
|
|
struct kvm_mmu_root_info {
|
|
|
|
gpa_t cr3;
|
|
|
|
hpa_t hpa;
|
|
|
|
};
|
|
|
|
|
|
|
|
#define KVM_MMU_ROOT_INFO_INVALID \
|
|
|
|
((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
|
|
|
|
|
2018-06-28 05:59:20 +08:00
|
|
|
#define KVM_MMU_NUM_PREV_ROOTS 3
|
|
|
|
|
2007-12-14 09:41:22 +08:00
|
|
|
/*
|
2017-08-24 20:27:55 +08:00
|
|
|
* x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
|
|
|
|
* and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
|
|
|
|
* current mmu mode.
|
2007-12-14 09:41:22 +08:00
|
|
|
*/
|
|
|
|
struct kvm_mmu {
|
2010-09-10 23:30:40 +08:00
|
|
|
void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
|
2010-09-10 23:30:42 +08:00
|
|
|
unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
|
2011-07-28 16:36:17 +08:00
|
|
|
u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
|
2010-12-07 10:48:06 +08:00
|
|
|
int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
|
|
|
|
bool prefault);
|
2010-11-29 22:12:30 +08:00
|
|
|
void (*inject_page_fault)(struct kvm_vcpu *vcpu,
|
|
|
|
struct x86_exception *fault);
|
2010-02-10 20:21:32 +08:00
|
|
|
gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
|
2010-11-22 23:53:26 +08:00
|
|
|
struct x86_exception *exception);
|
2014-09-02 19:23:06 +08:00
|
|
|
gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception);
|
2008-09-24 00:18:33 +08:00
|
|
|
int (*sync_page)(struct kvm_vcpu *vcpu,
|
2010-11-19 17:04:03 +08:00
|
|
|
struct kvm_mmu_page *sp);
|
2018-06-28 05:59:16 +08:00
|
|
|
void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
|
2011-03-09 15:43:51 +08:00
|
|
|
void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
|
2011-03-28 10:29:27 +08:00
|
|
|
u64 *spte, const void *pte);
|
2007-12-14 09:41:22 +08:00
|
|
|
hpa_t root_hpa;
|
2018-10-09 03:28:10 +08:00
|
|
|
union kvm_mmu_role mmu_role;
|
2017-03-30 17:55:30 +08:00
|
|
|
u8 root_level;
|
|
|
|
u8 shadow_root_level;
|
|
|
|
u8 ept_ad;
|
2010-09-10 23:30:39 +08:00
|
|
|
bool direct_map;
|
2018-06-28 05:59:20 +08:00
|
|
|
struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
|
2007-12-14 09:41:22 +08:00
|
|
|
|
KVM: MMU: Optimize pte permission checks
walk_addr_generic() permission checks are a maze of branchy code, which is
performed four times per lookup. It depends on the type of access, efer.nxe,
cr0.wp, cr4.smep, and in the near future, cr4.smap.
Optimize this away by precalculating all variants and storing them in a
bitmap. The bitmap is recalculated when rarely-changing variables change
(cr0, cr4) and is indexed by the often-changing variables (page fault error
code, pte access permissions).
The permission check is moved to the end of the loop, otherwise an SMEP
fault could be reported as a false positive, when PDE.U=1 but PTE.U=0.
Noted by Xiao Guangrong.
The result is short, branch-free code.
Reviewed-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-09-12 19:52:00 +08:00
|
|
|
/*
|
|
|
|
* Bitmap; bit set = permission fault
|
|
|
|
* Byte index: page fault error code [4:1]
|
|
|
|
* Bit index: pte permissions in ACC_* format
|
|
|
|
*/
|
|
|
|
u8 permissions[16];
|
|
|
|
|
2016-03-22 16:51:19 +08:00
|
|
|
/*
|
|
|
|
* The pkru_mask indicates if protection key checks are needed. It
|
|
|
|
* consists of 16 domains indexed by page fault error code bits [4:1],
|
|
|
|
* with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
|
|
|
|
* Each domain has 2 bits which are ANDed with AD and WD from PKRU.
|
|
|
|
*/
|
|
|
|
u32 pkru_mask;
|
|
|
|
|
2007-12-14 09:41:22 +08:00
|
|
|
u64 *pae_root;
|
2010-09-10 23:31:00 +08:00
|
|
|
u64 *lm_root;
|
2015-08-05 12:04:24 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* check zero bits on shadow page table entries, these
|
|
|
|
* bits include not only hardware reserved bits but also
|
|
|
|
* the bits spte never used.
|
|
|
|
*/
|
|
|
|
struct rsvd_bits_validate shadow_zero_check;
|
|
|
|
|
2015-08-05 12:04:21 +08:00
|
|
|
struct rsvd_bits_validate guest_rsvd_check;
|
2010-09-10 23:30:57 +08:00
|
|
|
|
2016-02-23 19:51:19 +08:00
|
|
|
/* Can have large pages at levels 2..last_nonleaf_level-1. */
|
|
|
|
u8 last_nonleaf_level;
|
2012-09-13 01:46:56 +08:00
|
|
|
|
2010-09-10 23:31:01 +08:00
|
|
|
bool nx;
|
|
|
|
|
2010-09-10 23:30:57 +08:00
|
|
|
u64 pdptrs[4]; /* pae */
|
2007-12-14 09:41:22 +08:00
|
|
|
};
|
|
|
|
|
2011-11-10 20:57:22 +08:00
|
|
|
enum pmc_type {
|
|
|
|
KVM_PMC_GP = 0,
|
|
|
|
KVM_PMC_FIXED,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_pmc {
|
|
|
|
enum pmc_type type;
|
|
|
|
u8 idx;
|
|
|
|
u64 counter;
|
|
|
|
u64 eventsel;
|
|
|
|
struct perf_event *perf_event;
|
|
|
|
struct kvm_vcpu *vcpu;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_pmu {
|
|
|
|
unsigned nr_arch_gp_counters;
|
|
|
|
unsigned nr_arch_fixed_counters;
|
|
|
|
unsigned available_event_types;
|
|
|
|
u64 fixed_ctr_ctrl;
|
|
|
|
u64 global_ctrl;
|
|
|
|
u64 global_status;
|
|
|
|
u64 global_ovf_ctrl;
|
|
|
|
u64 counter_bitmask[2];
|
|
|
|
u64 global_ctrl_mask;
|
2013-07-19 06:57:02 +08:00
|
|
|
u64 reserved_bits;
|
2011-11-10 20:57:22 +08:00
|
|
|
u8 version;
|
2012-06-21 02:46:33 +08:00
|
|
|
struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
|
|
|
|
struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
|
2011-11-10 20:57:22 +08:00
|
|
|
struct irq_work irq_work;
|
|
|
|
u64 reprogram_pmi;
|
|
|
|
};
|
|
|
|
|
2015-06-19 21:45:05 +08:00
|
|
|
struct kvm_pmu_ops;
|
|
|
|
|
2014-02-21 16:55:56 +08:00
|
|
|
enum {
|
|
|
|
KVM_DEBUGREG_BP_ENABLED = 1,
|
2014-02-21 17:17:24 +08:00
|
|
|
KVM_DEBUGREG_WONT_EXIT = 2,
|
2015-04-02 08:10:37 +08:00
|
|
|
KVM_DEBUGREG_RELOAD = 4,
|
2014-02-21 16:55:56 +08:00
|
|
|
};
|
|
|
|
|
2015-06-15 16:55:27 +08:00
|
|
|
struct kvm_mtrr_range {
|
|
|
|
u64 base;
|
|
|
|
u64 mask;
|
2015-06-15 16:55:31 +08:00
|
|
|
struct list_head node;
|
2015-06-15 16:55:27 +08:00
|
|
|
};
|
|
|
|
|
2015-06-15 16:55:24 +08:00
|
|
|
struct kvm_mtrr {
|
2015-06-15 16:55:27 +08:00
|
|
|
struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
|
2015-06-15 16:55:24 +08:00
|
|
|
mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
|
2015-06-15 16:55:26 +08:00
|
|
|
u64 deftype;
|
2015-06-15 16:55:31 +08:00
|
|
|
|
|
|
|
struct list_head head;
|
2015-06-15 16:55:24 +08:00
|
|
|
};
|
|
|
|
|
2015-12-01 00:22:21 +08:00
|
|
|
/* Hyper-V SynIC timer */
|
|
|
|
struct kvm_vcpu_hv_stimer {
|
|
|
|
struct hrtimer timer;
|
|
|
|
int index;
|
|
|
|
u64 config;
|
|
|
|
u64 count;
|
|
|
|
u64 exp_time;
|
|
|
|
struct hv_message msg;
|
|
|
|
bool msg_pending;
|
|
|
|
};
|
|
|
|
|
2015-11-10 20:36:34 +08:00
|
|
|
/* Hyper-V synthetic interrupt controller (SynIC)*/
|
|
|
|
struct kvm_vcpu_hv_synic {
|
|
|
|
u64 version;
|
|
|
|
u64 control;
|
|
|
|
u64 msg_page;
|
|
|
|
u64 evt_page;
|
|
|
|
atomic64_t sint[HV_SYNIC_SINT_COUNT];
|
|
|
|
atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
|
|
|
|
DECLARE_BITMAP(auto_eoi_bitmap, 256);
|
|
|
|
DECLARE_BITMAP(vec_bitmap, 256);
|
|
|
|
bool active;
|
kvm: x86: hyperv: add KVM_CAP_HYPERV_SYNIC2
There is a flaw in the Hyper-V SynIC implementation in KVM: when message
page or event flags page is enabled by setting the corresponding msr,
KVM zeroes it out. This is problematic because on migration the
corresponding MSRs are loaded on the destination, so the content of
those pages is lost.
This went unnoticed so far because the only user of those pages was
in-KVM hyperv synic timers, which could continue working despite that
zeroing.
Newer QEMU uses those pages for Hyper-V VMBus implementation, and
zeroing them breaks the migration.
Besides, in newer QEMU the content of those pages is fully managed by
QEMU, so zeroing them is undesirable even when writing the MSRs from the
guest side.
To support this new scheme, introduce a new capability,
KVM_CAP_HYPERV_SYNIC2, which, when enabled, makes sure that the synic
pages aren't zeroed out in KVM.
Signed-off-by: Roman Kagan <rkagan@virtuozzo.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-06-22 21:51:01 +08:00
|
|
|
bool dont_zero_synic_pages;
|
2015-11-10 20:36:34 +08:00
|
|
|
};
|
|
|
|
|
2015-07-03 20:01:34 +08:00
|
|
|
/* Hyper-V per vcpu emulation context */
|
|
|
|
struct kvm_vcpu_hv {
|
2017-07-14 22:13:20 +08:00
|
|
|
u32 vp_index;
|
2015-07-03 20:01:34 +08:00
|
|
|
u64 hv_vapic;
|
2015-09-16 17:29:50 +08:00
|
|
|
s64 runtime_offset;
|
2015-11-10 20:36:34 +08:00
|
|
|
struct kvm_vcpu_hv_synic synic;
|
2015-11-10 20:36:35 +08:00
|
|
|
struct kvm_hyperv_exit exit;
|
2015-12-01 00:22:21 +08:00
|
|
|
struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
|
|
|
|
DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
|
2018-10-09 01:19:04 +08:00
|
|
|
cpumask_t tlb_flush;
|
2015-07-03 20:01:34 +08:00
|
|
|
};
|
|
|
|
|
2007-12-13 23:50:52 +08:00
|
|
|
struct kvm_vcpu_arch {
|
2008-06-28 01:58:02 +08:00
|
|
|
/*
|
|
|
|
* rip and regs accesses must go through
|
|
|
|
* kvm_{register,rip}_{read,write} functions.
|
|
|
|
*/
|
|
|
|
unsigned long regs[NR_VCPU_REGS];
|
|
|
|
u32 regs_avail;
|
|
|
|
u32 regs_dirty;
|
2007-10-20 15:34:38 +08:00
|
|
|
|
|
|
|
unsigned long cr0;
|
2009-12-30 00:43:06 +08:00
|
|
|
unsigned long cr0_guest_owned_bits;
|
2007-10-20 15:34:38 +08:00
|
|
|
unsigned long cr2;
|
|
|
|
unsigned long cr3;
|
|
|
|
unsigned long cr4;
|
2009-12-07 18:16:48 +08:00
|
|
|
unsigned long cr4_guest_owned_bits;
|
2007-10-20 15:34:38 +08:00
|
|
|
unsigned long cr8;
|
2017-08-24 05:14:38 +08:00
|
|
|
u32 pkru;
|
2008-11-26 03:17:04 +08:00
|
|
|
u32 hflags;
|
2010-01-21 21:31:50 +08:00
|
|
|
u64 efer;
|
2007-10-20 15:34:38 +08:00
|
|
|
u64 apic_base;
|
|
|
|
struct kvm_lapic *apic; /* kernel irqchip context */
|
2015-11-10 20:36:33 +08:00
|
|
|
bool apicv_active;
|
KVM: nVMX: Do not load EOI-exitmap while running L2
When L1 IOAPIC redirection-table is written, a request of
KVM_REQ_SCAN_IOAPIC is set on all vCPUs. This is done such that
all vCPUs will now recalc their IOAPIC handled vectors and load
it to their EOI-exitmap.
However, it could be that one of the vCPUs is currently running
L2. In this case, load_eoi_exitmap() will be called which would
write to vmcs02->eoi_exit_bitmap, which is wrong because
vmcs02->eoi_exit_bitmap should always be equal to
vmcs12->eoi_exit_bitmap. Furthermore, at this point
KVM_REQ_SCAN_IOAPIC was already consumed and therefore we will
never update vmcs01->eoi_exit_bitmap. This could lead to remote_irr
of some IOAPIC level-triggered entry to remain set forever.
Fix this issue by delaying the load of EOI-exitmap to when vCPU
is running L1.
One may wonder why not just delay entire KVM_REQ_SCAN_IOAPIC
processing to when vCPU is running L1. This is done in order to handle
correctly the case where LAPIC & IO-APIC of L1 is pass-throughed into
L2. In this case, vmcs12->virtual_interrupt_delivery should be 0. In
current nVMX implementation, that results in
vmcs02->virtual_interrupt_delivery to also be 0. Thus,
vmcs02->eoi_exit_bitmap is not used. Therefore, every L2 EOI cause
a #VMExit into L0 (either on MSR_WRITE to x2APIC MSR or
APIC_ACCESS/APIC_WRITE/EPT_MISCONFIG to APIC MMIO page).
In order for such L2 EOI to be broadcasted, if needed, from LAPIC
to IO-APIC, vcpu->arch.ioapic_handled_vectors must be updated
while L2 is running. Therefore, patch makes sure to delay only the
loading of EOI-exitmap but not the update of
vcpu->arch.ioapic_handled_vectors.
Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-21 08:50:31 +08:00
|
|
|
bool load_eoi_exitmap_pending;
|
2015-11-10 20:36:32 +08:00
|
|
|
DECLARE_BITMAP(ioapic_handled_vectors, 256);
|
2012-04-19 19:06:29 +08:00
|
|
|
unsigned long apic_attention;
|
2009-03-05 22:34:59 +08:00
|
|
|
int32_t apic_arb_prio;
|
2007-10-20 15:34:38 +08:00
|
|
|
int mp_state;
|
|
|
|
u64 ia32_misc_enable_msr;
|
2015-05-07 17:36:11 +08:00
|
|
|
u64 smbase;
|
2017-11-15 19:43:14 +08:00
|
|
|
u64 smi_count;
|
2007-10-22 22:50:39 +08:00
|
|
|
bool tpr_access_reporting;
|
2014-12-02 19:14:59 +08:00
|
|
|
u64 ia32_xss;
|
2018-02-28 14:03:31 +08:00
|
|
|
u64 microcode_version;
|
2007-10-20 15:34:38 +08:00
|
|
|
|
2010-09-10 23:30:49 +08:00
|
|
|
/*
|
|
|
|
* Paging state of the vcpu
|
|
|
|
*
|
|
|
|
* If the vcpu runs in guest mode with two level paging this still saves
|
|
|
|
* the paging mode of the l1 guest. This context is always used to
|
|
|
|
* handle faults.
|
|
|
|
*/
|
2018-10-09 03:28:05 +08:00
|
|
|
struct kvm_mmu *mmu;
|
|
|
|
|
|
|
|
/* Non-nested MMU for L1 */
|
|
|
|
struct kvm_mmu root_mmu;
|
2010-09-10 23:30:46 +08:00
|
|
|
|
2018-10-09 03:28:08 +08:00
|
|
|
/* L1 MMU when running nested */
|
|
|
|
struct kvm_mmu guest_mmu;
|
|
|
|
|
2010-09-10 23:30:50 +08:00
|
|
|
/*
|
|
|
|
* Paging state of an L2 guest (used for nested npt)
|
|
|
|
*
|
|
|
|
* This context will save all necessary information to walk page tables
|
|
|
|
* of the an L2 guest. This context is only initialized for page table
|
|
|
|
* walking and not for faulting since we never handle l2 page faults on
|
|
|
|
* the host.
|
|
|
|
*/
|
|
|
|
struct kvm_mmu nested_mmu;
|
|
|
|
|
2010-09-10 23:30:49 +08:00
|
|
|
/*
|
|
|
|
* Pointer to the mmu context currently used for
|
|
|
|
* gva_to_gpa translations.
|
|
|
|
*/
|
|
|
|
struct kvm_mmu *walk_mmu;
|
|
|
|
|
2011-05-15 23:26:20 +08:00
|
|
|
struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
|
2007-10-20 15:34:38 +08:00
|
|
|
struct kvm_mmu_memory_cache mmu_page_cache;
|
|
|
|
struct kvm_mmu_memory_cache mmu_page_header_cache;
|
|
|
|
|
x86,kvm: move qemu/guest FPU switching out to vcpu_run
Currently, every time a VCPU is scheduled out, the host kernel will
first save the guest FPU/xstate context, then load the qemu userspace
FPU context, only to then immediately save the qemu userspace FPU
context back to memory. When scheduling in a VCPU, the same extraneous
FPU loads and saves are done.
This could be avoided by moving from a model where the guest FPU is
loaded and stored with preemption disabled, to a model where the
qemu userspace FPU is swapped out for the guest FPU context for
the duration of the KVM_RUN ioctl.
This is done under the VCPU mutex, which is also taken when other
tasks inspect the VCPU FPU context, so the code should already be
safe for this change. That should come as no surprise, given that
s390 already has this optimization.
This can fix a bug where KVM calls get_user_pages while owning the
FPU, and the file system ends up requesting the FPU again:
[258270.527947] __warn+0xcb/0xf0
[258270.527948] warn_slowpath_null+0x1d/0x20
[258270.527951] kernel_fpu_disable+0x3f/0x50
[258270.527953] __kernel_fpu_begin+0x49/0x100
[258270.527955] kernel_fpu_begin+0xe/0x10
[258270.527958] crc32c_pcl_intel_update+0x84/0xb0
[258270.527961] crypto_shash_update+0x3f/0x110
[258270.527968] crc32c+0x63/0x8a [libcrc32c]
[258270.527975] dm_bm_checksum+0x1b/0x20 [dm_persistent_data]
[258270.527978] node_prepare_for_write+0x44/0x70 [dm_persistent_data]
[258270.527985] dm_block_manager_write_callback+0x41/0x50 [dm_persistent_data]
[258270.527988] submit_io+0x170/0x1b0 [dm_bufio]
[258270.527992] __write_dirty_buffer+0x89/0x90 [dm_bufio]
[258270.527994] __make_buffer_clean+0x4f/0x80 [dm_bufio]
[258270.527996] __try_evict_buffer+0x42/0x60 [dm_bufio]
[258270.527998] dm_bufio_shrink_scan+0xc0/0x130 [dm_bufio]
[258270.528002] shrink_slab.part.40+0x1f5/0x420
[258270.528004] shrink_node+0x22c/0x320
[258270.528006] do_try_to_free_pages+0xf5/0x330
[258270.528008] try_to_free_pages+0xe9/0x190
[258270.528009] __alloc_pages_slowpath+0x40f/0xba0
[258270.528011] __alloc_pages_nodemask+0x209/0x260
[258270.528014] alloc_pages_vma+0x1f1/0x250
[258270.528017] do_huge_pmd_anonymous_page+0x123/0x660
[258270.528021] handle_mm_fault+0xfd3/0x1330
[258270.528025] __get_user_pages+0x113/0x640
[258270.528027] get_user_pages+0x4f/0x60
[258270.528063] __gfn_to_pfn_memslot+0x120/0x3f0 [kvm]
[258270.528108] try_async_pf+0x66/0x230 [kvm]
[258270.528135] tdp_page_fault+0x130/0x280 [kvm]
[258270.528149] kvm_mmu_page_fault+0x60/0x120 [kvm]
[258270.528158] handle_ept_violation+0x91/0x170 [kvm_intel]
[258270.528162] vmx_handle_exit+0x1ca/0x1400 [kvm_intel]
No performance changes were detected in quick ping-pong tests on
my 4 socket system, which is expected since an FPU+xstate load is
on the order of 0.1us, while ping-ponging between CPUs is on the
order of 20us, and somewhat noisy.
Cc: stable@vger.kernel.org
Signed-off-by: Rik van Riel <riel@redhat.com>
Suggested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[Fixed a bug where reset_vcpu called put_fpu without preceding load_fpu,
which happened inside from KVM_CREATE_VCPU ioctl. - Radim]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-11-15 05:54:23 +08:00
|
|
|
/*
|
|
|
|
* QEMU userspace and the guest each have their own FPU state.
|
|
|
|
* In vcpu_run, we switch between the user and guest FPU contexts.
|
|
|
|
* While running a VCPU, the VCPU thread will have the guest FPU
|
|
|
|
* context.
|
|
|
|
*
|
|
|
|
* Note that while the PKRU state lives inside the fpu registers,
|
|
|
|
* it is switched out separately at VMENTER and VMEXIT time. The
|
|
|
|
* "guest_fpu" state here contains the guest FPU context, with the
|
|
|
|
* host PRKU bits.
|
|
|
|
*/
|
|
|
|
struct fpu user_fpu;
|
2010-05-17 17:08:28 +08:00
|
|
|
struct fpu guest_fpu;
|
x86,kvm: move qemu/guest FPU switching out to vcpu_run
Currently, every time a VCPU is scheduled out, the host kernel will
first save the guest FPU/xstate context, then load the qemu userspace
FPU context, only to then immediately save the qemu userspace FPU
context back to memory. When scheduling in a VCPU, the same extraneous
FPU loads and saves are done.
This could be avoided by moving from a model where the guest FPU is
loaded and stored with preemption disabled, to a model where the
qemu userspace FPU is swapped out for the guest FPU context for
the duration of the KVM_RUN ioctl.
This is done under the VCPU mutex, which is also taken when other
tasks inspect the VCPU FPU context, so the code should already be
safe for this change. That should come as no surprise, given that
s390 already has this optimization.
This can fix a bug where KVM calls get_user_pages while owning the
FPU, and the file system ends up requesting the FPU again:
[258270.527947] __warn+0xcb/0xf0
[258270.527948] warn_slowpath_null+0x1d/0x20
[258270.527951] kernel_fpu_disable+0x3f/0x50
[258270.527953] __kernel_fpu_begin+0x49/0x100
[258270.527955] kernel_fpu_begin+0xe/0x10
[258270.527958] crc32c_pcl_intel_update+0x84/0xb0
[258270.527961] crypto_shash_update+0x3f/0x110
[258270.527968] crc32c+0x63/0x8a [libcrc32c]
[258270.527975] dm_bm_checksum+0x1b/0x20 [dm_persistent_data]
[258270.527978] node_prepare_for_write+0x44/0x70 [dm_persistent_data]
[258270.527985] dm_block_manager_write_callback+0x41/0x50 [dm_persistent_data]
[258270.527988] submit_io+0x170/0x1b0 [dm_bufio]
[258270.527992] __write_dirty_buffer+0x89/0x90 [dm_bufio]
[258270.527994] __make_buffer_clean+0x4f/0x80 [dm_bufio]
[258270.527996] __try_evict_buffer+0x42/0x60 [dm_bufio]
[258270.527998] dm_bufio_shrink_scan+0xc0/0x130 [dm_bufio]
[258270.528002] shrink_slab.part.40+0x1f5/0x420
[258270.528004] shrink_node+0x22c/0x320
[258270.528006] do_try_to_free_pages+0xf5/0x330
[258270.528008] try_to_free_pages+0xe9/0x190
[258270.528009] __alloc_pages_slowpath+0x40f/0xba0
[258270.528011] __alloc_pages_nodemask+0x209/0x260
[258270.528014] alloc_pages_vma+0x1f1/0x250
[258270.528017] do_huge_pmd_anonymous_page+0x123/0x660
[258270.528021] handle_mm_fault+0xfd3/0x1330
[258270.528025] __get_user_pages+0x113/0x640
[258270.528027] get_user_pages+0x4f/0x60
[258270.528063] __gfn_to_pfn_memslot+0x120/0x3f0 [kvm]
[258270.528108] try_async_pf+0x66/0x230 [kvm]
[258270.528135] tdp_page_fault+0x130/0x280 [kvm]
[258270.528149] kvm_mmu_page_fault+0x60/0x120 [kvm]
[258270.528158] handle_ept_violation+0x91/0x170 [kvm_intel]
[258270.528162] vmx_handle_exit+0x1ca/0x1400 [kvm_intel]
No performance changes were detected in quick ping-pong tests on
my 4 socket system, which is expected since an FPU+xstate load is
on the order of 0.1us, while ping-ponging between CPUs is on the
order of 20us, and somewhat noisy.
Cc: stable@vger.kernel.org
Signed-off-by: Rik van Riel <riel@redhat.com>
Suggested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[Fixed a bug where reset_vcpu called put_fpu without preceding load_fpu,
which happened inside from KVM_CREATE_VCPU ioctl. - Radim]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-11-15 05:54:23 +08:00
|
|
|
|
2010-06-10 11:27:12 +08:00
|
|
|
u64 xcr0;
|
2013-10-02 22:06:15 +08:00
|
|
|
u64 guest_supported_xcr0;
|
2013-10-02 22:06:16 +08:00
|
|
|
u32 guest_xstate_size;
|
2007-10-20 15:34:38 +08:00
|
|
|
|
|
|
|
struct kvm_pio_request pio;
|
|
|
|
void *pio_data;
|
|
|
|
|
2009-05-11 18:35:50 +08:00
|
|
|
u8 event_exit_inst_len;
|
|
|
|
|
2007-11-25 19:41:11 +08:00
|
|
|
struct kvm_queued_exception {
|
|
|
|
bool pending;
|
2017-08-24 18:35:09 +08:00
|
|
|
bool injected;
|
2007-11-25 19:41:11 +08:00
|
|
|
bool has_error_code;
|
|
|
|
u8 nr;
|
|
|
|
u32 error_code;
|
2017-07-14 09:30:41 +08:00
|
|
|
u8 nested_apf;
|
2007-11-25 19:41:11 +08:00
|
|
|
} exception;
|
|
|
|
|
2008-07-03 20:17:01 +08:00
|
|
|
struct kvm_queued_interrupt {
|
KVM: x86: Rename interrupt.pending to interrupt.injected
For exceptions & NMIs events, KVM code use the following
coding convention:
*) "pending" represents an event that should be injected to guest at
some point but it's side-effects have not yet occurred.
*) "injected" represents an event that it's side-effects have already
occurred.
However, interrupts don't conform to this coding convention.
All current code flows mark interrupt.pending when it's side-effects
have already taken place (For example, bit moved from LAPIC IRR to
ISR). Therefore, it makes sense to just rename
interrupt.pending to interrupt.injected.
This change follows logic of previous commit 664f8e26b00c ("KVM: X86:
Fix loss of exception which has not yet been injected") which changed
exception to follow this coding convention as well.
It is important to note that in case !lapic_in_kernel(vcpu),
interrupt.pending usage was and still incorrect.
In this case, interrrupt.pending can only be set using one of the
following ioctls: KVM_INTERRUPT, KVM_SET_VCPU_EVENTS and
KVM_SET_SREGS. Looking at how QEMU uses these ioctls, one can see that
QEMU uses them either to re-set an "interrupt.pending" state it has
received from KVM (via KVM_GET_VCPU_EVENTS interrupt.pending or
via KVM_GET_SREGS interrupt_bitmap) or by dispatching a new interrupt
from QEMU's emulated LAPIC which reset bit in IRR and set bit in ISR
before sending ioctl to KVM. So it seems that indeed "interrupt.pending"
in this case is also suppose to represent "interrupt.injected".
However, kvm_cpu_has_interrupt() & kvm_cpu_has_injectable_intr()
is misusing (now named) interrupt.injected in order to return if
there is a pending interrupt.
This leads to nVMX/nSVM not be able to distinguish if it should exit
from L2 to L1 on EXTERNAL_INTERRUPT on pending interrupt or should
re-inject an injected interrupt.
Therefore, add a FIXME at these functions for handling this issue.
This patch introduce no semantics change.
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2018-03-23 08:01:31 +08:00
|
|
|
bool injected;
|
2009-05-11 18:35:50 +08:00
|
|
|
bool soft;
|
2008-07-03 20:17:01 +08:00
|
|
|
u8 nr;
|
|
|
|
} interrupt;
|
|
|
|
|
2007-10-20 15:34:38 +08:00
|
|
|
int halt_request; /* real mode on Intel only */
|
|
|
|
|
|
|
|
int cpuid_nent;
|
2007-11-21 23:10:04 +08:00
|
|
|
struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
|
2015-03-30 04:56:12 +08:00
|
|
|
|
|
|
|
int maxphyaddr;
|
|
|
|
|
2007-10-20 15:34:38 +08:00
|
|
|
/* emulate context */
|
|
|
|
|
|
|
|
struct x86_emulate_ctxt emulate_ctxt;
|
2011-03-31 18:06:41 +08:00
|
|
|
bool emulate_regs_need_sync_to_vcpu;
|
|
|
|
bool emulate_regs_need_sync_from_vcpu;
|
2012-09-03 20:24:26 +08:00
|
|
|
int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
|
2008-02-16 03:52:47 +08:00
|
|
|
|
|
|
|
gpa_t time;
|
2008-06-03 22:17:31 +08:00
|
|
|
struct pvclock_vcpu_time_info hv_clock;
|
2010-08-20 16:07:23 +08:00
|
|
|
unsigned int hw_tsc_khz;
|
2013-02-21 06:48:10 +08:00
|
|
|
struct gfn_to_hva_cache pv_time;
|
|
|
|
bool pv_time_enabled;
|
2012-08-04 02:57:49 +08:00
|
|
|
/* set guest stopped flag in pvclock flags field */
|
|
|
|
bool pvclock_set_guest_stopped_request;
|
2011-07-12 03:28:14 +08:00
|
|
|
|
|
|
|
struct {
|
|
|
|
u64 msr_val;
|
|
|
|
u64 last_steal;
|
|
|
|
struct gfn_to_hva_cache stime;
|
|
|
|
struct kvm_steal_time steal;
|
|
|
|
} st;
|
|
|
|
|
2016-09-08 02:47:19 +08:00
|
|
|
u64 tsc_offset;
|
2010-08-20 16:07:30 +08:00
|
|
|
u64 last_guest_tsc;
|
2012-02-04 01:43:54 +08:00
|
|
|
u64 last_host_tsc;
|
2012-02-04 01:43:56 +08:00
|
|
|
u64 tsc_offset_adjustment;
|
2012-02-04 01:43:57 +08:00
|
|
|
u64 this_tsc_nsec;
|
|
|
|
u64 this_tsc_write;
|
2014-06-24 15:42:43 +08:00
|
|
|
u64 this_tsc_generation;
|
2010-09-19 08:38:15 +08:00
|
|
|
bool tsc_catchup;
|
KVM: Infrastructure for software and hardware based TSC rate scaling
This requires some restructuring; rather than use 'virtual_tsc_khz'
to indicate whether hardware rate scaling is in effect, we consider
each VCPU to always have a virtual TSC rate. Instead, there is new
logic above the vendor-specific hardware scaling that decides whether
it is even necessary to use and updates all rate variables used by
common code. This means we can simply query the virtual rate at
any point, which is needed for software rate scaling.
There is also now a threshold added to the TSC rate scaling; minor
differences and variations of measured TSC rate can accidentally
provoke rate scaling to be used when it is not needed. Instead,
we have a tolerance variable called tsc_tolerance_ppm, which is
the maximum variation from user requested rate at which scaling
will be used. The default is 250ppm, which is the half the
threshold for NTP adjustment, allowing for some hardware variation.
In the event that hardware rate scaling is not available, we can
kludge a bit by forcing TSC catchup to turn on when a faster than
hardware speed has been requested, but there is nothing available
yet for the reverse case; this requires a trap and emulate software
implementation for RDTSC, which is still forthcoming.
[avi: fix 64-bit division on i386]
Signed-off-by: Zachary Amsden <zamsden@gmail.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-04 01:43:50 +08:00
|
|
|
bool tsc_always_catchup;
|
|
|
|
s8 virtual_tsc_shift;
|
|
|
|
u32 virtual_tsc_mult;
|
|
|
|
u32 virtual_tsc_khz;
|
2012-11-30 04:42:50 +08:00
|
|
|
s64 ia32_tsc_adjust_msr;
|
2015-10-20 15:39:02 +08:00
|
|
|
u64 tsc_scaling_ratio;
|
2008-05-15 09:52:48 +08:00
|
|
|
|
2011-09-20 18:43:14 +08:00
|
|
|
atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
|
|
|
|
unsigned nmi_pending; /* NMI queued after currently running handler */
|
|
|
|
bool nmi_injected; /* Trying to inject an NMI this entry */
|
2015-04-01 21:06:40 +08:00
|
|
|
bool smi_pending; /* SMI queued after currently running handler */
|
2008-05-27 01:06:35 +08:00
|
|
|
|
2015-06-15 16:55:24 +08:00
|
|
|
struct kvm_mtrr mtrr_state;
|
2014-06-19 17:40:18 +08:00
|
|
|
u64 pat;
|
2008-12-15 20:52:10 +08:00
|
|
|
|
2014-02-21 16:55:56 +08:00
|
|
|
unsigned switch_db_regs;
|
2008-12-15 20:52:10 +08:00
|
|
|
unsigned long db[KVM_NR_DB_REGS];
|
|
|
|
unsigned long dr6;
|
|
|
|
unsigned long dr7;
|
|
|
|
unsigned long eff_db[KVM_NR_DB_REGS];
|
2012-09-21 11:42:55 +08:00
|
|
|
unsigned long guest_debug_dr7;
|
2017-03-20 16:16:28 +08:00
|
|
|
u64 msr_platform_info;
|
|
|
|
u64 msr_misc_features_enables;
|
2009-05-11 16:48:15 +08:00
|
|
|
|
|
|
|
u64 mcg_cap;
|
|
|
|
u64 mcg_status;
|
|
|
|
u64 mcg_ctl;
|
2016-06-22 14:59:56 +08:00
|
|
|
u64 mcg_ext_ctl;
|
2009-05-11 16:48:15 +08:00
|
|
|
u64 *mce_banks;
|
2009-10-18 19:24:44 +08:00
|
|
|
|
2011-07-12 03:23:20 +08:00
|
|
|
/* Cache MMIO info */
|
|
|
|
u64 mmio_gva;
|
|
|
|
unsigned access;
|
|
|
|
gfn_t mmio_gfn;
|
2014-08-19 06:46:07 +08:00
|
|
|
u64 mmio_gen;
|
2011-07-12 03:23:20 +08:00
|
|
|
|
2011-11-10 20:57:22 +08:00
|
|
|
struct kvm_pmu pmu;
|
|
|
|
|
2009-10-18 19:24:44 +08:00
|
|
|
/* used for guest single stepping over the given code position */
|
|
|
|
unsigned long singlestep_rip;
|
2010-02-24 00:47:55 +08:00
|
|
|
|
2015-07-03 20:01:34 +08:00
|
|
|
struct kvm_vcpu_hv hyperv;
|
2010-06-30 12:25:15 +08:00
|
|
|
|
|
|
|
cpumask_var_t wbinvd_dirty_mask;
|
2010-10-14 17:22:46 +08:00
|
|
|
|
2011-09-22 17:02:48 +08:00
|
|
|
unsigned long last_retry_eip;
|
|
|
|
unsigned long last_retry_addr;
|
|
|
|
|
2010-10-14 17:22:46 +08:00
|
|
|
struct {
|
|
|
|
bool halted;
|
|
|
|
gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
|
2010-10-14 17:22:50 +08:00
|
|
|
struct gfn_to_hva_cache data;
|
|
|
|
u64 msr_val;
|
2010-10-14 17:22:53 +08:00
|
|
|
u32 id;
|
2010-10-14 17:22:55 +08:00
|
|
|
bool send_user_only;
|
2017-07-14 09:30:40 +08:00
|
|
|
u32 host_apf_reason;
|
2017-07-14 09:30:41 +08:00
|
|
|
unsigned long nested_apf_token;
|
2017-07-14 09:30:42 +08:00
|
|
|
bool delivery_as_pf_vmexit;
|
2010-10-14 17:22:46 +08:00
|
|
|
} apf;
|
2012-01-10 03:00:35 +08:00
|
|
|
|
|
|
|
/* OSVW MSRs (AMD only) */
|
|
|
|
struct {
|
|
|
|
u64 length;
|
|
|
|
u64 status;
|
|
|
|
} osvw;
|
2012-06-25 00:25:07 +08:00
|
|
|
|
|
|
|
struct {
|
|
|
|
u64 msr_val;
|
|
|
|
struct gfn_to_hva_cache data;
|
|
|
|
} pv_eoi;
|
2013-01-13 23:49:07 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Indicate whether the access faults on its page table in guest
|
|
|
|
* which is set when fix page fault and used to detect unhandeable
|
|
|
|
* instruction.
|
|
|
|
*/
|
|
|
|
bool write_fault_to_shadow_pgtable;
|
2013-08-06 17:00:32 +08:00
|
|
|
|
|
|
|
/* set at EPT violation at this point */
|
|
|
|
unsigned long exit_qualification;
|
2013-08-26 16:48:34 +08:00
|
|
|
|
|
|
|
/* pv related host specific info */
|
|
|
|
struct {
|
|
|
|
bool pv_unhalted;
|
|
|
|
} pv;
|
2015-07-30 14:21:41 +08:00
|
|
|
|
|
|
|
int pending_ioapic_eoi;
|
KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 17:27:16 +08:00
|
|
|
int pending_external_vector;
|
2016-12-15 03:59:23 +08:00
|
|
|
|
2017-08-18 00:36:57 +08:00
|
|
|
/* GPA available */
|
2016-12-15 03:59:23 +08:00
|
|
|
bool gpa_available;
|
2017-08-18 00:36:57 +08:00
|
|
|
gpa_t gpa_val;
|
2017-08-08 12:05:33 +08:00
|
|
|
|
|
|
|
/* be preempted when it's in kernel-mode(cpl=0) */
|
|
|
|
bool preempted_in_kernel;
|
x86/KVM/VMX: Add L1D flush logic
Add the logic for flushing L1D on VMENTER. The flush depends on the static
key being enabled and the new l1tf_flush_l1d flag being set.
The flags is set:
- Always, if the flush module parameter is 'always'
- Conditionally at:
- Entry to vcpu_run(), i.e. after executing user space
- From the sched_in notifier, i.e. when switching to a vCPU thread.
- From vmexit handlers which are considered unsafe, i.e. where
sensitive data can be brought into L1D:
- The emulator, which could be a good target for other speculative
execution-based threats,
- The MMU, which can bring host page tables in the L1 cache.
- External interrupts
- Nested operations that require the MMU (see above). That is
vmptrld, vmptrst, vmclear,vmwrite,vmread.
- When handling invept,invvpid
[ tglx: Split out from combo patch and reduced to a single flag ]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2018-07-02 19:07:14 +08:00
|
|
|
|
|
|
|
/* Flush the L1 Data cache for L1TF mitigation on VMENTER */
|
|
|
|
bool l1tf_flush_l1d;
|
2007-10-20 15:34:38 +08:00
|
|
|
};
|
|
|
|
|
2012-02-08 12:02:18 +08:00
|
|
|
struct kvm_lpage_info {
|
2016-02-24 17:51:06 +08:00
|
|
|
int disallow_lpage;
|
2012-02-08 12:02:18 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
struct kvm_arch_memory_slot {
|
2015-11-20 16:41:28 +08:00
|
|
|
struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
|
2012-02-08 12:02:18 +08:00
|
|
|
struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
|
KVM: page track: add the framework of guest page tracking
The array, gfn_track[mode][gfn], is introduced in memory slot for every
guest page, this is the tracking count for the gust page on different
modes. If the page is tracked then the count is increased, the page is
not tracked after the count reaches zero
We use 'unsigned short' as the tracking count which should be enough as
shadow page table only can use 2^14 (2^3 for level, 2^1 for cr4_pae, 2^2
for quadrant, 2^3 for access, 2^1 for nxe, 2^1 for cr0_wp, 2^1 for
smep_andnot_wp, 2^1 for smap_andnot_wp, and 2^1 for smm) at most, there
is enough room for other trackers
Two callbacks, kvm_page_track_create_memslot() and
kvm_page_track_free_memslot() are implemented in this patch, they are
internally used to initialize and reclaim the memory of the array
Currently, only write track mode is supported
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-24 17:51:09 +08:00
|
|
|
unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
|
2012-02-08 12:02:18 +08:00
|
|
|
};
|
|
|
|
|
2015-02-13 02:41:33 +08:00
|
|
|
/*
|
|
|
|
* We use as the mode the number of bits allocated in the LDR for the
|
|
|
|
* logical processor ID. It happens that these are all powers of two.
|
|
|
|
* This makes it is very easy to detect cases where the APICs are
|
|
|
|
* configured for multiple modes; in that case, we cannot use the map and
|
|
|
|
* hence cannot use kvm_irq_delivery_to_apic_fast either.
|
|
|
|
*/
|
|
|
|
#define KVM_APIC_MODE_XAPIC_CLUSTER 4
|
|
|
|
#define KVM_APIC_MODE_XAPIC_FLAT 8
|
|
|
|
#define KVM_APIC_MODE_X2APIC 16
|
|
|
|
|
2012-09-13 22:19:24 +08:00
|
|
|
struct kvm_apic_map {
|
|
|
|
struct rcu_head rcu;
|
2015-02-13 02:41:33 +08:00
|
|
|
u8 mode;
|
2016-07-13 04:09:20 +08:00
|
|
|
u32 max_apic_id;
|
2016-07-13 04:09:19 +08:00
|
|
|
union {
|
|
|
|
struct kvm_lapic *xapic_flat_map[8];
|
|
|
|
struct kvm_lapic *xapic_cluster_map[16][4];
|
|
|
|
};
|
2016-07-13 04:09:20 +08:00
|
|
|
struct kvm_lapic *phys_map[];
|
2012-09-13 22:19:24 +08:00
|
|
|
};
|
|
|
|
|
2015-07-03 20:01:34 +08:00
|
|
|
/* Hyper-V emulation context */
|
|
|
|
struct kvm_hv {
|
2016-12-12 17:12:53 +08:00
|
|
|
struct mutex hv_lock;
|
2015-07-03 20:01:34 +08:00
|
|
|
u64 hv_guest_os_id;
|
|
|
|
u64 hv_hypercall;
|
|
|
|
u64 hv_tsc_page;
|
2015-07-03 20:01:37 +08:00
|
|
|
|
|
|
|
/* Hyper-v based guest crash (NT kernel bugcheck) parameters */
|
|
|
|
u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
|
|
|
|
u64 hv_crash_ctl;
|
2016-02-08 19:54:12 +08:00
|
|
|
|
|
|
|
HV_REFERENCE_TSC_PAGE tsc_ref;
|
2018-02-01 21:48:32 +08:00
|
|
|
|
|
|
|
struct idr conn_to_evt;
|
2018-03-01 22:15:12 +08:00
|
|
|
|
|
|
|
u64 hv_reenlightenment_control;
|
|
|
|
u64 hv_tsc_emulation_control;
|
|
|
|
u64 hv_tsc_emulation_status;
|
2018-09-27 01:02:56 +08:00
|
|
|
|
|
|
|
/* How many vCPUs have VP index != vCPU index */
|
|
|
|
atomic_t num_mismatched_vp_indexes;
|
2015-07-03 20:01:34 +08:00
|
|
|
};
|
|
|
|
|
2016-12-16 23:10:02 +08:00
|
|
|
enum kvm_irqchip_mode {
|
|
|
|
KVM_IRQCHIP_NONE,
|
|
|
|
KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
|
|
|
|
KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
|
|
|
|
};
|
|
|
|
|
2009-12-24 00:35:17 +08:00
|
|
|
struct kvm_arch {
|
2010-08-20 09:11:28 +08:00
|
|
|
unsigned int n_used_mmu_pages;
|
2007-12-14 10:01:48 +08:00
|
|
|
unsigned int n_requested_mmu_pages;
|
2010-08-20 09:11:14 +08:00
|
|
|
unsigned int n_max_mmu_pages;
|
2011-05-15 23:20:27 +08:00
|
|
|
unsigned int indirect_shadow_pages;
|
2013-05-31 08:36:22 +08:00
|
|
|
unsigned long mmu_valid_gen;
|
2007-12-14 10:01:48 +08:00
|
|
|
struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
|
|
|
|
/*
|
|
|
|
* Hash table of struct kvm_mmu_page.
|
|
|
|
*/
|
|
|
|
struct list_head active_mmu_pages;
|
2013-05-31 08:36:29 +08:00
|
|
|
struct list_head zapped_obsolete_pages;
|
2016-02-24 17:51:16 +08:00
|
|
|
struct kvm_page_track_notifier_node mmu_sp_tracker;
|
2016-02-24 17:51:13 +08:00
|
|
|
struct kvm_page_track_notifier_head track_notifier_head;
|
2013-05-31 08:36:29 +08:00
|
|
|
|
2008-07-29 00:26:26 +08:00
|
|
|
struct list_head assigned_dev_head;
|
2008-12-03 21:43:34 +08:00
|
|
|
struct iommu_domain *iommu_domain;
|
2013-10-31 01:02:23 +08:00
|
|
|
bool iommu_noncoherent;
|
2013-10-31 01:02:30 +08:00
|
|
|
#define __KVM_HAVE_ARCH_NONCOHERENT_DMA
|
|
|
|
atomic_t noncoherent_dma_count;
|
2015-07-07 21:41:58 +08:00
|
|
|
#define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
|
|
|
|
atomic_t assigned_device_count;
|
2007-12-14 10:17:34 +08:00
|
|
|
struct kvm_pic *vpic;
|
|
|
|
struct kvm_ioapic *vioapic;
|
2008-01-28 05:10:22 +08:00
|
|
|
struct kvm_pit *vpit;
|
2015-07-01 21:31:49 +08:00
|
|
|
atomic_t vapics_in_nmi_mode;
|
2012-09-13 22:19:24 +08:00
|
|
|
struct mutex apic_map_lock;
|
|
|
|
struct kvm_apic_map *apic_map;
|
2007-12-14 10:20:16 +08:00
|
|
|
|
2014-09-24 15:57:58 +08:00
|
|
|
bool apic_access_page_done;
|
2008-02-16 03:52:47 +08:00
|
|
|
|
|
|
|
gpa_t wall_clock;
|
2008-04-25 21:44:52 +08:00
|
|
|
|
2018-03-12 19:53:02 +08:00
|
|
|
bool mwait_in_guest;
|
2018-03-12 19:53:03 +08:00
|
|
|
bool hlt_in_guest;
|
2018-03-12 19:53:04 +08:00
|
|
|
bool pause_in_guest;
|
2018-03-12 19:53:02 +08:00
|
|
|
|
2008-10-15 20:15:06 +08:00
|
|
|
unsigned long irq_sources_bitmap;
|
2009-10-17 03:28:36 +08:00
|
|
|
s64 kvmclock_offset;
|
2011-02-04 17:49:11 +08:00
|
|
|
raw_spinlock_t tsc_write_lock;
|
2010-08-20 16:07:20 +08:00
|
|
|
u64 last_tsc_nsec;
|
|
|
|
u64 last_tsc_write;
|
KVM: Improve TSC offset matching
There are a few improvements that can be made to the TSC offset
matching code. First, we don't need to call the 128-bit multiply
(especially on a constant number), the code works much nicer to
do computation in nanosecond units.
Second, the way everything is setup with software TSC rate scaling,
we currently have per-cpu rates. Obviously this isn't too desirable
to use in practice, but if for some reason we do change the rate of
all VCPUs at runtime, then reset the TSCs, we will only want to
match offsets for VCPUs running at the same rate.
Finally, for the case where we have an unstable host TSC, but
rate scaling is being done in hardware, we should call the platform
code to compute the TSC offset, so the math is reorganized to recompute
the base instead, then transform the base into an offset using the
existing API.
[avi: fix 64-bit division on i386]
Signed-off-by: Zachary Amsden <zamsden@gmail.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
KVM: Fix 64-bit division in kvm_write_tsc()
Breaks i386 build.
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-04 01:43:51 +08:00
|
|
|
u32 last_tsc_khz;
|
2012-02-04 01:43:57 +08:00
|
|
|
u64 cur_tsc_nsec;
|
|
|
|
u64 cur_tsc_write;
|
|
|
|
u64 cur_tsc_offset;
|
2014-06-24 15:42:43 +08:00
|
|
|
u64 cur_tsc_generation;
|
2012-11-28 09:29:03 +08:00
|
|
|
int nr_vcpus_matched_tsc;
|
2009-10-16 06:21:43 +08:00
|
|
|
|
2012-11-28 09:29:01 +08:00
|
|
|
spinlock_t pvclock_gtod_sync_lock;
|
|
|
|
bool use_master_clock;
|
|
|
|
u64 master_kernel_ns;
|
2016-12-22 03:32:01 +08:00
|
|
|
u64 master_cycle_now;
|
2014-02-28 19:52:54 +08:00
|
|
|
struct delayed_work kvmclock_update_work;
|
2014-02-28 19:52:55 +08:00
|
|
|
struct delayed_work kvmclock_sync_work;
|
2012-11-28 09:29:01 +08:00
|
|
|
|
2009-10-16 06:21:43 +08:00
|
|
|
struct kvm_xen_hvm_config xen_hvm_config;
|
2010-01-17 21:51:22 +08:00
|
|
|
|
2014-11-20 20:45:31 +08:00
|
|
|
/* reads protected by irq_srcu, writes by irq_lock */
|
|
|
|
struct hlist_head mask_notifier_list;
|
|
|
|
|
2015-07-03 20:01:34 +08:00
|
|
|
struct kvm_hv hyperv;
|
2010-12-23 16:08:35 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_KVM_MMU_AUDIT
|
|
|
|
int audit_point;
|
|
|
|
#endif
|
2015-01-21 01:54:52 +08:00
|
|
|
|
2017-06-26 15:56:43 +08:00
|
|
|
bool backwards_tsc_observed;
|
2015-01-21 01:54:52 +08:00
|
|
|
bool boot_vcpu_runs_old_kvmclock;
|
2015-07-29 17:56:48 +08:00
|
|
|
u32 bsp_vcpu_id;
|
2015-04-13 06:53:41 +08:00
|
|
|
|
|
|
|
u64 disabled_quirks;
|
2015-07-30 14:21:40 +08:00
|
|
|
|
2016-12-16 23:10:02 +08:00
|
|
|
enum kvm_irqchip_mode irqchip_mode;
|
2015-07-30 14:32:35 +08:00
|
|
|
u8 nr_reserved_ioapic_pins;
|
2016-01-25 16:53:33 +08:00
|
|
|
|
|
|
|
bool disabled_lapic_found;
|
2016-05-05 03:09:46 +08:00
|
|
|
|
2016-07-13 04:09:27 +08:00
|
|
|
bool x2apic_format;
|
2016-07-13 04:09:28 +08:00
|
|
|
bool x2apic_broadcast_quirk_disabled;
|
2018-08-21 01:32:15 +08:00
|
|
|
|
|
|
|
bool guest_can_read_msr_platform_info;
|
2007-12-14 09:54:20 +08:00
|
|
|
};
|
|
|
|
|
2007-12-14 10:23:23 +08:00
|
|
|
struct kvm_vm_stat {
|
2016-08-02 12:03:22 +08:00
|
|
|
ulong mmu_shadow_zapped;
|
|
|
|
ulong mmu_pte_write;
|
|
|
|
ulong mmu_pte_updated;
|
|
|
|
ulong mmu_pde_zapped;
|
|
|
|
ulong mmu_flooded;
|
|
|
|
ulong mmu_recycled;
|
|
|
|
ulong mmu_cache_miss;
|
|
|
|
ulong mmu_unsync;
|
|
|
|
ulong remote_tlb_flush;
|
|
|
|
ulong lpages;
|
2016-12-21 07:25:57 +08:00
|
|
|
ulong max_mmu_page_hash_collisions;
|
2007-12-14 10:23:23 +08:00
|
|
|
};
|
|
|
|
|
2007-12-14 09:49:26 +08:00
|
|
|
struct kvm_vcpu_stat {
|
2016-08-02 12:03:22 +08:00
|
|
|
u64 pf_fixed;
|
|
|
|
u64 pf_guest;
|
|
|
|
u64 tlb_flush;
|
|
|
|
u64 invlpg;
|
|
|
|
|
|
|
|
u64 exits;
|
|
|
|
u64 io_exits;
|
|
|
|
u64 mmio_exits;
|
|
|
|
u64 signal_exits;
|
|
|
|
u64 irq_window_exits;
|
|
|
|
u64 nmi_window_exits;
|
x86/KVM/VMX: Add L1D flush logic
Add the logic for flushing L1D on VMENTER. The flush depends on the static
key being enabled and the new l1tf_flush_l1d flag being set.
The flags is set:
- Always, if the flush module parameter is 'always'
- Conditionally at:
- Entry to vcpu_run(), i.e. after executing user space
- From the sched_in notifier, i.e. when switching to a vCPU thread.
- From vmexit handlers which are considered unsafe, i.e. where
sensitive data can be brought into L1D:
- The emulator, which could be a good target for other speculative
execution-based threats,
- The MMU, which can bring host page tables in the L1 cache.
- External interrupts
- Nested operations that require the MMU (see above). That is
vmptrld, vmptrst, vmclear,vmwrite,vmread.
- When handling invept,invvpid
[ tglx: Split out from combo patch and reduced to a single flag ]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2018-07-02 19:07:14 +08:00
|
|
|
u64 l1d_flush;
|
2016-08-02 12:03:22 +08:00
|
|
|
u64 halt_exits;
|
|
|
|
u64 halt_successful_poll;
|
|
|
|
u64 halt_attempted_poll;
|
|
|
|
u64 halt_poll_invalid;
|
|
|
|
u64 halt_wakeup;
|
|
|
|
u64 request_irq_exits;
|
|
|
|
u64 irq_exits;
|
|
|
|
u64 host_state_reload;
|
|
|
|
u64 fpu_reload;
|
|
|
|
u64 insn_emulation;
|
|
|
|
u64 insn_emulation_fail;
|
|
|
|
u64 hypercalls;
|
|
|
|
u64 irq_injections;
|
|
|
|
u64 nmi_injections;
|
2016-12-17 23:05:19 +08:00
|
|
|
u64 req_event;
|
2007-12-14 09:49:26 +08:00
|
|
|
};
|
2007-12-13 23:50:52 +08:00
|
|
|
|
2011-04-04 18:39:27 +08:00
|
|
|
struct x86_instruction_info;
|
|
|
|
|
2012-11-30 04:42:12 +08:00
|
|
|
struct msr_data {
|
|
|
|
bool host_initiated;
|
|
|
|
u32 index;
|
|
|
|
u64 data;
|
|
|
|
};
|
|
|
|
|
2014-12-18 01:17:20 +08:00
|
|
|
struct kvm_lapic_irq {
|
|
|
|
u32 vector;
|
2015-04-21 20:57:05 +08:00
|
|
|
u16 delivery_mode;
|
|
|
|
u16 dest_mode;
|
|
|
|
bool level;
|
|
|
|
u16 trig_mode;
|
2014-12-18 01:17:20 +08:00
|
|
|
u32 shorthand;
|
|
|
|
u32 dest_id;
|
2015-03-19 09:26:03 +08:00
|
|
|
bool msi_redir_hint;
|
2014-12-18 01:17:20 +08:00
|
|
|
};
|
|
|
|
|
2007-11-19 14:40:47 +08:00
|
|
|
struct kvm_x86_ops {
|
|
|
|
int (*cpu_has_kvm_support)(void); /* __init */
|
|
|
|
int (*disabled_by_bios)(void); /* __init */
|
2014-08-28 21:13:03 +08:00
|
|
|
int (*hardware_enable)(void);
|
|
|
|
void (*hardware_disable)(void);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*check_processor_compatibility)(void *rtn);
|
|
|
|
int (*hardware_setup)(void); /* __init */
|
|
|
|
void (*hardware_unsetup)(void); /* __exit */
|
2007-12-26 19:57:04 +08:00
|
|
|
bool (*cpu_has_accelerated_tpr)(void);
|
2018-05-11 04:06:39 +08:00
|
|
|
bool (*has_emulated_msr)(int index);
|
2009-12-18 16:48:46 +08:00
|
|
|
void (*cpuid_update)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
|
2018-03-21 03:17:18 +08:00
|
|
|
struct kvm *(*vm_alloc)(void);
|
|
|
|
void (*vm_free)(struct kvm *);
|
2016-05-05 03:09:42 +08:00
|
|
|
int (*vm_init)(struct kvm *kvm);
|
|
|
|
void (*vm_destroy)(struct kvm *kvm);
|
|
|
|
|
2007-11-19 14:40:47 +08:00
|
|
|
/* Create, but do not attach this VCPU */
|
|
|
|
struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
|
|
|
|
void (*vcpu_free)(struct kvm_vcpu *vcpu);
|
KVM: x86: INIT and reset sequences are different
x86 architecture defines differences between the reset and INIT sequences.
INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
References (from Intel SDM):
"If the MP protocol has completed and a BSP is chosen, subsequent INITs (either
to a specific processor or system wide) do not cause the MP protocol to be
repeated." [8.4.2: MP Initialization Protocol Requirements and Restrictions]
[Table 9-1. IA-32 Processor States Following Power-up, Reset, or INIT]
"If the processor is reset by asserting the INIT# pin, the x87 FPU state is not
changed." [9.2: X87 FPU INITIALIZATION]
"The state of the local APIC following an INIT reset is the same as it is after
a power-up or hardware reset, except that the APIC ID and arbitration ID
registers are not affected." [10.4.7.3: Local APIC State After an INIT Reset
("Wait-for-SIPI" State)]
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Message-Id: <1428924848-28212-1-git-send-email-namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-13 19:34:08 +08:00
|
|
|
void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
|
2007-11-19 14:40:47 +08:00
|
|
|
|
|
|
|
void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
|
|
|
|
void (*vcpu_put)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2015-11-10 18:55:36 +08:00
|
|
|
void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
|
2015-04-08 21:30:38 +08:00
|
|
|
int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-30 04:42:12 +08:00
|
|
|
int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 14:40:47 +08:00
|
|
|
u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
|
|
|
|
void (*get_segment)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_segment *var, int seg);
|
2008-03-25 01:38:34 +08:00
|
|
|
int (*get_cpl)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*set_segment)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_segment *var, int seg);
|
|
|
|
void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
|
2009-12-30 00:43:06 +08:00
|
|
|
void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
|
2010-12-06 00:56:11 +08:00
|
|
|
void (*decache_cr3)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
|
|
|
|
void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
|
2011-05-26 04:03:24 +08:00
|
|
|
int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
|
2010-02-16 16:51:48 +08:00
|
|
|
void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
|
|
|
void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
2014-01-05 01:47:16 +08:00
|
|
|
u64 (*get_dr6)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
|
2014-02-21 17:17:24 +08:00
|
|
|
void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
|
2010-04-13 15:05:23 +08:00
|
|
|
void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
|
2008-06-28 01:58:02 +08:00
|
|
|
void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
|
2007-11-19 14:40:47 +08:00
|
|
|
unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
|
|
|
|
|
2017-12-13 09:33:03 +08:00
|
|
|
void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
|
2018-07-19 16:40:17 +08:00
|
|
|
int (*tlb_remote_flush)(struct kvm *kvm);
|
2007-11-19 14:40:47 +08:00
|
|
|
|
2018-06-30 04:10:05 +08:00
|
|
|
/*
|
|
|
|
* Flush any TLB entries associated with the given GVA.
|
|
|
|
* Does not need to flush GPA->HPA mappings.
|
|
|
|
* Can potentially get non-canonical addresses through INVLPGs, which
|
|
|
|
* the implementation may choose to ignore if appropriate.
|
|
|
|
*/
|
|
|
|
void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
|
2007-11-19 14:40:47 +08:00
|
|
|
|
2009-08-24 16:10:17 +08:00
|
|
|
void (*run)(struct kvm_vcpu *vcpu);
|
|
|
|
int (*handle_exit)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
|
2009-05-13 04:21:05 +08:00
|
|
|
void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
|
2014-05-20 20:29:47 +08:00
|
|
|
u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
void (*patch_hypercall)(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned char *hypercall_addr);
|
2009-05-11 18:35:50 +08:00
|
|
|
void (*set_irq)(struct kvm_vcpu *vcpu);
|
2009-04-21 22:45:08 +08:00
|
|
|
void (*set_nmi)(struct kvm_vcpu *vcpu);
|
2017-07-14 09:30:39 +08:00
|
|
|
void (*queue_exception)(struct kvm_vcpu *vcpu);
|
2010-07-20 20:06:17 +08:00
|
|
|
void (*cancel_injection)(struct kvm_vcpu *vcpu);
|
2009-03-23 18:12:11 +08:00
|
|
|
int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
|
2009-04-21 22:45:08 +08:00
|
|
|
int (*nmi_allowed)(struct kvm_vcpu *vcpu);
|
2009-11-12 08:04:25 +08:00
|
|
|
bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
|
2014-03-08 03:03:15 +08:00
|
|
|
void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*enable_irq_window)(struct kvm_vcpu *vcpu);
|
2009-04-21 22:45:08 +08:00
|
|
|
void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
|
2017-09-12 23:42:41 +08:00
|
|
|
bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
|
2015-11-10 20:36:33 +08:00
|
|
|
void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
|
2013-01-25 10:18:51 +08:00
|
|
|
void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
|
2016-05-10 23:01:23 +08:00
|
|
|
void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
|
2018-09-04 15:56:52 +08:00
|
|
|
bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
|
2015-11-10 20:36:32 +08:00
|
|
|
void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
|
2018-05-10 04:56:05 +08:00
|
|
|
void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
|
2014-09-24 15:57:54 +08:00
|
|
|
void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
|
2013-04-11 19:25:15 +08:00
|
|
|
void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
|
2016-12-20 00:17:11 +08:00
|
|
|
int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
|
2007-11-19 14:40:47 +08:00
|
|
|
int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
|
2018-03-21 03:17:19 +08:00
|
|
|
int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
|
2017-08-24 20:27:55 +08:00
|
|
|
int (*get_tdp_level)(struct kvm_vcpu *vcpu);
|
2009-04-27 20:35:42 +08:00
|
|
|
u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
|
2010-01-05 19:02:27 +08:00
|
|
|
int (*get_lpage_level)(void);
|
2009-12-18 16:48:47 +08:00
|
|
|
bool (*rdtscp_supported)(void);
|
2012-07-02 09:18:48 +08:00
|
|
|
bool (*invpcid_supported)(void);
|
2009-07-27 22:30:48 +08:00
|
|
|
|
2010-09-10 23:30:41 +08:00
|
|
|
void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
|
|
|
|
|
2010-04-22 18:33:11 +08:00
|
|
|
void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
|
|
|
|
|
2010-06-30 12:25:15 +08:00
|
|
|
bool (*has_wbinvd_exit)(void);
|
|
|
|
|
2018-04-14 11:10:52 +08:00
|
|
|
u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
|
2010-08-20 16:07:17 +08:00
|
|
|
void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
|
|
|
|
|
2010-11-18 19:09:54 +08:00
|
|
|
void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
|
2011-04-04 18:39:27 +08:00
|
|
|
|
|
|
|
int (*check_intercept)(struct kvm_vcpu *vcpu,
|
|
|
|
struct x86_instruction_info *info,
|
|
|
|
enum x86_intercept_stage stage);
|
2013-04-11 19:25:10 +08:00
|
|
|
void (*handle_external_intr)(struct kvm_vcpu *vcpu);
|
2014-02-24 18:55:46 +08:00
|
|
|
bool (*mpx_supported)(void);
|
2014-12-02 19:21:30 +08:00
|
|
|
bool (*xsaves_supported)(void);
|
2016-07-12 16:36:41 +08:00
|
|
|
bool (*umip_emulated)(void);
|
2014-03-08 03:03:12 +08:00
|
|
|
|
|
|
|
int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
|
KVM: VMX: use preemption timer to force immediate VMExit
A VMX preemption timer value of '0' is guaranteed to cause a VMExit
prior to the CPU executing any instructions in the guest. Use the
preemption timer (if it's supported) to trigger immediate VMExit
in place of the current method of sending a self-IPI. This ensures
that pending VMExit injection to L1 occurs prior to executing any
instructions in the guest (regardless of nesting level).
When deferring VMExit injection, KVM generates an immediate VMExit
from the (possibly nested) guest by sending itself an IPI. Because
hardware interrupts are blocked prior to VMEnter and are unblocked
(in hardware) after VMEnter, this results in taking a VMExit(INTR)
before any guest instruction is executed. But, as this approach
relies on the IPI being received before VMEnter executes, it only
works as intended when KVM is running as L0. Because there are no
architectural guarantees regarding when IPIs are delivered, when
running nested the INTR may "arrive" long after L2 is running e.g.
L0 KVM doesn't force an immediate switch to L1 to deliver an INTR.
For the most part, this unintended delay is not an issue since the
events being injected to L1 also do not have architectural guarantees
regarding their timing. The notable exception is the VMX preemption
timer[1], which is architecturally guaranteed to cause a VMExit prior
to executing any instructions in the guest if the timer value is '0'
at VMEnter. Specifically, the delay in injecting the VMExit causes
the preemption timer KVM unit test to fail when run in a nested guest.
Note: this approach is viable even on CPUs with a broken preemption
timer, as broken in this context only means the timer counts at the
wrong rate. There are no known errata affecting timer value of '0'.
[1] I/O SMIs also have guarantees on when they arrive, but I have
no idea if/how those are emulated in KVM.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
[Use a hook for SVM instead of leaving the default in x86.c - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-08-28 06:21:12 +08:00
|
|
|
void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
|
2014-08-22 00:08:06 +08:00
|
|
|
|
|
|
|
void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
|
2015-01-28 10:54:27 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Arch-specific dirty logging hooks. These hooks are only supposed to
|
|
|
|
* be valid if the specific arch has hardware-accelerated dirty logging
|
|
|
|
* mechanism. Currently only for PML on VMX.
|
|
|
|
*
|
|
|
|
* - slot_enable_log_dirty:
|
|
|
|
* called when enabling log dirty mode for the slot.
|
|
|
|
* - slot_disable_log_dirty:
|
|
|
|
* called when disabling log dirty mode for the slot.
|
|
|
|
* also called when slot is created with log dirty disabled.
|
|
|
|
* - flush_log_dirty:
|
|
|
|
* called before reporting dirty_bitmap to userspace.
|
|
|
|
* - enable_log_dirty_pt_masked:
|
|
|
|
* called when reenabling log dirty for the GFNs in the mask after
|
|
|
|
* corresponding bits are cleared in slot->dirty_bitmap.
|
|
|
|
*/
|
|
|
|
void (*slot_enable_log_dirty)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot);
|
|
|
|
void (*slot_disable_log_dirty)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot);
|
|
|
|
void (*flush_log_dirty)(struct kvm *kvm);
|
|
|
|
void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t offset, unsigned long mask);
|
2017-05-06 03:25:13 +08:00
|
|
|
int (*write_log_dirty)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2015-06-19 21:45:05 +08:00
|
|
|
/* pmu operations of sub-arch */
|
|
|
|
const struct kvm_pmu_ops *pmu_ops;
|
2015-09-18 22:29:51 +08:00
|
|
|
|
2015-09-18 22:29:55 +08:00
|
|
|
/*
|
|
|
|
* Architecture specific hooks for vCPU blocking due to
|
|
|
|
* HLT instruction.
|
|
|
|
* Returns for .pre_block():
|
|
|
|
* - 0 means continue to block the vCPU.
|
|
|
|
* - 1 means we cannot block the vCPU since some event
|
|
|
|
* happens during this period, such as, 'ON' bit in
|
|
|
|
* posted-interrupts descriptor is set.
|
|
|
|
*/
|
|
|
|
int (*pre_block)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*post_block)(struct kvm_vcpu *vcpu);
|
2016-05-05 03:09:43 +08:00
|
|
|
|
|
|
|
void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
|
|
|
|
void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2015-09-18 22:29:51 +08:00
|
|
|
int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
|
|
|
|
uint32_t guest_irq, bool set);
|
2016-05-05 03:09:49 +08:00
|
|
|
void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
|
2016-06-14 05:20:01 +08:00
|
|
|
|
|
|
|
int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc);
|
|
|
|
void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
|
2016-06-22 14:59:56 +08:00
|
|
|
|
|
|
|
void (*setup_mce)(struct kvm_vcpu *vcpu);
|
2017-10-11 22:54:40 +08:00
|
|
|
|
2018-07-10 17:27:20 +08:00
|
|
|
int (*get_nested_state)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_nested_state __user *user_kvm_nested_state,
|
|
|
|
unsigned user_data_size);
|
|
|
|
int (*set_nested_state)(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_nested_state __user *user_kvm_nested_state,
|
|
|
|
struct kvm_nested_state *kvm_state);
|
2018-07-19 00:49:01 +08:00
|
|
|
void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
|
|
|
|
|
2017-10-11 22:54:41 +08:00
|
|
|
int (*smi_allowed)(struct kvm_vcpu *vcpu);
|
2017-10-11 22:54:40 +08:00
|
|
|
int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
|
|
|
|
int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase);
|
2017-10-17 22:02:39 +08:00
|
|
|
int (*enable_smi_window)(struct kvm_vcpu *vcpu);
|
2017-12-05 00:57:26 +08:00
|
|
|
|
|
|
|
int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
|
2017-12-05 00:57:26 +08:00
|
|
|
int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
|
|
|
|
int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
|
2018-02-22 03:39:51 +08:00
|
|
|
|
|
|
|
int (*get_msr_feature)(struct kvm_msr_entry *entry);
|
2007-11-19 14:40:47 +08:00
|
|
|
};
|
|
|
|
|
2010-10-14 17:22:46 +08:00
|
|
|
struct kvm_arch_async_pf {
|
2010-10-14 17:22:53 +08:00
|
|
|
u32 token;
|
2010-10-14 17:22:46 +08:00
|
|
|
gfn_t gfn;
|
2010-12-07 10:35:25 +08:00
|
|
|
unsigned long cr3;
|
2010-11-12 14:49:55 +08:00
|
|
|
bool direct_map;
|
2010-10-14 17:22:46 +08:00
|
|
|
};
|
|
|
|
|
2007-11-14 20:09:30 +08:00
|
|
|
extern struct kvm_x86_ops *kvm_x86_ops;
|
|
|
|
|
2018-03-21 03:17:18 +08:00
|
|
|
#define __KVM_HAVE_ARCH_VM_ALLOC
|
|
|
|
static inline struct kvm *kvm_arch_alloc_vm(void)
|
|
|
|
{
|
|
|
|
return kvm_x86_ops->vm_alloc();
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void kvm_arch_free_vm(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
return kvm_x86_ops->vm_free(kvm);
|
|
|
|
}
|
|
|
|
|
2018-07-19 16:40:17 +08:00
|
|
|
#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
|
|
|
|
static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
if (kvm_x86_ops->tlb_remote_flush &&
|
|
|
|
!kvm_x86_ops->tlb_remote_flush(kvm))
|
|
|
|
return 0;
|
|
|
|
else
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
2007-11-19 15:24:28 +08:00
|
|
|
int kvm_mmu_module_init(void);
|
|
|
|
void kvm_mmu_module_exit(void);
|
|
|
|
|
|
|
|
void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_mmu_create(struct kvm_vcpu *vcpu);
|
2016-02-24 17:51:16 +08:00
|
|
|
void kvm_mmu_init_vm(struct kvm *kvm);
|
|
|
|
void kvm_mmu_uninit_vm(struct kvm *kvm);
|
2008-04-25 21:13:50 +08:00
|
|
|
void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
|
2016-12-07 08:46:16 +08:00
|
|
|
u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
|
2017-07-18 05:10:27 +08:00
|
|
|
u64 acc_track_mask, u64 me_mask);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
2013-10-02 22:56:13 +08:00
|
|
|
void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
|
2015-01-28 10:54:26 +08:00
|
|
|
void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
2015-04-03 15:40:25 +08:00
|
|
|
void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
|
2015-05-18 19:20:23 +08:00
|
|
|
const struct kvm_memory_slot *memslot);
|
2015-01-28 10:54:24 +08:00
|
|
|
void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_slot_set_dirty(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot);
|
|
|
|
void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask);
|
2007-11-19 15:24:28 +08:00
|
|
|
void kvm_mmu_zap_all(struct kvm *kvm);
|
2015-04-08 21:39:23 +08:00
|
|
|
void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
|
2007-11-20 13:11:38 +08:00
|
|
|
unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
|
2007-11-19 15:24:28 +08:00
|
|
|
void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
|
|
|
|
|
2010-09-10 23:30:57 +08:00
|
|
|
int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
|
2016-11-30 23:03:10 +08:00
|
|
|
bool pdptrs_changed(struct kvm_vcpu *vcpu);
|
2008-02-07 20:47:43 +08:00
|
|
|
|
2008-03-30 07:17:59 +08:00
|
|
|
int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
|
2008-03-02 20:06:05 +08:00
|
|
|
const void *val, int bytes);
|
2008-02-23 01:21:37 +08:00
|
|
|
|
2014-11-20 20:45:31 +08:00
|
|
|
struct kvm_irq_mask_notifier {
|
|
|
|
void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
|
|
|
|
int irq;
|
|
|
|
struct hlist_node link;
|
|
|
|
};
|
|
|
|
|
|
|
|
void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
|
|
struct kvm_irq_mask_notifier *kimn);
|
|
|
|
void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
|
|
struct kvm_irq_mask_notifier *kimn);
|
|
|
|
void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
|
|
|
|
bool mask);
|
|
|
|
|
2008-02-23 01:21:37 +08:00
|
|
|
extern bool tdp_enabled;
|
2008-03-02 20:06:05 +08:00
|
|
|
|
2011-09-22 16:55:52 +08:00
|
|
|
u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
|
|
|
|
|
2011-03-25 16:44:51 +08:00
|
|
|
/* control of guest tsc rate supported? */
|
|
|
|
extern bool kvm_has_tsc_control;
|
|
|
|
/* maximum supported tsc_khz for guests */
|
|
|
|
extern u32 kvm_max_guest_tsc_khz;
|
2015-10-20 15:39:01 +08:00
|
|
|
/* number of bits of the fractional part of the TSC scaling ratio */
|
|
|
|
extern u8 kvm_tsc_scaling_ratio_frac_bits;
|
|
|
|
/* maximum allowed value of TSC scaling ratio */
|
|
|
|
extern u64 kvm_max_tsc_scaling_ratio;
|
2016-06-14 05:19:59 +08:00
|
|
|
/* 1ull << kvm_tsc_scaling_ratio_frac_bits */
|
|
|
|
extern u64 kvm_default_tsc_scaling_ratio;
|
2011-03-25 16:44:51 +08:00
|
|
|
|
2016-06-22 14:59:56 +08:00
|
|
|
extern u64 kvm_mce_cap_supported;
|
2011-03-25 16:44:51 +08:00
|
|
|
|
2007-11-19 15:24:28 +08:00
|
|
|
enum emulation_result {
|
2013-06-26 00:24:41 +08:00
|
|
|
EMULATE_DONE, /* no further processing */
|
|
|
|
EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
|
2007-11-19 15:24:28 +08:00
|
|
|
EMULATE_FAIL, /* can't emulate this instruction */
|
|
|
|
};
|
|
|
|
|
KVM: x86 emulator: Only allow VMCALL/VMMCALL trapped by #UD
When executing a test program called "crashme", we found the KVM guest cannot
survive more than ten seconds, then encounterd kernel panic. The basic concept
of "crashme" is generating random assembly code and trying to execute it.
After some fixes on emulator insn validity judgment, we found it's hard to
get the current emulator handle the invalid instructions correctly, for the
#UD trap for hypercall patching caused troubles. The problem is, if the opcode
itself was OK, but combination of opcode and modrm_reg was invalid, and one
operand of the opcode was memory (SrcMem or DstMem), the emulator will fetch
the memory operand first rather than checking the validity, and may encounter
an error there. For example, ".byte 0xfe, 0x34, 0xcd" has this problem.
In the patch, we simply check that if the invalid opcode wasn't vmcall/vmmcall,
then return from emulate_instruction() and inject a #UD to guest. With the
patch, the guest had been running for more than 12 hours.
Signed-off-by: Feng (Eric) Liu <eric.e.liu@intel.com>
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-01-02 14:49:22 +08:00
|
|
|
#define EMULTYPE_NO_DECODE (1 << 0)
|
|
|
|
#define EMULTYPE_TRAP_UD (1 << 1)
|
2009-04-12 18:36:57 +08:00
|
|
|
#define EMULTYPE_SKIP (1 << 2)
|
2018-08-24 04:56:49 +08:00
|
|
|
#define EMULTYPE_ALLOW_RETRY (1 << 3)
|
|
|
|
#define EMULTYPE_NO_UD_ON_FAIL (1 << 4)
|
|
|
|
#define EMULTYPE_VMWARE (1 << 5)
|
2018-08-24 04:56:53 +08:00
|
|
|
int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
|
|
|
|
int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
|
|
|
|
void *insn, int insn_len);
|
2018-08-24 04:56:47 +08:00
|
|
|
|
2008-01-31 21:57:37 +08:00
|
|
|
void kvm_enable_efer_bits(u64);
|
2013-04-20 16:52:36 +08:00
|
|
|
bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
|
2015-04-08 21:30:38 +08:00
|
|
|
int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-30 04:42:12 +08:00
|
|
|
int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
|
|
|
struct x86_emulate_ctxt;
|
|
|
|
|
2018-03-09 00:57:27 +08:00
|
|
|
int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
|
2016-11-30 04:40:37 +08:00
|
|
|
int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
|
2007-11-19 15:24:28 +08:00
|
|
|
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
|
2015-03-03 03:43:31 +08:00
|
|
|
int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
|
2010-06-30 12:25:15 +08:00
|
|
|
int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
2008-05-27 16:18:46 +08:00
|
|
|
void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
|
2010-02-18 18:15:01 +08:00
|
|
|
int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
|
2014-11-24 21:35:24 +08:00
|
|
|
void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
|
2008-05-27 16:18:46 +08:00
|
|
|
|
2012-02-08 21:34:38 +08:00
|
|
|
int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
|
|
|
|
int reason, bool has_error_code, u32 error_code);
|
2008-03-25 05:14:53 +08:00
|
|
|
|
2010-06-10 22:02:14 +08:00
|
|
|
int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
|
2010-06-10 22:02:16 +08:00
|
|
|
int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
|
2010-06-10 22:02:15 +08:00
|
|
|
int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
|
2010-12-21 18:12:00 +08:00
|
|
|
int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
|
2010-04-13 15:05:23 +08:00
|
|
|
int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
|
|
|
|
int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
|
2008-02-24 17:20:43 +08:00
|
|
|
unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
|
2007-11-19 15:24:28 +08:00
|
|
|
void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
|
2010-06-10 11:27:12 +08:00
|
|
|
int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
2015-04-08 21:30:38 +08:00
|
|
|
int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2012-11-30 04:42:12 +08:00
|
|
|
int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
2009-10-05 19:07:21 +08:00
|
|
|
unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
|
2011-11-10 20:57:23 +08:00
|
|
|
bool kvm_rdpmc(struct kvm_vcpu *vcpu);
|
2009-10-05 19:07:21 +08:00
|
|
|
|
2007-11-25 19:41:11 +08:00
|
|
|
void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
|
|
|
|
void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
|
2010-04-22 18:33:13 +08:00
|
|
|
void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
|
|
|
|
void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
|
2010-11-29 22:12:30 +08:00
|
|
|
void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
|
2010-09-10 23:30:51 +08:00
|
|
|
int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
|
|
|
|
gfn_t gfn, void *data, int offset, int len,
|
|
|
|
u32 access);
|
2009-09-01 17:03:25 +08:00
|
|
|
bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
|
2014-10-03 06:10:05 +08:00
|
|
|
bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
|
2007-11-25 19:41:11 +08:00
|
|
|
|
2012-07-19 18:45:20 +08:00
|
|
|
static inline int __kvm_irq_line_state(unsigned long *irq_state,
|
|
|
|
int irq_source_id, int level)
|
|
|
|
{
|
|
|
|
/* Logical OR for level trig interrupt */
|
|
|
|
if (level)
|
|
|
|
__set_bit(irq_source_id, irq_state);
|
|
|
|
else
|
|
|
|
__clear_bit(irq_source_id, irq_state);
|
|
|
|
|
|
|
|
return !!(*irq_state);
|
|
|
|
}
|
|
|
|
|
2018-06-28 05:59:20 +08:00
|
|
|
#define KVM_MMU_ROOT_CURRENT BIT(0)
|
|
|
|
#define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
|
|
|
|
#define KVM_MMU_ROOTS_ALL (~0UL)
|
2018-06-28 05:59:17 +08:00
|
|
|
|
2012-07-19 18:45:20 +08:00
|
|
|
int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
|
|
|
|
void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
|
2008-10-06 13:48:45 +08:00
|
|
|
|
2008-05-15 09:52:48 +08:00
|
|
|
void kvm_inject_nmi(struct kvm_vcpu *vcpu);
|
|
|
|
|
2011-09-22 17:02:48 +08:00
|
|
|
int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
|
2007-11-19 15:24:28 +08:00
|
|
|
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
|
|
|
|
void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_mmu_load(struct kvm_vcpu *vcpu);
|
|
|
|
void kvm_mmu_unload(struct kvm_vcpu *vcpu);
|
2008-09-24 00:18:34 +08:00
|
|
|
void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
|
2018-10-09 03:28:07 +08:00
|
|
|
void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
|
|
|
|
ulong roots_to_free);
|
2014-09-02 19:23:06 +08:00
|
|
|
gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception);
|
2010-11-22 23:53:26 +08:00
|
|
|
gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
|
|
|
gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
|
|
|
|
struct x86_exception *exception);
|
2007-11-19 15:24:28 +08:00
|
|
|
|
2015-11-10 20:36:33 +08:00
|
|
|
void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
|
|
|
|
|
2007-11-19 15:24:28 +08:00
|
|
|
int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
|
|
|
|
|
2016-11-24 01:01:38 +08:00
|
|
|
int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code,
|
2010-12-21 18:12:07 +08:00
|
|
|
void *insn, int insn_len);
|
2008-09-24 00:18:35 +08:00
|
|
|
void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
|
2018-06-28 05:59:14 +08:00
|
|
|
void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
|
2018-06-28 05:59:15 +08:00
|
|
|
void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
|
2007-10-20 15:34:38 +08:00
|
|
|
|
2008-02-07 20:47:41 +08:00
|
|
|
void kvm_enable_tdp(void);
|
2008-07-15 02:36:36 +08:00
|
|
|
void kvm_disable_tdp(void);
|
2008-02-07 20:47:41 +08:00
|
|
|
|
2014-09-02 19:23:06 +08:00
|
|
|
static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
|
|
|
|
struct x86_exception *exception)
|
2011-11-28 20:42:16 +08:00
|
|
|
{
|
|
|
|
return gpa;
|
|
|
|
}
|
|
|
|
|
2007-11-19 15:08:31 +08:00
|
|
|
static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
|
|
|
|
{
|
|
|
|
struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
|
|
|
|
|
|
|
|
return (struct kvm_mmu_page *)page_private(page);
|
|
|
|
}
|
|
|
|
|
2008-07-10 21:53:33 +08:00
|
|
|
static inline u16 kvm_read_ldt(void)
|
2007-11-19 15:08:31 +08:00
|
|
|
{
|
|
|
|
u16 ldt;
|
|
|
|
asm("sldt %0" : "=g"(ldt));
|
|
|
|
return ldt;
|
|
|
|
}
|
|
|
|
|
2008-07-10 21:53:33 +08:00
|
|
|
static inline void kvm_load_ldt(u16 sel)
|
2007-11-19 15:08:31 +08:00
|
|
|
{
|
|
|
|
asm("lldt %0" : : "rm"(sel));
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
static inline unsigned long read_msr(unsigned long msr)
|
|
|
|
{
|
|
|
|
u64 value;
|
|
|
|
|
|
|
|
rdmsrl(msr, value);
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static inline u32 get_rdx_init_val(void)
|
|
|
|
{
|
|
|
|
return 0x600; /* P6 family */
|
|
|
|
}
|
|
|
|
|
2007-11-25 20:12:03 +08:00
|
|
|
static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
|
|
|
|
{
|
|
|
|
kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
|
|
|
|
}
|
|
|
|
|
2007-11-19 15:08:31 +08:00
|
|
|
#define TSS_IOPB_BASE_OFFSET 0x66
|
|
|
|
#define TSS_BASE_SIZE 0x68
|
|
|
|
#define TSS_IOPB_SIZE (65536 / 8)
|
|
|
|
#define TSS_REDIRECTION_SIZE (256 / 8)
|
2008-03-23 16:02:34 +08:00
|
|
|
#define RMODE_TSS_SIZE \
|
|
|
|
(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
|
2007-12-04 06:15:26 +08:00
|
|
|
|
2008-03-25 05:14:53 +08:00
|
|
|
enum {
|
|
|
|
TASK_SWITCH_CALL = 0,
|
|
|
|
TASK_SWITCH_IRET = 1,
|
|
|
|
TASK_SWITCH_JMP = 2,
|
|
|
|
TASK_SWITCH_GATE = 3,
|
|
|
|
};
|
|
|
|
|
2008-11-26 03:17:04 +08:00
|
|
|
#define HF_GIF_MASK (1 << 0)
|
2008-11-26 03:17:07 +08:00
|
|
|
#define HF_HIF_MASK (1 << 1)
|
|
|
|
#define HF_VINTR_MASK (1 << 2)
|
2009-04-21 22:45:08 +08:00
|
|
|
#define HF_NMI_MASK (1 << 3)
|
2009-05-11 18:35:52 +08:00
|
|
|
#define HF_IRET_MASK (1 << 4)
|
2010-11-30 00:51:47 +08:00
|
|
|
#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
|
2015-04-01 21:06:40 +08:00
|
|
|
#define HF_SMM_MASK (1 << 6)
|
|
|
|
#define HF_SMM_INSIDE_NMI_MASK (1 << 7)
|
2008-11-26 03:17:04 +08:00
|
|
|
|
2015-05-18 21:03:39 +08:00
|
|
|
#define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
|
|
|
|
#define KVM_ADDRESS_SPACE_NUM 2
|
|
|
|
|
|
|
|
#define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
|
|
|
|
#define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
|
2008-11-26 03:17:04 +08:00
|
|
|
|
2008-05-13 18:23:38 +08:00
|
|
|
/*
|
|
|
|
* Hardware virtualization extension instructions may fault if a
|
|
|
|
* reboot turns off virtualization while processes are running.
|
|
|
|
* Trap the fault and ignore the instruction if that happens.
|
|
|
|
*/
|
2010-12-02 23:52:50 +08:00
|
|
|
asmlinkage void kvm_spurious_fault(void);
|
2008-05-13 18:23:38 +08:00
|
|
|
|
2011-05-15 22:13:12 +08:00
|
|
|
#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
|
2008-05-13 18:23:38 +08:00
|
|
|
"666: " insn "\n\t" \
|
2010-12-02 23:52:50 +08:00
|
|
|
"668: \n\t" \
|
2008-08-20 07:00:08 +08:00
|
|
|
".pushsection .fixup, \"ax\" \n" \
|
2008-05-13 18:23:38 +08:00
|
|
|
"667: \n\t" \
|
2011-05-15 22:13:12 +08:00
|
|
|
cleanup_insn "\n\t" \
|
2010-12-02 23:52:50 +08:00
|
|
|
"cmpb $0, kvm_rebooting \n\t" \
|
|
|
|
"jne 668b \n\t" \
|
2008-08-15 02:25:47 +08:00
|
|
|
__ASM_SIZE(push) " $666b \n\t" \
|
2010-12-02 23:52:50 +08:00
|
|
|
"call kvm_spurious_fault \n\t" \
|
2008-05-13 18:23:38 +08:00
|
|
|
".popsection \n\t" \
|
2012-04-21 04:41:59 +08:00
|
|
|
_ASM_EXTABLE(666b, 667b)
|
2008-05-13 18:23:38 +08:00
|
|
|
|
2011-05-15 22:13:12 +08:00
|
|
|
#define __kvm_handle_fault_on_reboot(insn) \
|
|
|
|
____kvm_handle_fault_on_reboot(insn, "")
|
|
|
|
|
2008-07-25 22:24:52 +08:00
|
|
|
#define KVM_ARCH_WANT_MMU_NOTIFIER
|
2012-07-02 16:56:33 +08:00
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
|
2014-09-23 05:54:42 +08:00
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
|
2011-01-14 07:47:10 +08:00
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
|
2009-09-24 02:47:18 +08:00
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
|
2013-01-25 10:18:51 +08:00
|
|
|
int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
|
2009-07-09 20:33:52 +08:00
|
|
|
int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
|
2009-07-09 20:33:53 +08:00
|
|
|
int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
|
KVM: x86: INIT and reset sequences are different
x86 architecture defines differences between the reset and INIT sequences.
INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
References (from Intel SDM):
"If the MP protocol has completed and a BSP is chosen, subsequent INITs (either
to a specific processor or system wide) do not cause the MP protocol to be
repeated." [8.4.2: MP Initialization Protocol Requirements and Restrictions]
[Table 9-1. IA-32 Processor States Following Power-up, Reset, or INIT]
"If the processor is reset by asserting the INIT# pin, the x87 FPU state is not
changed." [9.2: X87 FPU INITIALIZATION]
"The state of the local APIC following an INIT reset is the same as it is after
a power-up or hardware reset, except that the APIC ID and arbitration ID
registers are not affected." [10.4.7.3: Local APIC State After an INIT Reset
("Wait-for-SIPI" State)]
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Message-Id: <1428924848-28212-1-git-send-email-namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-13 19:34:08 +08:00
|
|
|
void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
|
2014-09-24 15:57:54 +08:00
|
|
|
void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
|
2008-07-25 22:24:52 +08:00
|
|
|
|
KVM: X86: Implement "send IPI" hypercall
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just supports xapic
mode which can get great improvement by Exit-less IPIs. This patchset
lets a guest send multicast IPIs, with at most 128 destinations per
hypercall in 64-bit mode and 64 vCPUs per hypercall in 32-bit mode.
Hardware: Xeon Skylake 2.5GHz, 2 sockets, 40 cores, 80 threads, the VM
is 80 vCPUs, IPI microbenchmark(https://lkml.org/lkml/2017/12/19/141):
x2apic cluster mode, vanilla
Dry-run: 0, 2392199 ns
Self-IPI: 6907514, 15027589 ns
Normal IPI: 223910476, 251301666 ns
Broadcast IPI: 0, 9282161150 ns
Broadcast lock: 0, 8812934104 ns
x2apic cluster mode, pv-ipi
Dry-run: 0, 2449341 ns
Self-IPI: 6720360, 15028732 ns
Normal IPI: 228643307, 255708477 ns
Broadcast IPI: 0, 7572293590 ns => 22% performance boost
Broadcast lock: 0, 8316124651 ns
x2apic physical mode, vanilla
Dry-run: 0, 3135933 ns
Self-IPI: 8572670, 17901757 ns
Normal IPI: 226444334, 255421709 ns
Broadcast IPI: 0, 19845070887 ns
Broadcast lock: 0, 19827383656 ns
x2apic physical mode, pv-ipi
Dry-run: 0, 2446381 ns
Self-IPI: 6788217, 15021056 ns
Normal IPI: 219454441, 249583458 ns
Broadcast IPI: 0, 7806540019 ns => 154% performance boost
Broadcast lock: 0, 9143618799 ns
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-23 14:39:54 +08:00
|
|
|
int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
|
2018-08-30 10:03:30 +08:00
|
|
|
unsigned long ipi_bitmap_high, u32 min,
|
KVM: X86: Implement "send IPI" hypercall
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just supports xapic
mode which can get great improvement by Exit-less IPIs. This patchset
lets a guest send multicast IPIs, with at most 128 destinations per
hypercall in 64-bit mode and 64 vCPUs per hypercall in 32-bit mode.
Hardware: Xeon Skylake 2.5GHz, 2 sockets, 40 cores, 80 threads, the VM
is 80 vCPUs, IPI microbenchmark(https://lkml.org/lkml/2017/12/19/141):
x2apic cluster mode, vanilla
Dry-run: 0, 2392199 ns
Self-IPI: 6907514, 15027589 ns
Normal IPI: 223910476, 251301666 ns
Broadcast IPI: 0, 9282161150 ns
Broadcast lock: 0, 8812934104 ns
x2apic cluster mode, pv-ipi
Dry-run: 0, 2449341 ns
Self-IPI: 6720360, 15028732 ns
Normal IPI: 228643307, 255708477 ns
Broadcast IPI: 0, 7572293590 ns => 22% performance boost
Broadcast lock: 0, 8316124651 ns
x2apic physical mode, vanilla
Dry-run: 0, 3135933 ns
Self-IPI: 8572670, 17901757 ns
Normal IPI: 226444334, 255421709 ns
Broadcast IPI: 0, 19845070887 ns
Broadcast lock: 0, 19827383656 ns
x2apic physical mode, pv-ipi
Dry-run: 0, 2446381 ns
Self-IPI: 6788217, 15021056 ns
Normal IPI: 219454441, 249583458 ns
Broadcast IPI: 0, 7806540019 ns => 154% performance boost
Broadcast lock: 0, 9143618799 ns
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-23 14:39:54 +08:00
|
|
|
unsigned long icr, int op_64_bit);
|
|
|
|
|
2018-08-05 22:07:47 +08:00
|
|
|
u64 kvm_get_arch_capabilities(void);
|
2009-09-07 16:12:18 +08:00
|
|
|
void kvm_define_shared_msr(unsigned index, u32 msr);
|
2014-08-28 02:16:44 +08:00
|
|
|
int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
|
2009-09-07 16:12:18 +08:00
|
|
|
|
2015-10-20 15:39:03 +08:00
|
|
|
u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
|
2015-10-20 15:39:07 +08:00
|
|
|
u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
|
2015-10-20 15:39:03 +08:00
|
|
|
|
2014-11-02 17:54:45 +08:00
|
|
|
unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
|
2010-02-24 00:47:55 +08:00
|
|
|
bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
|
|
|
|
|
2016-01-07 22:05:10 +08:00
|
|
|
void kvm_make_mclock_inprogress_request(struct kvm *kvm);
|
|
|
|
void kvm_make_scan_ioapic_request(struct kvm *kvm);
|
|
|
|
|
2010-10-14 17:22:46 +08:00
|
|
|
void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_async_pf *work);
|
|
|
|
void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_async_pf *work);
|
2010-10-18 00:13:42 +08:00
|
|
|
void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_async_pf *work);
|
2010-10-14 17:22:53 +08:00
|
|
|
bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
|
2010-10-14 17:22:46 +08:00
|
|
|
extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
|
|
|
|
|
KVM: x86: Add kvm_skip_emulated_instruction and use it.
kvm_skip_emulated_instruction calls both
kvm_x86_ops->skip_emulated_instruction and kvm_vcpu_check_singlestep,
skipping the emulated instruction and generating a trap if necessary.
Replacing skip_emulated_instruction calls with
kvm_skip_emulated_instruction is straightforward, except for:
- ICEBP, which is already inside a trap, so avoid triggering another trap.
- Instructions that can trigger exits to userspace, such as the IO insns,
MOVs to CR8, and HALT. If kvm_skip_emulated_instruction does trigger a
KVM_GUESTDBG_SINGLESTEP exit, and the handling code for
IN/OUT/MOV CR8/HALT also triggers an exit to userspace, the latter will
take precedence. The singlestep will be triggered again on the next
instruction, which is the current behavior.
- Task switch instructions which would require additional handling (e.g.
the task switch bit) and are instead left alone.
- Cases where VMLAUNCH/VMRESUME do not proceed to the next instruction,
which do not trigger singlestep traps as mentioned previously.
Signed-off-by: Kyle Huey <khuey@kylehuey.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2016-11-30 04:40:40 +08:00
|
|
|
int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
|
|
|
|
int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
|
KVM: VMX: use preemption timer to force immediate VMExit
A VMX preemption timer value of '0' is guaranteed to cause a VMExit
prior to the CPU executing any instructions in the guest. Use the
preemption timer (if it's supported) to trigger immediate VMExit
in place of the current method of sending a self-IPI. This ensures
that pending VMExit injection to L1 occurs prior to executing any
instructions in the guest (regardless of nesting level).
When deferring VMExit injection, KVM generates an immediate VMExit
from the (possibly nested) guest by sending itself an IPI. Because
hardware interrupts are blocked prior to VMEnter and are unblocked
(in hardware) after VMEnter, this results in taking a VMExit(INTR)
before any guest instruction is executed. But, as this approach
relies on the IPI being received before VMEnter executes, it only
works as intended when KVM is running as L0. Because there are no
architectural guarantees regarding when IPIs are delivered, when
running nested the INTR may "arrive" long after L2 is running e.g.
L0 KVM doesn't force an immediate switch to L1 to deliver an INTR.
For the most part, this unintended delay is not an issue since the
events being injected to L1 also do not have architectural guarantees
regarding their timing. The notable exception is the VMX preemption
timer[1], which is architecturally guaranteed to cause a VMExit prior
to executing any instructions in the guest if the timer value is '0'
at VMEnter. Specifically, the delay in injecting the VMExit causes
the preemption timer KVM unit test to fail when run in a nested guest.
Note: this approach is viable even on CPUs with a broken preemption
timer, as broken in this context only means the timer counts at the
wrong rate. There are no known errata affecting timer value of '0'.
[1] I/O SMIs also have guarantees on when they arrive, but I have
no idea if/how those are emulated in KVM.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
[Use a hook for SVM instead of leaving the default in x86.c - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-08-28 06:21:12 +08:00
|
|
|
void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
|
2010-12-21 18:12:01 +08:00
|
|
|
|
2011-11-10 20:57:22 +08:00
|
|
|
int kvm_is_in_guest(void);
|
|
|
|
|
2015-10-12 19:38:32 +08:00
|
|
|
int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
|
|
|
|
int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
|
2015-07-29 17:56:48 +08:00
|
|
|
bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
|
|
|
|
bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
|
2011-11-10 20:57:22 +08:00
|
|
|
|
2015-09-18 22:29:47 +08:00
|
|
|
bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
|
|
|
|
struct kvm_vcpu **dest_vcpu);
|
|
|
|
|
2016-07-13 04:09:27 +08:00
|
|
|
void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
|
2015-09-18 22:29:49 +08:00
|
|
|
struct kvm_lapic_irq *irq);
|
KVM/ARM Changes for v4.4-rc1
Includes a number of fixes for the arch-timer, introducing proper
level-triggered semantics for the arch-timers, a series of patches to
synchronously halt a guest (prerequisite for IRQ forwarding), some tracepoint
improvements, a tweak for the EL2 panic handlers, some more VGIC cleanups
getting rid of redundant state, and finally a stylistic change that gets rid of
some ctags warnings.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
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6laPDlzL+g45oMQRwNL7GnM1deRftaxvT2Wi+X84D/6Y/BD6MPds4HgtBfuWcSZ1
CyRJ0Ot/zrxenucSuJuOjq+a9gdizdAczkbB1MfYDULJH8fb6D+7RYLo3zgh4Xo4
pla3L9U6gSWe+YopBjZtZH43m3fwiwSM/v+uHOTIcXrsbR+fEgx/EFSKmA/DUCuo
P5cFO/ceUGu7nATCexu5V82TgR2hvurrsR7mqfwY8YcF6HRM+NEOoS29xWC77v5S
u/F08TKuKQLv0YTEFTyLETI/oEeuC0cHtrRQBNf4+9kXEOzKyXaae0wR/I6X2Ss=
=GMNk
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/ARM Changes for v4.4-rc1
Includes a number of fixes for the arch-timer, introducing proper
level-triggered semantics for the arch-timers, a series of patches to
synchronously halt a guest (prerequisite for IRQ forwarding), some tracepoint
improvements, a tweak for the EL2 panic handlers, some more VGIC cleanups
getting rid of redundant state, and finally a stylistic change that gets rid of
some ctags warnings.
Conflicts:
arch/x86/include/asm/kvm_host.h
2015-11-04 23:24:17 +08:00
|
|
|
|
2016-05-05 03:09:43 +08:00
|
|
|
static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
if (kvm_x86_ops->vcpu_blocking)
|
|
|
|
kvm_x86_ops->vcpu_blocking(vcpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
if (kvm_x86_ops->vcpu_unblocking)
|
|
|
|
kvm_x86_ops->vcpu_unblocking(vcpu);
|
|
|
|
}
|
|
|
|
|
2016-05-13 18:16:35 +08:00
|
|
|
static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
|
2015-08-27 22:41:15 +08:00
|
|
|
|
2016-06-16 06:23:45 +08:00
|
|
|
static inline int kvm_cpu_get_apicid(int mps_cpu)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
2017-09-14 05:29:21 +08:00
|
|
|
return default_cpu_present_to_apicid(mps_cpu);
|
2016-06-16 06:23:45 +08:00
|
|
|
#else
|
|
|
|
WARN_ON_ONCE(1);
|
|
|
|
return BAD_APICID;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2017-10-11 22:54:45 +08:00
|
|
|
#define put_smstate(type, buf, offset, val) \
|
|
|
|
*(type *)((buf) + (offset) - 0x7e00) = val
|
|
|
|
|
2008-10-23 13:26:29 +08:00
|
|
|
#endif /* _ASM_X86_KVM_HOST_H */
|