2007-11-13 03:54:30 +08:00
|
|
|
# Select 32 or 64 bit
|
|
|
|
|
config 64BIT
|
2007-11-17 22:37:31 +08:00
|
|
|
bool "64-bit kernel" if ARCH = "x86"
|
2012-12-21 05:51:55 +08:00
|
|
|
default ARCH != "i386"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-13 03:54:30 +08:00
|
|
|
Say yes to build a 64-bit kernel - formerly known as x86_64
|
|
|
|
|
Say no to build a 32-bit kernel - formerly known as i386
|
|
|
|
|
|
|
|
|
|
config X86_32
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on !64BIT
|
2011-05-09 01:55:19 +08:00
|
|
|
select CLKSRC_I8253
|
2012-10-09 07:28:08 +08:00
|
|
|
select HAVE_UID16
|
2007-11-13 03:54:30 +08:00
|
|
|
|
|
|
|
|
config X86_64
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on 64BIT
|
2012-04-05 01:39:58 +08:00
|
|
|
select X86_DEV_DMA_OPS
|
lockref: implement lockless reference count updates using cmpxchg()
Instead of taking the spinlock, the lockless versions atomically check
that the lock is not taken, and do the reference count update using a
cmpxchg() loop. This is semantically identical to doing the reference
count update protected by the lock, but avoids the "wait for lock"
contention that you get when accesses to the reference count are
contended.
Note that a "lockref" is absolutely _not_ equivalent to an atomic_t.
Even when the lockref reference counts are updated atomically with
cmpxchg, the fact that they also verify the state of the spinlock means
that the lockless updates can never happen while somebody else holds the
spinlock.
So while "lockref_put_or_lock()" looks a lot like just another name for
"atomic_dec_and_lock()", and both optimize to lockless updates, they are
fundamentally different: the decrement done by atomic_dec_and_lock() is
truly independent of any lock (as long as it doesn't decrement to zero),
so a locked region can still see the count change.
The lockref structure, in contrast, really is a *locked* reference
count. If you hold the spinlock, the reference count will be stable and
you can modify the reference count without using atomics, because even
the lockless updates will see and respect the state of the lock.
In order to enable the cmpxchg lockless code, the architecture needs to
do three things:
(1) Make sure that the "arch_spinlock_t" and an "unsigned int" can fit
in an aligned u64, and have a "cmpxchg()" implementation that works
on such a u64 data type.
(2) define a helper function to test for a spinlock being unlocked
("arch_spin_value_unlocked()")
(3) select the "ARCH_USE_CMPXCHG_LOCKREF" config variable in its
Kconfig file.
This enables it for x86-64 (but not 32-bit, we'd need to make sure
cmpxchg() turns into the proper cmpxchg8b in order to enable it for
32-bit mode).
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-09-03 03:12:15 +08:00
|
|
|
select ARCH_USE_CMPXCHG_LOCKREF
|
2007-11-07 04:35:08 +08:00
|
|
|
|
|
|
|
|
### Arch settings
|
2007-11-07 06:30:30 +08:00
|
|
|
config X86
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2013-05-01 06:28:42 +08:00
|
|
|
select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS
|
2013-10-08 10:18:07 +08:00
|
|
|
select ARCH_MIGHT_HAVE_PC_PARPORT
|
2008-06-17 19:19:34 +08:00
|
|
|
select HAVE_AOUT if X86_32
|
2008-05-06 05:19:50 +08:00
|
|
|
select HAVE_UNSTABLE_SCHED_CLOCK
|
2012-10-25 20:16:43 +08:00
|
|
|
select ARCH_SUPPORTS_NUMA_BALANCING
|
2013-11-19 01:27:06 +08:00
|
|
|
select ARCH_SUPPORTS_INT128 if X86_64
|
2012-10-25 20:16:43 +08:00
|
|
|
select ARCH_WANTS_PROT_NUMA_PROT_NONE
|
2008-02-09 17:46:40 +08:00
|
|
|
select HAVE_IDE
|
2008-02-03 04:10:34 +08:00
|
|
|
select HAVE_OPROFILE
|
2011-06-02 02:05:09 +08:00
|
|
|
select HAVE_PCSPKR_PLATFORM
|
2010-11-17 04:49:01 +08:00
|
|
|
select HAVE_PERF_EVENTS
|
2008-07-24 12:27:05 +08:00
|
|
|
select HAVE_IOREMAP_PROT
|
2008-02-03 04:10:35 +08:00
|
|
|
select HAVE_KPROBES
|
2010-08-26 04:39:17 +08:00
|
|
|
select HAVE_MEMBLOCK
|
2011-07-14 17:44:23 +08:00
|
|
|
select HAVE_MEMBLOCK_NODE_MAP
|
2011-07-14 17:46:03 +08:00
|
|
|
select ARCH_DISCARD_MEMBLOCK
|
2008-07-26 19:52:50 +08:00
|
|
|
select ARCH_WANT_OPTIONAL_GPIOLIB
|
2009-01-07 18:05:10 +08:00
|
|
|
select ARCH_WANT_FRAME_POINTERS
|
2009-06-18 07:28:12 +08:00
|
|
|
select HAVE_DMA_ATTRS
|
2011-12-29 20:09:51 +08:00
|
|
|
select HAVE_DMA_CONTIGUOUS if !SWIOTLB
|
2008-03-05 06:28:37 +08:00
|
|
|
select HAVE_KRETPROBES
|
2010-02-25 21:34:46 +08:00
|
|
|
select HAVE_OPTPROBES
|
2012-09-28 16:15:20 +08:00
|
|
|
select HAVE_KPROBES_ON_FTRACE
|
2008-08-15 03:45:11 +08:00
|
|
|
select HAVE_FTRACE_MCOUNT_RECORD
|
ftrace/x86: Add support for -mfentry to x86_64
If the kernel is compiled with gcc 4.6.0 which supports -mfentry,
then use that instead of mcount.
With mcount, frame pointers are forced with the -pg option and we
get something like:
<can_vma_merge_before>:
55 push %rbp
48 89 e5 mov %rsp,%rbp
53 push %rbx
41 51 push %r9
e8 fe 6a 39 00 callq ffffffff81483d00 <mcount>
31 c0 xor %eax,%eax
48 89 fb mov %rdi,%rbx
48 89 d7 mov %rdx,%rdi
48 33 73 30 xor 0x30(%rbx),%rsi
48 f7 c6 ff ff ff f7 test $0xfffffffff7ffffff,%rsi
With -mfentry, frame pointers are no longer forced and the call looks
like this:
<can_vma_merge_before>:
e8 33 af 37 00 callq ffffffff81461b40 <__fentry__>
53 push %rbx
48 89 fb mov %rdi,%rbx
31 c0 xor %eax,%eax
48 89 d7 mov %rdx,%rdi
41 51 push %r9
48 33 73 30 xor 0x30(%rbx),%rsi
48 f7 c6 ff ff ff f7 test $0xfffffffff7ffffff,%rsi
This adds the ftrace hook at the beginning of the function before a
frame is set up, and allows the function callbacks to be able to access
parameters. As kprobes now can use function tracing (at least on x86)
this speeds up the kprobe hooks that are at the beginning of the
function.
Link: http://lkml.kernel.org/r/20120807194100.130477900@goodmis.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Andi Kleen <andi@firstfloor.org>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-02-10 02:32:18 +08:00
|
|
|
select HAVE_FENTRY if X86_64
|
2010-10-15 11:32:44 +08:00
|
|
|
select HAVE_C_RECORDMCOUNT
|
2008-05-17 12:01:36 +08:00
|
|
|
select HAVE_DYNAMIC_FTRACE
|
2012-09-28 16:15:17 +08:00
|
|
|
select HAVE_DYNAMIC_FTRACE_WITH_REGS
|
2008-10-07 07:06:12 +08:00
|
|
|
select HAVE_FUNCTION_TRACER
|
2008-12-02 07:20:39 +08:00
|
|
|
select HAVE_FUNCTION_GRAPH_TRACER
|
function-graph: add stack frame test
In case gcc does something funny with the stack frames, or the return
from function code, we would like to detect that.
An arch may implement passing of a variable that is unique to the
function and can be saved on entering a function and can be tested
when exiting the function. Usually the frame pointer can be used for
this purpose.
This patch also implements this for x86. Where it passes in the stack
frame of the parent function, and will test that frame on exit.
There was a case in x86_32 with optimize for size (-Os) where, for a
few functions, gcc would align the stack frame and place a copy of the
return address into it. The function graph tracer modified the copy and
not the actual return address. On return from the funtion, it did not go
to the tracer hook, but returned to the parent. This broke the function
graph tracer, because the return of the parent (where gcc did not do
this funky manipulation) returned to the location that the child function
was suppose to. This caused strange kernel crashes.
This test detected the problem and pointed out where the issue was.
This modifies the parameters of one of the functions that the arch
specific code calls, so it includes changes to arch code to accommodate
the new prototype.
Note, I notice that the parsic arch implements its own push_return_trace.
This is now a generic function and the ftrace_push_return_trace should be
used instead. This patch does not touch that code.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2009-06-19 00:45:08 +08:00
|
|
|
select HAVE_FUNCTION_GRAPH_FP_TEST
|
2008-11-06 05:05:44 +08:00
|
|
|
select HAVE_FUNCTION_TRACE_MCOUNT_TEST
|
2009-08-25 05:43:11 +08:00
|
|
|
select HAVE_SYSCALL_TRACEPOINTS
|
2012-10-09 07:28:16 +08:00
|
|
|
select SYSCTL_EXCEPTION_TRACE
|
2009-01-28 00:01:14 +08:00
|
|
|
select HAVE_KVM
|
2009-01-28 00:02:29 +08:00
|
|
|
select HAVE_ARCH_KGDB
|
2008-04-21 05:35:12 +08:00
|
|
|
select HAVE_ARCH_TRACEHOOK
|
2008-06-29 18:19:31 +08:00
|
|
|
select HAVE_GENERIC_DMA_COHERENT if X86_32
|
2008-07-25 16:45:33 +08:00
|
|
|
select HAVE_EFFICIENT_UNALIGNED_ACCESS
|
2008-11-23 18:39:08 +08:00
|
|
|
select USER_STACKTRACE_SUPPORT
|
2010-02-11 00:25:17 +08:00
|
|
|
select HAVE_REGS_AND_STACK_ACCESS_API
|
2009-01-09 22:13:15 +08:00
|
|
|
select HAVE_DMA_API_DEBUG
|
2009-01-05 07:41:25 +08:00
|
|
|
select HAVE_KERNEL_GZIP
|
|
|
|
|
select HAVE_KERNEL_BZIP2
|
|
|
|
|
select HAVE_KERNEL_LZMA
|
2011-01-13 09:01:24 +08:00
|
|
|
select HAVE_KERNEL_XZ
|
2010-01-09 06:42:45 +08:00
|
|
|
select HAVE_KERNEL_LZO
|
2013-07-09 07:01:48 +08:00
|
|
|
select HAVE_KERNEL_LZ4
|
2009-06-02 02:13:57 +08:00
|
|
|
select HAVE_HW_BREAKPOINT
|
2010-04-12 00:55:56 +08:00
|
|
|
select HAVE_MIXED_BREAKPOINTS_REGS
|
2009-12-17 08:33:54 +08:00
|
|
|
select PERF_EVENTS
|
2010-05-16 04:57:48 +08:00
|
|
|
select HAVE_PERF_EVENTS_NMI
|
2012-08-07 21:20:36 +08:00
|
|
|
select HAVE_PERF_REGS
|
2012-08-07 21:20:40 +08:00
|
|
|
select HAVE_PERF_USER_STACK_DUMP
|
2012-10-09 07:28:11 +08:00
|
|
|
select HAVE_DEBUG_KMEMLEAK
|
2009-12-17 08:33:54 +08:00
|
|
|
select ANON_INODES
|
2012-11-29 03:50:23 +08:00
|
|
|
select HAVE_ALIGNED_STRUCT_PAGE if SLUB
|
|
|
|
|
select HAVE_CMPXCHG_LOCAL
|
2012-01-13 09:17:33 +08:00
|
|
|
select HAVE_CMPXCHG_DOUBLE
|
2009-02-27 03:38:56 +08:00
|
|
|
select HAVE_ARCH_KMEMCHECK
|
2009-09-19 14:40:22 +08:00
|
|
|
select HAVE_USER_RETURN_NOTIFIER
|
2012-01-11 07:10:21 +08:00
|
|
|
select ARCH_BINFMT_ELF_RANDOMIZE_PIE
|
2010-09-23 11:10:23 +08:00
|
|
|
select HAVE_ARCH_JUMP_LABEL
|
2012-07-31 05:41:09 +08:00
|
|
|
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
2011-10-13 02:53:17 +08:00
|
|
|
select SPARSE_IRQ
|
2011-03-08 17:24:26 +08:00
|
|
|
select GENERIC_FIND_FIRST_BIT
|
2010-09-27 20:46:02 +08:00
|
|
|
select GENERIC_IRQ_PROBE
|
|
|
|
|
select GENERIC_PENDING_IRQ if SMP
|
2010-12-17 00:59:57 +08:00
|
|
|
select GENERIC_IRQ_SHOW
|
2011-08-23 21:29:42 +08:00
|
|
|
select GENERIC_CLOCKEVENTS_MIN_ADJUST
|
2011-02-07 09:24:08 +08:00
|
|
|
select IRQ_FORCED_THREADING
|
2012-05-22 02:45:37 +08:00
|
|
|
select HAVE_BPF_JIT if X86_64
|
2012-10-09 07:30:04 +08:00
|
|
|
select HAVE_ARCH_TRANSPARENT_HUGEPAGE
|
2011-06-09 21:08:26 +08:00
|
|
|
select CLKEVT_I8253
|
2011-07-13 13:14:22 +08:00
|
|
|
select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
2011-11-24 20:54:28 +08:00
|
|
|
select GENERIC_IOMAP
|
2012-05-04 01:16:43 +08:00
|
|
|
select DCACHE_WORD_ACCESS
|
2012-04-20 21:05:48 +08:00
|
|
|
select GENERIC_SMP_IDLE_THREAD
|
2012-07-31 05:42:46 +08:00
|
|
|
select ARCH_WANT_IPC_PARSE_VERSION if X86_32
|
2012-04-13 05:48:03 +08:00
|
|
|
select HAVE_ARCH_SECCOMP_FILTER
|
2012-04-25 02:23:15 +08:00
|
|
|
select BUILDTIME_EXTABLE_SORT
|
2012-05-19 00:45:44 +08:00
|
|
|
select GENERIC_CMOS_UPDATE
|
mm: soft-dirty bits for user memory changes tracking
The soft-dirty is a bit on a PTE which helps to track which pages a task
writes to. In order to do this tracking one should
1. Clear soft-dirty bits from PTEs ("echo 4 > /proc/PID/clear_refs)
2. Wait some time.
3. Read soft-dirty bits (55'th in /proc/PID/pagemap2 entries)
To do this tracking, the writable bit is cleared from PTEs when the
soft-dirty bit is. Thus, after this, when the task tries to modify a
page at some virtual address the #PF occurs and the kernel sets the
soft-dirty bit on the respective PTE.
Note, that although all the task's address space is marked as r/o after
the soft-dirty bits clear, the #PF-s that occur after that are processed
fast. This is so, since the pages are still mapped to physical memory,
and thus all the kernel does is finds this fact out and puts back
writable, dirty and soft-dirty bits on the PTE.
Another thing to note, is that when mremap moves PTEs they are marked
with soft-dirty as well, since from the user perspective mremap modifies
the virtual memory at mremap's new address.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Cc: Glauber Costa <glommer@parallels.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04 06:01:20 +08:00
|
|
|
select HAVE_ARCH_SOFT_DIRTY
|
2012-05-19 00:45:44 +08:00
|
|
|
select CLOCKSOURCE_WATCHDOG
|
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
|
select ARCH_CLOCKSOURCE_DATA if X86_64
|
|
|
|
|
select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
|
|
|
|
|
select GENERIC_TIME_VSYSCALL if X86_64
|
|
|
|
|
select KTIME_SCALAR if X86_32
|
2012-05-27 01:14:39 +08:00
|
|
|
select GENERIC_STRNCPY_FROM_USER
|
2012-05-27 02:09:53 +08:00
|
|
|
select GENERIC_STRNLEN_USER
|
2012-11-28 02:33:25 +08:00
|
|
|
select HAVE_CONTEXT_TRACKING if X86_64
|
2012-09-09 20:56:31 +08:00
|
|
|
select HAVE_IRQ_TIME_ACCOUNTING
|
2013-03-07 12:48:16 +08:00
|
|
|
select VIRT_TO_BUS
|
2012-09-28 13:01:03 +08:00
|
|
|
select MODULES_USE_ELF_REL if X86_32
|
|
|
|
|
select MODULES_USE_ELF_RELA if X86_64
|
2012-10-23 10:34:11 +08:00
|
|
|
select CLONE_BACKWARDS if X86_32
|
2012-12-20 09:16:20 +08:00
|
|
|
select ARCH_USE_BUILTIN_BSWAP
|
2012-12-26 05:09:20 +08:00
|
|
|
select OLD_SIGSUSPEND3 if X86_32 || IA32_EMULATION
|
2012-12-26 08:14:55 +08:00
|
|
|
select OLD_SIGACTION if X86_32
|
|
|
|
|
select COMPAT_OLD_SIGACTION if IA32_EMULATION
|
x86: Do full rtc synchronization with ntp
Every 11 minutes ntp attempts to update the x86 rtc with the current
system time. Currently, the x86 code only updates the rtc if the system
time is within +/-15 minutes of the current value of the rtc. This
was done originally to avoid setting the RTC if the RTC was in localtime
mode (common with Windows dualbooting). Other architectures do a full
synchronization and now that we have better infrastructure to detect
when the RTC is in localtime, there is no reason that x86 should be
software limited to a 30 minute window.
This patch changes the behavior of the kernel to do a full synchronization
(year, month, day, hour, minute, and second) of the rtc when ntp requests
a synchronization between the system time and the rtc.
I've used the RTC library functions in this patchset as they do all the
required bounds checking.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: x86@kernel.org
Cc: Matt Fleming <matt.fleming@intel.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: linux-efi@vger.kernel.org
Signed-off-by: Prarit Bhargava <prarit@redhat.com>
[jstultz: Tweak commit message, fold in build fix found by fengguang
Also add select RTC_LIB to X86, per new dependency, as found by prarit]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-02-15 01:02:54 +08:00
|
|
|
select RTC_LIB
|
2013-07-02 04:04:42 +08:00
|
|
|
select HAVE_DEBUG_STACKOVERFLOW
|
2013-09-24 23:18:36 +08:00
|
|
|
select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64
|
2008-02-10 15:16:28 +08:00
|
|
|
|
2009-06-06 19:58:12 +08:00
|
|
|
config INSTRUCTION_DECODER
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on KPROBES || PERF_EVENTS || UPROBES
|
2009-06-06 19:58:12 +08:00
|
|
|
|
x86: unify arch/x86/boot/compressed/vmlinux_*.lds
Look at the:
diff -u arch/x86/boot/compressed/vmlinux_*.lds
output and realize that they're basially exactly the same except for
trivial naming differences, and the fact that the 64-bit version has a
"pgtable" thing.
So unify them.
There's some trivial cleanup there (make the output format a Kconfig thing
rather than doing #ifdef's for it, and unify both 32-bit and 64-bit BSS
end to "_ebss", where 32-bit used to use the traditional "_end"), but
other than that it's really very mindless and straigt conversion.
For example, I think we should aim to remove "startup_32" vs "startup_64",
and just call it "startup", and get rid of one more difference. I didn't
do that.
Also, notice the comment in the unified vmlinux.lds.S talks about
"head_64" and "startup_32" which is an odd and incorrect mix, but that was
actually what the old 64-bit only lds file had, so the confusion isn't
new, and now that mixing is arguably more accurate thanks to the
vmlinux.lds.S file being shared between the two cases ;)
[ Impact: cleanup, unification ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-04-27 01:12:47 +08:00
|
|
|
config OUTPUT_FORMAT
|
|
|
|
|
string
|
|
|
|
|
default "elf32-i386" if X86_32
|
|
|
|
|
default "elf64-x86-64" if X86_64
|
|
|
|
|
|
2008-05-26 05:03:18 +08:00
|
|
|
config ARCH_DEFCONFIG
|
2008-04-29 18:48:15 +08:00
|
|
|
string
|
2008-05-26 05:03:18 +08:00
|
|
|
default "arch/x86/configs/i386_defconfig" if X86_32
|
|
|
|
|
default "arch/x86/configs/x86_64_defconfig" if X86_64
|
2008-04-29 18:48:15 +08:00
|
|
|
|
2007-11-07 06:30:30 +08:00
|
|
|
config LOCKDEP_SUPPORT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 06:30:30 +08:00
|
|
|
|
|
|
|
|
config STACKTRACE_SUPPORT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 06:30:30 +08:00
|
|
|
|
2008-02-02 00:45:14 +08:00
|
|
|
config HAVE_LATENCYTOP_SUPPORT
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2007-11-07 06:30:30 +08:00
|
|
|
config MMU
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 06:30:30 +08:00
|
|
|
|
|
|
|
|
config SBUS
|
|
|
|
|
bool
|
|
|
|
|
|
2010-03-11 07:23:22 +08:00
|
|
|
config NEED_DMA_MAP_STATE
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 || INTEL_IOMMU || DMA_API_DEBUG
|
2010-03-11 07:23:22 +08:00
|
|
|
|
2010-05-27 05:44:32 +08:00
|
|
|
config NEED_SG_DMA_LENGTH
|
2010-05-27 05:44:33 +08:00
|
|
|
def_bool y
|
2010-05-27 05:44:32 +08:00
|
|
|
|
2007-11-07 06:30:30 +08:00
|
|
|
config GENERIC_ISA_DMA
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on ISA_DMA_API
|
2007-11-07 06:30:30 +08:00
|
|
|
|
|
|
|
|
config GENERIC_BUG
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 06:30:30 +08:00
|
|
|
depends on BUG
|
2008-12-16 19:40:27 +08:00
|
|
|
select GENERIC_BUG_RELATIVE_POINTERS if X86_64
|
|
|
|
|
|
|
|
|
|
config GENERIC_BUG_RELATIVE_POINTERS
|
|
|
|
|
bool
|
2007-11-07 06:30:30 +08:00
|
|
|
|
|
|
|
|
config GENERIC_HWEIGHT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 06:30:30 +08:00
|
|
|
|
|
|
|
|
config ARCH_MAY_HAVE_PC_FDC
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on ISA_DMA_API
|
2007-11-07 06:30:30 +08:00
|
|
|
|
2007-11-07 04:35:08 +08:00
|
|
|
config RWSEM_XCHGADD_ALGORITHM
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
2007-11-07 04:35:08 +08:00
|
|
|
|
|
|
|
|
config GENERIC_CALIBRATE_DELAY
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2008-02-01 09:35:06 +08:00
|
|
|
config ARCH_HAS_CPU_RELAX
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2008-04-28 17:12:22 +08:00
|
|
|
config ARCH_HAS_CACHE_LINE_SIZE
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2012-01-26 07:09:14 +08:00
|
|
|
config ARCH_HAS_CPU_AUTOPROBE
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2008-01-30 20:33:32 +08:00
|
|
|
config HAVE_SETUP_PER_CPU_AREA
|
2009-01-27 11:56:48 +08:00
|
|
|
def_bool y
|
2008-01-30 20:32:51 +08:00
|
|
|
|
2009-08-14 14:00:49 +08:00
|
|
|
config NEED_PER_CPU_EMBED_FIRST_CHUNK
|
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
|
|
config NEED_PER_CPU_PAGE_FIRST_CHUNK
|
2009-02-20 15:29:09 +08:00
|
|
|
def_bool y
|
|
|
|
|
|
2007-12-08 09:12:39 +08:00
|
|
|
config ARCH_HIBERNATION_POSSIBLE
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2007-12-08 09:14:00 +08:00
|
|
|
config ARCH_SUSPEND_POSSIBLE
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2013-04-29 21:29:48 +08:00
|
|
|
config ARCH_WANT_HUGE_PMD_SHARE
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2013-04-30 15:03:42 +08:00
|
|
|
config ARCH_WANT_GENERAL_HUGETLB
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2007-11-07 06:30:30 +08:00
|
|
|
config ZONE_DMA32
|
|
|
|
|
bool
|
|
|
|
|
default X86_64
|
|
|
|
|
|
|
|
|
|
config AUDIT_ARCH
|
|
|
|
|
bool
|
|
|
|
|
default X86_64
|
|
|
|
|
|
2008-04-09 17:03:37 +08:00
|
|
|
config ARCH_SUPPORTS_OPTIMIZED_INLINING
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2009-04-01 06:23:17 +08:00
|
|
|
config ARCH_SUPPORTS_DEBUG_PAGEALLOC
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2009-09-02 09:25:07 +08:00
|
|
|
config HAVE_INTEL_TXT
|
|
|
|
|
def_bool y
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on INTEL_IOMMU && ACPI
|
2009-09-02 09:25:07 +08:00
|
|
|
|
2008-01-30 20:32:27 +08:00
|
|
|
config X86_32_SMP
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_32 && SMP
|
|
|
|
|
|
|
|
|
|
config X86_64_SMP
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 && SMP
|
|
|
|
|
|
2007-11-07 06:30:30 +08:00
|
|
|
config X86_HT
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2007-12-05 00:19:07 +08:00
|
|
|
depends on SMP
|
2007-11-07 06:30:30 +08:00
|
|
|
|
2009-02-09 21:17:40 +08:00
|
|
|
config X86_32_LAZY_GS
|
|
|
|
|
def_bool y
|
2009-02-09 21:17:40 +08:00
|
|
|
depends on X86_32 && !CC_STACKPROTECTOR
|
2009-02-09 21:17:40 +08:00
|
|
|
|
2010-03-06 00:34:46 +08:00
|
|
|
config ARCH_HWEIGHT_CFLAGS
|
|
|
|
|
string
|
|
|
|
|
default "-fcall-saved-ecx -fcall-saved-edx" if X86_32
|
|
|
|
|
default "-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" if X86_64
|
|
|
|
|
|
uprobes, mm, x86: Add the ability to install and remove uprobes breakpoints
Add uprobes support to the core kernel, with x86 support.
This commit adds the kernel facilities, the actual uprobes
user-space ABI and perf probe support comes in later commits.
General design:
Uprobes are maintained in an rb-tree indexed by inode and offset
(the offset here is from the start of the mapping). For a unique
(inode, offset) tuple, there can be at most one uprobe in the
rb-tree.
Since the (inode, offset) tuple identifies a unique uprobe, more
than one user may be interested in the same uprobe. This provides
the ability to connect multiple 'consumers' to the same uprobe.
Each consumer defines a handler and a filter (optional). The
'handler' is run every time the uprobe is hit, if it matches the
'filter' criteria.
The first consumer of a uprobe causes the breakpoint to be
inserted at the specified address and subsequent consumers are
appended to this list. On subsequent probes, the consumer gets
appended to the existing list of consumers. The breakpoint is
removed when the last consumer unregisters. For all other
unregisterations, the consumer is removed from the list of
consumers.
Given a inode, we get a list of the mms that have mapped the
inode. Do the actual registration if mm maps the page where a
probe needs to be inserted/removed.
We use a temporary list to walk through the vmas that map the
inode.
- The number of maps that map the inode, is not known before we
walk the rmap and keeps changing.
- extending vm_area_struct wasn't recommended, it's a
size-critical data structure.
- There can be more than one maps of the inode in the same mm.
We add callbacks to the mmap methods to keep an eye on text vmas
that are of interest to uprobes. When a vma of interest is mapped,
we insert the breakpoint at the right address.
Uprobe works by replacing the instruction at the address defined
by (inode, offset) with the arch specific breakpoint
instruction. We save a copy of the original instruction at the
uprobed address.
This is needed for:
a. executing the instruction out-of-line (xol).
b. instruction analysis for any subsequent fixups.
c. restoring the instruction back when the uprobe is unregistered.
We insert or delete a breakpoint instruction, and this
breakpoint instruction is assumed to be the smallest instruction
available on the platform. For fixed size instruction platforms
this is trivially true, for variable size instruction platforms
the breakpoint instruction is typically the smallest (often a
single byte).
Writing the instruction is done by COWing the page and changing
the instruction during the copy, this even though most platforms
allow atomic writes of the breakpoint instruction. This also
mirrors the behaviour of a ptrace() memory write to a PRIVATE
file map.
The core worker is derived from KSM's replace_page() logic.
In essence, similar to KSM:
a. allocate a new page and copy over contents of the page that
has the uprobed vaddr
b. modify the copy and insert the breakpoint at the required
address
c. switch the original page with the copy containing the
breakpoint
d. flush page tables.
replace_page() is being replicated here because of some minor
changes in the type of pages and also because Hugh Dickins had
plans to improve replace_page() for KSM specific work.
Instruction analysis on x86 is based on instruction decoder and
determines if an instruction can be probed and determines the
necessary fixups after singlestep. Instruction analysis is done
at probe insertion time so that we avoid having to repeat the
same analysis every time a probe is hit.
A lot of code here is due to the improvement/suggestions/inputs
from Peter Zijlstra.
Changelog:
(v10):
- Add code to clear REX.B prefix as suggested by Denys Vlasenko
and Masami Hiramatsu.
(v9):
- Use insn_offset_modrm as suggested by Masami Hiramatsu.
(v7):
Handle comments from Peter Zijlstra:
- Dont take reference to inode. (expect inode to uprobe_register to be sane).
- Use PTR_ERR to set the return value.
- No need to take reference to inode.
- use PTR_ERR to return error value.
- register and uprobe_unregister share code.
(v5):
- Modified del_consumer as per comments from Peter.
- Drop reference to inode before dropping reference to uprobe.
- Use i_size_read(inode) instead of inode->i_size.
- Ensure uprobe->consumers is NULL, before __uprobe_unregister() is called.
- Includes errno.h as recommended by Stephen Rothwell to fix a build issue
on sparc defconfig
- Remove restrictions while unregistering.
- Earlier code leaked inode references under some conditions while
registering/unregistering.
- Continue the vma-rmap walk even if the intermediate vma doesnt
meet the requirements.
- Validate the vma found by find_vma before inserting/removing the
breakpoint
- Call del_consumer under mutex_lock.
- Use hash locks.
- Handle mremap.
- Introduce find_least_offset_node() instead of close match logic in
find_uprobe
- Uprobes no more depends on MM_OWNER; No reference to task_structs
while inserting/removing a probe.
- Uses read_mapping_page instead of grab_cache_page so that the pages
have valid content.
- pass NULL to get_user_pages for the task parameter.
- call SetPageUptodate on the new page allocated in write_opcode.
- fix leaking a reference to the new page under certain conditions.
- Include Instruction Decoder if Uprobes gets defined.
- Remove const attributes for instruction prefix arrays.
- Uses mm_context to know if the application is 32 bit.
Signed-off-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
Also-written-by: Jim Keniston <jkenisto@us.ibm.com>
Reviewed-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Christoph Hellwig <hch@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Roland McGrath <roland@hack.frob.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Anton Arapov <anton@redhat.com>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Denys Vlasenko <vda.linux@googlemail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linux-mm <linux-mm@kvack.org>
Link: http://lkml.kernel.org/r/20120209092642.GE16600@linux.vnet.ibm.com
[ Made various small edits to the commit log ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-02-09 17:26:42 +08:00
|
|
|
config ARCH_SUPPORTS_UPROBES
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
source "init/Kconfig"
|
2008-10-19 11:27:21 +08:00
|
|
|
source "kernel/Kconfig.freezer"
|
2007-11-07 06:30:30 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
menu "Processor type and features"
|
|
|
|
|
|
2012-01-17 03:57:18 +08:00
|
|
|
config ZONE_DMA
|
|
|
|
|
bool "DMA memory allocation support" if EXPERT
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
DMA memory allocation support allows devices with less than 32-bit
|
|
|
|
|
addressing to allocate within the first 16MB of address space.
|
|
|
|
|
Disable if no such devices will be used.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config SMP
|
|
|
|
|
bool "Symmetric multi-processing support"
|
|
|
|
|
---help---
|
|
|
|
|
This enables support for systems with more than one CPU. If you have
|
|
|
|
|
a system with only one CPU, like most personal computers, say N. If
|
|
|
|
|
you have a system with more than one CPU, say Y.
|
|
|
|
|
|
|
|
|
|
If you say N here, the kernel will run on single and multiprocessor
|
|
|
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
|
|
|
you say Y here, the kernel will run on many, but not all,
|
|
|
|
|
singleprocessor machines. On a singleprocessor machine, the kernel
|
|
|
|
|
will run faster if you say N here.
|
|
|
|
|
|
|
|
|
|
Note that if you say Y here and choose architecture "586" or
|
|
|
|
|
"Pentium" under "Processor family", the kernel will not work on 486
|
|
|
|
|
architectures. Similarly, multiprocessor kernels for the "PPro"
|
|
|
|
|
architecture may not work on all Pentium based boards.
|
|
|
|
|
|
|
|
|
|
People using multiprocessor machines who say Y here should also say
|
|
|
|
|
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
|
|
|
|
|
Management" code will be disabled if you say Y here.
|
|
|
|
|
|
2011-08-15 08:02:26 +08:00
|
|
|
See also <file:Documentation/x86/i386/IO-APIC.txt>,
|
2007-11-10 04:56:54 +08:00
|
|
|
<file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
|
|
|
|
|
<http://www.tldp.org/docs.html#howto>.
|
|
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
|
2009-02-17 09:29:58 +08:00
|
|
|
config X86_X2APIC
|
|
|
|
|
bool "Support x2apic"
|
2011-08-24 08:05:25 +08:00
|
|
|
depends on X86_LOCAL_APIC && X86_64 && IRQ_REMAP
|
2009-02-17 09:29:58 +08:00
|
|
|
---help---
|
|
|
|
|
This enables x2apic support on CPUs that have this feature.
|
|
|
|
|
|
|
|
|
|
This allows 32-bit apic IDs (so it can support very large systems),
|
|
|
|
|
and accesses the local apic via MSRs not via mmio.
|
|
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
|
2008-06-20 03:13:09 +08:00
|
|
|
config X86_MPPARSE
|
2012-10-26 00:35:44 +08:00
|
|
|
bool "Enable MPS table" if ACPI || SFI
|
2008-10-30 18:38:24 +08:00
|
|
|
default y
|
2008-07-10 20:42:03 +08:00
|
|
|
depends on X86_LOCAL_APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-06-20 03:13:09 +08:00
|
|
|
For old smp systems that do not have proper acpi support. Newer systems
|
|
|
|
|
(esp with 64bit cpus) with acpi support, MADT and DSDT will override it
|
|
|
|
|
|
2009-01-30 06:19:22 +08:00
|
|
|
config X86_BIGSMP
|
|
|
|
|
bool "Support for big SMP systems with more than 8 CPUs"
|
|
|
|
|
depends on X86_32 && SMP
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-01-30 06:19:22 +08:00
|
|
|
This option is needed for the systems that have more than 8 CPUs
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2013-01-22 01:23:09 +08:00
|
|
|
config GOLDFISH
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_GOLDFISH
|
|
|
|
|
|
2009-02-21 08:59:11 +08:00
|
|
|
if X86_32
|
2009-02-10 10:18:14 +08:00
|
|
|
config X86_EXTENDED_PLATFORM
|
|
|
|
|
bool "Support for extended (non-PC) x86 platforms"
|
|
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-01-28 01:11:43 +08:00
|
|
|
If you disable this option then the kernel will only support
|
|
|
|
|
standard PC platforms. (which covers the vast majority of
|
|
|
|
|
systems out there.)
|
|
|
|
|
|
2009-02-21 08:59:11 +08:00
|
|
|
If you enable this option then you'll be able to select support
|
|
|
|
|
for the following (non-PC) 32 bit x86 platforms:
|
2013-06-24 08:05:25 +08:00
|
|
|
Goldfish (Android emulator)
|
2009-02-21 08:59:11 +08:00
|
|
|
AMD Elan
|
|
|
|
|
NUMAQ (IBM/Sequent)
|
|
|
|
|
RDC R-321x SoC
|
|
|
|
|
SGI 320/540 (Visual Workstation)
|
2012-04-05 01:40:21 +08:00
|
|
|
STA2X11-based (e.g. Northville)
|
2009-02-21 08:59:11 +08:00
|
|
|
Summit/EXA (IBM x440)
|
|
|
|
|
Unisys ES7000 IA32 series
|
2009-08-29 20:54:20 +08:00
|
|
|
Moorestown MID devices
|
2009-01-28 01:11:43 +08:00
|
|
|
|
|
|
|
|
If you have one of these systems, or if you want to build a
|
|
|
|
|
generic distribution kernel, say Y here - otherwise say N.
|
2009-02-21 08:59:11 +08:00
|
|
|
endif
|
2009-01-28 01:11:43 +08:00
|
|
|
|
2009-02-21 08:59:11 +08:00
|
|
|
if X86_64
|
|
|
|
|
config X86_EXTENDED_PLATFORM
|
|
|
|
|
bool "Support for extended (non-PC) x86 platforms"
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
If you disable this option then the kernel will only support
|
|
|
|
|
standard PC platforms. (which covers the vast majority of
|
|
|
|
|
systems out there.)
|
|
|
|
|
|
|
|
|
|
If you enable this option then you'll be able to select support
|
|
|
|
|
for the following (non-PC) 64 bit x86 platforms:
|
2011-12-06 00:07:26 +08:00
|
|
|
Numascale NumaChip
|
2009-02-21 08:59:11 +08:00
|
|
|
ScaleMP vSMP
|
|
|
|
|
SGI Ultraviolet
|
|
|
|
|
|
|
|
|
|
If you have one of these systems, or if you want to build a
|
|
|
|
|
generic distribution kernel, say Y here - otherwise say N.
|
|
|
|
|
endif
|
2009-02-10 10:18:14 +08:00
|
|
|
# This is an alphabetically sorted list of 64 bit extended platforms
|
|
|
|
|
# Please maintain the alphabetic order if and when there are additions
|
2011-12-06 00:07:26 +08:00
|
|
|
config X86_NUMACHIP
|
|
|
|
|
bool "Numascale NumaChip"
|
|
|
|
|
depends on X86_64
|
|
|
|
|
depends on X86_EXTENDED_PLATFORM
|
|
|
|
|
depends on NUMA
|
|
|
|
|
depends on SMP
|
|
|
|
|
depends on X86_X2APIC
|
2012-12-08 05:24:32 +08:00
|
|
|
depends on PCI_MMCONFIG
|
2011-12-06 00:07:26 +08:00
|
|
|
---help---
|
|
|
|
|
Adds support for Numascale NumaChip large-SMP systems. Needed to
|
|
|
|
|
enable more than ~168 cores.
|
|
|
|
|
If you don't have one of these, you should say N here.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-02-10 10:18:14 +08:00
|
|
|
config X86_VSMP
|
|
|
|
|
bool "ScaleMP vSMP"
|
2013-03-05 04:20:21 +08:00
|
|
|
select HYPERVISOR_GUEST
|
2009-02-10 10:18:14 +08:00
|
|
|
select PARAVIRT
|
|
|
|
|
depends on X86_64 && PCI
|
|
|
|
|
depends on X86_EXTENDED_PLATFORM
|
2012-04-16 15:39:35 +08:00
|
|
|
depends on SMP
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-02-10 10:18:14 +08:00
|
|
|
Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
|
|
|
|
|
supposed to run on these EM64T-based machines. Only choose this option
|
|
|
|
|
if you have one of these machines.
|
2008-01-30 20:33:36 +08:00
|
|
|
|
2009-01-20 11:36:04 +08:00
|
|
|
config X86_UV
|
|
|
|
|
bool "SGI Ultraviolet"
|
|
|
|
|
depends on X86_64
|
2009-02-10 10:18:14 +08:00
|
|
|
depends on X86_EXTENDED_PLATFORM
|
2009-04-04 04:39:42 +08:00
|
|
|
depends on NUMA
|
2009-04-21 04:02:31 +08:00
|
|
|
depends on X86_X2APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-01-20 11:36:04 +08:00
|
|
|
This option is needed in order to support SGI Ultraviolet systems.
|
|
|
|
|
If you don't have one of these, you should say N here.
|
|
|
|
|
|
2009-02-10 10:18:14 +08:00
|
|
|
# Following is an alphabetically sorted list of 32 bit extended platforms
|
|
|
|
|
# Please maintain the alphabetic order if and when there are additions
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2013-01-22 01:23:09 +08:00
|
|
|
config X86_GOLDFISH
|
|
|
|
|
bool "Goldfish (Virtual Platform)"
|
|
|
|
|
depends on X86_32
|
2013-06-24 08:05:25 +08:00
|
|
|
depends on X86_EXTENDED_PLATFORM
|
2013-01-22 01:23:09 +08:00
|
|
|
---help---
|
|
|
|
|
Enable support for the Goldfish virtual platform used primarily
|
|
|
|
|
for Android development. Unless you are building for the Android
|
|
|
|
|
Goldfish emulator say N here.
|
|
|
|
|
|
2010-11-10 04:08:04 +08:00
|
|
|
config X86_INTEL_CE
|
|
|
|
|
bool "CE4100 TV platform"
|
|
|
|
|
depends on PCI
|
|
|
|
|
depends on PCI_GODIRECT
|
|
|
|
|
depends on X86_32
|
|
|
|
|
depends on X86_EXTENDED_PLATFORM
|
2010-11-10 04:08:08 +08:00
|
|
|
select X86_REBOOTFIXUPS
|
2011-02-23 04:07:37 +08:00
|
|
|
select OF
|
|
|
|
|
select OF_EARLY_FLATTREE
|
2011-12-17 06:50:17 +08:00
|
|
|
select IRQ_DOMAIN
|
2010-11-10 04:08:04 +08:00
|
|
|
---help---
|
|
|
|
|
Select for the Intel CE media processor (CE4100) SOC.
|
|
|
|
|
This option compiles in support for the CE4100 SOC for settop
|
|
|
|
|
boxes and media devices.
|
|
|
|
|
|
2011-12-06 07:14:39 +08:00
|
|
|
config X86_WANT_INTEL_MID
|
2011-07-13 00:49:29 +08:00
|
|
|
bool "Intel MID platform support"
|
|
|
|
|
depends on X86_32
|
|
|
|
|
depends on X86_EXTENDED_PLATFORM
|
|
|
|
|
---help---
|
|
|
|
|
Select to build a kernel capable of supporting Intel MID platform
|
|
|
|
|
systems which do not have the PCI legacy interfaces (Moorestown,
|
|
|
|
|
Medfield). If you are building for a PC class system say N here.
|
|
|
|
|
|
2011-12-06 07:14:39 +08:00
|
|
|
if X86_WANT_INTEL_MID
|
2011-07-13 00:49:29 +08:00
|
|
|
|
2011-12-06 21:28:22 +08:00
|
|
|
config X86_INTEL_MID
|
|
|
|
|
bool
|
|
|
|
|
|
2011-11-10 21:29:14 +08:00
|
|
|
config X86_MDFLD
|
|
|
|
|
bool "Medfield MID platform"
|
|
|
|
|
depends on PCI
|
|
|
|
|
depends on PCI_GOANY
|
|
|
|
|
depends on X86_IO_APIC
|
2011-12-29 22:43:16 +08:00
|
|
|
select X86_INTEL_MID
|
|
|
|
|
select SFI
|
|
|
|
|
select DW_APB_TIMER
|
2011-11-10 21:29:14 +08:00
|
|
|
select APB_TIMER
|
|
|
|
|
select I2C
|
|
|
|
|
select SPI
|
|
|
|
|
select INTEL_SCU_IPC
|
|
|
|
|
select X86_PLATFORM_DEVICES
|
2012-01-27 01:35:05 +08:00
|
|
|
select MFD_INTEL_MSIC
|
2011-11-10 21:29:14 +08:00
|
|
|
---help---
|
|
|
|
|
Medfield is Intel's Low Power Intel Architecture (LPIA) based Moblin
|
|
|
|
|
Internet Device(MID) platform.
|
|
|
|
|
Unlike standard x86 PCs, Medfield does not have many legacy devices
|
|
|
|
|
nor standard legacy replacement devices/features. e.g. Medfield does
|
|
|
|
|
not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
|
|
|
|
|
|
2011-07-13 00:49:29 +08:00
|
|
|
endif
|
|
|
|
|
|
2013-01-18 21:45:59 +08:00
|
|
|
config X86_INTEL_LPSS
|
|
|
|
|
bool "Intel Low Power Subsystem Support"
|
|
|
|
|
depends on ACPI
|
|
|
|
|
select COMMON_CLK
|
2013-09-13 22:02:29 +08:00
|
|
|
select PINCTRL
|
2013-01-18 21:45:59 +08:00
|
|
|
---help---
|
|
|
|
|
Select to build support for Intel Low Power Subsystem such as
|
|
|
|
|
found on Intel Lynxpoint PCH. Selecting this option enables
|
2013-09-13 22:02:29 +08:00
|
|
|
things like clock tree (common clock framework) and pincontrol
|
|
|
|
|
which are needed by the LPSS peripheral drivers.
|
2013-01-18 21:45:59 +08:00
|
|
|
|
2009-02-10 10:18:14 +08:00
|
|
|
config X86_RDC321X
|
|
|
|
|
bool "RDC R-321x SoC"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32
|
2009-02-10 10:18:14 +08:00
|
|
|
depends on X86_EXTENDED_PLATFORM
|
|
|
|
|
select M486
|
|
|
|
|
select X86_REBOOTFIXUPS
|
|
|
|
|
---help---
|
|
|
|
|
This option is needed for RDC R-321x system-on-chip, also known
|
|
|
|
|
as R-8610-(G).
|
|
|
|
|
If you don't have one of these chips, you should say N here.
|
|
|
|
|
|
2009-01-28 01:43:09 +08:00
|
|
|
config X86_32_NON_STANDARD
|
2009-01-28 01:24:57 +08:00
|
|
|
bool "Support non-standard 32-bit SMP architectures"
|
|
|
|
|
depends on X86_32 && SMP
|
2009-02-10 10:18:14 +08:00
|
|
|
depends on X86_EXTENDED_PLATFORM
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2012-04-05 01:40:21 +08:00
|
|
|
This option compiles in the NUMAQ, Summit, bigsmp, ES7000,
|
|
|
|
|
STA2X11, default subarchitectures. It is intended for a generic
|
|
|
|
|
binary kernel. If you select them all, kernel will probe it
|
|
|
|
|
one by one and will fallback to default.
|
2008-06-09 09:31:54 +08:00
|
|
|
|
2009-02-10 10:18:14 +08:00
|
|
|
# Alphabetically sorted list of Non standard 32 bit platforms
|
2008-06-09 09:31:54 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config X86_NUMAQ
|
|
|
|
|
bool "NUMAQ (IBM/Sequent)"
|
2009-01-28 01:43:09 +08:00
|
|
|
depends on X86_32_NON_STANDARD
|
2010-02-25 08:59:55 +08:00
|
|
|
depends on PCI
|
2007-11-10 04:56:54 +08:00
|
|
|
select NUMA
|
2009-01-28 01:24:57 +08:00
|
|
|
select X86_MPPARSE
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-06-09 09:31:54 +08:00
|
|
|
This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
|
|
|
|
|
NUMA multiquad box. This changes the way that processors are
|
|
|
|
|
bootstrapped, and uses Clustered Logical APIC addressing mode instead
|
|
|
|
|
of Flat Logical. You will need a new lynxer.elf file to flash your
|
|
|
|
|
firmware with - send email to <Martin.Bligh@us.ibm.com>.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-09-27 00:35:07 +08:00
|
|
|
config X86_SUPPORTS_MEMORY_FAILURE
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2009-09-27 00:35:07 +08:00
|
|
|
# MCE code calls memory_failure():
|
|
|
|
|
depends on X86_MCE
|
|
|
|
|
# On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
|
|
|
|
|
depends on !X86_NUMAQ
|
|
|
|
|
# On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
|
|
|
|
|
depends on X86_64 || !SPARSEMEM
|
|
|
|
|
select ARCH_SUPPORTS_MEMORY_FAILURE
|
|
|
|
|
|
2008-07-10 21:55:27 +08:00
|
|
|
config X86_VISWS
|
|
|
|
|
bool "SGI 320/540 (Visual Workstation)"
|
2009-02-10 10:18:14 +08:00
|
|
|
depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
|
|
|
|
|
depends on X86_32_NON_STANDARD
|
|
|
|
|
---help---
|
2008-07-10 21:55:27 +08:00
|
|
|
The SGI Visual Workstation series is an IA32-based workstation
|
|
|
|
|
based on SGI systems chips with some legacy PC hardware attached.
|
|
|
|
|
|
|
|
|
|
Say Y here to create a kernel to run on the SGI 320 or 540.
|
|
|
|
|
|
|
|
|
|
A kernel compiled for the Visual Workstation will run on general
|
|
|
|
|
PCs as well. See <file:Documentation/sgi-visws.txt> for details.
|
|
|
|
|
|
2012-04-05 01:40:21 +08:00
|
|
|
config STA2X11
|
|
|
|
|
bool "STA2X11 Companion Chip Support"
|
|
|
|
|
depends on X86_32_NON_STANDARD && PCI
|
|
|
|
|
select X86_DEV_DMA_OPS
|
|
|
|
|
select X86_DMA_REMAP
|
|
|
|
|
select SWIOTLB
|
|
|
|
|
select MFD_STA2X11
|
|
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
This adds support for boards based on the STA2X11 IO-Hub,
|
|
|
|
|
a.k.a. "ConneXt". The chip is used in place of the standard
|
|
|
|
|
PC chipset, so all "standard" peripherals are missing. If this
|
|
|
|
|
option is selected the kernel will still be able to boot on
|
|
|
|
|
standard PC machines.
|
|
|
|
|
|
2009-01-28 01:24:57 +08:00
|
|
|
config X86_SUMMIT
|
|
|
|
|
bool "Summit/EXA (IBM x440)"
|
2009-01-28 01:43:09 +08:00
|
|
|
depends on X86_32_NON_STANDARD
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-01-28 01:24:57 +08:00
|
|
|
This option is needed for IBM systems that use the Summit/EXA chipset.
|
|
|
|
|
In particular, it is needed for the x440.
|
2008-07-26 19:52:50 +08:00
|
|
|
|
2009-01-28 01:24:57 +08:00
|
|
|
config X86_ES7000
|
2009-02-10 10:18:14 +08:00
|
|
|
bool "Unisys ES7000 IA32 series"
|
2009-01-30 06:19:22 +08:00
|
|
|
depends on X86_32_NON_STANDARD && X86_BIGSMP
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2009-01-28 01:24:57 +08:00
|
|
|
Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
|
|
|
|
|
supposed to run on an IA32-based Unisys ES7000 system.
|
|
|
|
|
|
2010-09-25 12:06:57 +08:00
|
|
|
config X86_32_IRIS
|
|
|
|
|
tristate "Eurobraille/Iris poweroff module"
|
|
|
|
|
depends on X86_32
|
|
|
|
|
---help---
|
|
|
|
|
The Iris machines from EuroBraille do not have APM or ACPI support
|
|
|
|
|
to shut themselves down properly. A special I/O sequence is
|
|
|
|
|
needed to do so, which is what this module does at
|
|
|
|
|
kernel shutdown.
|
|
|
|
|
|
|
|
|
|
This is only for Iris machines from EuroBraille.
|
|
|
|
|
|
|
|
|
|
If unused, say N.
|
|
|
|
|
|
2008-11-11 16:05:16 +08:00
|
|
|
config SCHED_OMIT_FRAME_POINTER
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Single-depth WCHAN output"
|
2008-11-07 03:10:49 +08:00
|
|
|
depends on X86
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Calculate simpler /proc/<PID>/wchan values. If this option
|
|
|
|
|
is disabled then wchan values will recurse back to the
|
|
|
|
|
caller function. This provides more accurate wchan values,
|
|
|
|
|
at the expense of slightly more scheduling overhead.
|
|
|
|
|
|
|
|
|
|
If in doubt, say "Y".
|
|
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
menuconfig HYPERVISOR_GUEST
|
|
|
|
|
bool "Linux guest support"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2013-03-05 04:20:21 +08:00
|
|
|
Say Y here to enable options for running Linux under various hyper-
|
|
|
|
|
visors. This option enables basic hypervisor detection and platform
|
|
|
|
|
setup.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
If you say N, all options in this submenu will be skipped and
|
|
|
|
|
disabled, and Linux guest support won't be built in.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
if HYPERVISOR_GUEST
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2008-01-30 20:33:32 +08:00
|
|
|
config PARAVIRT
|
|
|
|
|
bool "Enable paravirtualization code"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-01-30 20:33:32 +08:00
|
|
|
This changes the kernel so it can modify itself when it is run
|
|
|
|
|
under a hypervisor, potentially improving performance significantly
|
|
|
|
|
over full virtualization. However, when run without a hypervisor
|
|
|
|
|
the kernel is theoretically slower and slightly larger.
|
|
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
config PARAVIRT_DEBUG
|
|
|
|
|
bool "paravirt-ops debugging"
|
|
|
|
|
depends on PARAVIRT && DEBUG_KERNEL
|
|
|
|
|
---help---
|
|
|
|
|
Enable to debug paravirt_ops internals. Specifically, BUG if
|
|
|
|
|
a paravirt_op is missing when it is called.
|
|
|
|
|
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14 08:16:55 +08:00
|
|
|
config PARAVIRT_SPINLOCKS
|
|
|
|
|
bool "Paravirtualization layer for spinlocks"
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on PARAVIRT && SMP
|
2013-08-09 22:21:50 +08:00
|
|
|
select UNINLINE_SPIN_UNLOCK
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14 08:16:55 +08:00
|
|
|
---help---
|
|
|
|
|
Paravirtualized spinlocks allow a pvops backend to replace the
|
|
|
|
|
spinlock implementation with something virtualization-friendly
|
|
|
|
|
(for example, block the virtual CPU rather than spinning).
|
|
|
|
|
|
2013-10-22 00:05:08 +08:00
|
|
|
It has a minimal impact on native kernels and gives a nice performance
|
|
|
|
|
benefit on paravirtualized KVM / Xen kernels.
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14 08:16:55 +08:00
|
|
|
|
2013-10-22 00:05:08 +08:00
|
|
|
If you are unsure how to answer this question, answer Y.
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14 08:16:55 +08:00
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
source "arch/x86/xen/Kconfig"
|
2008-06-03 22:17:29 +08:00
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
config KVM_GUEST
|
|
|
|
|
bool "KVM Guest support (including kvmclock)"
|
|
|
|
|
depends on PARAVIRT
|
|
|
|
|
select PARAVIRT_CLOCK
|
|
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2013-03-05 04:20:21 +08:00
|
|
|
This option enables various optimizations for running under the KVM
|
|
|
|
|
hypervisor. It includes a paravirtualized clock, so that instead
|
|
|
|
|
of relying on a PIT (or probably other) emulation by the
|
|
|
|
|
underlying device model, the host provides the guest with
|
|
|
|
|
timing infrastructure such as time of day, and system time
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2013-08-09 22:22:01 +08:00
|
|
|
config KVM_DEBUG_FS
|
|
|
|
|
bool "Enable debug information for KVM Guests in debugfs"
|
|
|
|
|
depends on KVM_GUEST && DEBUG_FS
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
This option enables collection of various statistics for KVM guest.
|
|
|
|
|
Statistics are displayed in debugfs filesystem. Enabling this option
|
|
|
|
|
may incur significant overhead.
|
|
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
source "arch/x86/lguest/Kconfig"
|
|
|
|
|
|
|
|
|
|
config PARAVIRT_TIME_ACCOUNTING
|
|
|
|
|
bool "Paravirtual steal time accounting"
|
|
|
|
|
depends on PARAVIRT
|
|
|
|
|
default n
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2013-03-05 04:20:21 +08:00
|
|
|
Select this option to enable fine granularity task steal time
|
|
|
|
|
accounting. Time spent executing other tasks in parallel with
|
|
|
|
|
the current vCPU is discounted from the vCPU power. To account for
|
|
|
|
|
that, there can be a small performance impact.
|
|
|
|
|
|
|
|
|
|
If in doubt, say N here.
|
|
|
|
|
|
|
|
|
|
config PARAVIRT_CLOCK
|
|
|
|
|
bool
|
2008-06-25 12:19:14 +08:00
|
|
|
|
2013-03-05 04:20:21 +08:00
|
|
|
endif #HYPERVISOR_GUEST
|
2008-06-25 12:19:14 +08:00
|
|
|
|
2010-02-10 17:20:20 +08:00
|
|
|
config NO_BOOTMEM
|
2010-08-26 04:39:18 +08:00
|
|
|
def_bool y
|
2010-02-10 17:20:20 +08:00
|
|
|
|
2008-04-19 08:49:15 +08:00
|
|
|
config MEMTEST
|
|
|
|
|
bool "Memtest"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-03-22 09:56:19 +08:00
|
|
|
This option adds a kernel parameter 'memtest', which allows memtest
|
2008-04-19 08:49:15 +08:00
|
|
|
to be set.
|
2009-02-05 23:21:53 +08:00
|
|
|
memtest=0, mean disabled; -- default
|
|
|
|
|
memtest=1, mean do 1 test pattern;
|
|
|
|
|
...
|
|
|
|
|
memtest=4, mean do 4 test patterns.
|
2008-07-15 20:48:48 +08:00
|
|
|
If you are unsure how to answer this question, answer N.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config X86_SUMMIT_NUMA
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2009-01-28 01:43:09 +08:00
|
|
|
depends on X86_32 && NUMA && X86_32_NON_STANDARD
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config X86_CYCLONE_TIMER
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2011-10-29 06:48:42 +08:00
|
|
|
depends on X86_SUMMIT
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
source "arch/x86/Kconfig.cpu"
|
|
|
|
|
|
|
|
|
|
config HPET_TIMER
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool X86_64
|
2007-11-10 04:56:54 +08:00
|
|
|
prompt "HPET Timer Support" if X86_32
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
|
|
|
|
Use the IA-PC HPET (High Precision Event Timer) to manage
|
|
|
|
|
time in preference to the PIT and RTC, if a HPET is
|
|
|
|
|
present.
|
|
|
|
|
HPET is the next generation timer replacing legacy 8254s.
|
|
|
|
|
The HPET provides a stable time base on SMP
|
|
|
|
|
systems, unlike the TSC, but it is more expensive to access,
|
|
|
|
|
as it is off-chip. You can find the HPET spec at
|
|
|
|
|
<http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-02-05 23:21:53 +08:00
|
|
|
You can safely choose Y here. However, HPET will only be
|
|
|
|
|
activated if the platform and the BIOS support this feature.
|
|
|
|
|
Otherwise the 8254 will be used for timing services.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-02-05 23:21:53 +08:00
|
|
|
Choose N to continue using the legacy 8254 timer.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config HPET_EMULATE_RTC
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2008-02-06 17:38:52 +08:00
|
|
|
depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-09-02 22:37:17 +08:00
|
|
|
config APB_TIMER
|
2011-12-18 01:43:40 +08:00
|
|
|
def_bool y if X86_INTEL_MID
|
|
|
|
|
prompt "Intel MID APB Timer Support" if X86_INTEL_MID
|
2011-06-06 19:43:07 +08:00
|
|
|
select DW_APB_TIMER
|
2011-12-18 05:57:25 +08:00
|
|
|
depends on X86_INTEL_MID && SFI
|
2009-09-02 22:37:17 +08:00
|
|
|
help
|
|
|
|
|
APB timer is the replacement for 8254, HPET on X86 MID platforms.
|
|
|
|
|
The APBT provides a stable time base on SMP
|
|
|
|
|
systems, unlike the TSC, but it is more expensive to access,
|
|
|
|
|
as it is off-chip. APB timers are always running regardless of CPU
|
|
|
|
|
C states, they are used as per CPU clockevent device when possible.
|
|
|
|
|
|
2011-01-21 06:44:16 +08:00
|
|
|
# Mark as expert because too many people got it wrong.
|
2007-11-10 04:56:54 +08:00
|
|
|
# The code disables itself when not needed.
|
2008-04-28 17:14:14 +08:00
|
|
|
config DMI
|
|
|
|
|
default y
|
2011-01-21 06:44:16 +08:00
|
|
|
bool "Enable DMI scanning" if EXPERT
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-04-28 17:14:14 +08:00
|
|
|
Enabled scanning of DMI to identify machine quirks. Say Y
|
|
|
|
|
here unless you have verified that your setup is not
|
|
|
|
|
affected by entries in the DMI blacklist. Required by PNP
|
|
|
|
|
BIOS code.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config GART_IOMMU
|
2013-10-05 05:37:56 +08:00
|
|
|
bool "Old AMD GART IOMMU support"
|
2007-11-10 04:56:54 +08:00
|
|
|
select SWIOTLB
|
2010-09-18 00:03:43 +08:00
|
|
|
depends on X86_64 && PCI && AMD_NB
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2013-10-06 17:45:20 +08:00
|
|
|
Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
|
|
|
|
|
GART based hardware IOMMUs.
|
|
|
|
|
|
|
|
|
|
The GART supports full DMA access for devices with 32-bit access
|
|
|
|
|
limitations, on systems with more than 3 GB. This is usually needed
|
|
|
|
|
for USB, sound, many IDE/SATA chipsets and some other devices.
|
|
|
|
|
|
|
|
|
|
Newer systems typically have a modern AMD IOMMU, supported via
|
|
|
|
|
the CONFIG_AMD_IOMMU=y config option.
|
|
|
|
|
|
|
|
|
|
In normal configurations this driver is only active when needed:
|
|
|
|
|
there's more than 3 GB of memory and the system contains a
|
|
|
|
|
32-bit limited device.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config CALGARY_IOMMU
|
|
|
|
|
bool "IBM Calgary IOMMU support"
|
|
|
|
|
select SWIOTLB
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on X86_64 && PCI
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Support for hardware IOMMUs in IBM's xSeries x366 and x460
|
|
|
|
|
systems. Needed to run systems with more than 3GB of memory
|
|
|
|
|
properly with 32-bit PCI devices that do not support DAC
|
|
|
|
|
(Double Address Cycle). Calgary also supports bus level
|
|
|
|
|
isolation, where all DMAs pass through the IOMMU. This
|
|
|
|
|
prevents them from going anywhere except their intended
|
|
|
|
|
destination. This catches hard-to-find kernel bugs and
|
|
|
|
|
mis-behaving drivers and devices that do not use the DMA-API
|
|
|
|
|
properly to set up their DMA buffers. The IOMMU can be
|
|
|
|
|
turned off at boot time with the iommu=off parameter.
|
|
|
|
|
Normally the kernel will make the right choice by itself.
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
|
|
|
|
config CALGARY_IOMMU_ENABLED_BY_DEFAULT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Should Calgary be enabled by default?"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on CALGARY_IOMMU
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Should Calgary be enabled by default? if you choose 'y', Calgary
|
|
|
|
|
will be used (if it exists). If you choose 'n', Calgary will not be
|
|
|
|
|
used even if it exists. If you choose 'n' and would like to use
|
|
|
|
|
Calgary anyway, pass 'iommu=calgary' on the kernel command line.
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
|
|
|
|
# need this always selected by IOMMU for the VIA workaround
|
|
|
|
|
config SWIOTLB
|
2008-11-18 19:44:21 +08:00
|
|
|
def_bool y if X86_64
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Support for software bounce buffers used on x86-64 systems
|
2012-09-03 08:38:20 +08:00
|
|
|
which don't have a hardware IOMMU. Using this PCI devices
|
|
|
|
|
which can only access 32-bits of memory can be used on systems
|
|
|
|
|
with more than 3 GB of memory.
|
|
|
|
|
If unsure, say Y.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2008-04-29 15:59:36 +08:00
|
|
|
config IOMMU_HELPER
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU
|
2008-08-26 05:15:38 +08:00
|
|
|
|
2008-05-13 03:21:12 +08:00
|
|
|
config MAXSMP
|
2010-08-22 03:32:41 +08:00
|
|
|
bool "Enable Maximum number of SMP Processors and NUMA Nodes"
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on X86_64 && SMP && DEBUG_KERNEL
|
2008-12-17 09:33:51 +08:00
|
|
|
select CPUMASK_OFFSTACK
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2010-08-22 03:32:41 +08:00
|
|
|
Enable maximum number of CPUS and NUMA Nodes for this architecture.
|
2008-05-13 03:21:12 +08:00
|
|
|
If unsure, say N.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config NR_CPUS
|
2008-12-17 09:33:51 +08:00
|
|
|
int "Maximum number of CPUs" if SMP && !MAXSMP
|
2009-04-22 09:44:48 +08:00
|
|
|
range 2 8 if SMP && X86_32 && !X86_BIGSMP
|
2013-11-05 22:37:29 +08:00
|
|
|
range 2 512 if SMP && !MAXSMP && !CPUMASK_OFFSTACK
|
2013-11-05 22:38:16 +08:00
|
|
|
range 2 8192 if SMP && !MAXSMP && CPUMASK_OFFSTACK && X86_64
|
2008-12-17 09:34:00 +08:00
|
|
|
default "1" if !SMP
|
2013-11-05 22:38:16 +08:00
|
|
|
default "8192" if MAXSMP
|
2008-12-17 09:34:00 +08:00
|
|
|
default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
|
|
|
|
|
default "8" if SMP
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This allows you to specify the maximum number of CPUs which this
|
2013-11-05 22:37:29 +08:00
|
|
|
kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum
|
|
|
|
|
supported value is 4096, otherwise the maximum value is 512. The
|
2007-11-10 04:56:54 +08:00
|
|
|
minimum value which makes sense is 2.
|
|
|
|
|
|
|
|
|
|
This is purely to save memory - each supported CPU adds
|
|
|
|
|
approximately eight kilobytes to the kernel image.
|
|
|
|
|
|
|
|
|
|
config SCHED_SMT
|
|
|
|
|
bool "SMT (Hyperthreading) scheduler support"
|
2008-02-28 05:16:30 +08:00
|
|
|
depends on X86_HT
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
SMT scheduler support improves the CPU scheduler's decision making
|
|
|
|
|
when dealing with Intel Pentium 4 chips with HyperThreading at a
|
|
|
|
|
cost of slightly increased overhead in some places. If unsure say
|
|
|
|
|
N here.
|
|
|
|
|
|
|
|
|
|
config SCHED_MC
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Multi-core scheduler support"
|
2008-02-28 05:16:30 +08:00
|
|
|
depends on X86_HT
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Multi-core scheduler support improves the CPU scheduler's decision
|
|
|
|
|
making when dealing with multi-core CPU chips at a cost of slightly
|
|
|
|
|
increased overhead in some places. If unsure say N here.
|
|
|
|
|
|
|
|
|
|
source "kernel/Kconfig.preempt"
|
|
|
|
|
|
|
|
|
|
config X86_UP_APIC
|
|
|
|
|
bool "Local APIC support on uniprocessors"
|
x86, build, pci: Fix PCI_MSI build on !SMP
Commit ebd97be635 ('PCI: remove ARCH_SUPPORTS_MSI kconfig option')
removed the ARCH_SUPPORTS_MSI option which architectures could select
to indicate that they support MSI. Now, all architectures are supposed
to build fine when MSI support is enabled: instead of having the
architecture tell *when* MSI support can be used, it's up to the
architecture code to ensure that MSI support can be enabled.
On x86, commit ebd97be635 removed the following line:
select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
Which meant that MSI support was only available when the local APIC
and I/O APIC were enabled. While this is always true on SMP or x86-64,
it is not necessarily the case on i386 !SMP.
The below patch makes sure that the local APIC and I/O APIC support is
always enabled when MSI support is enabled. To do so, it:
* Ensures the X86_UP_APIC option is not visible when PCI_MSI is
enabled. This is the option that allows, on UP machines, to enable
or not the APIC support. It is already not visible on SMP systems,
or x86-64 systems, for example. We're simply also making it
invisible on i386 MSI systems.
* Ensures that the X86_LOCAL_APIC and X86_IO_APIC options are 'y'
when PCI_MSI is enabled.
Notice that this change requires a change in drivers/iommu/Kconfig to
avoid a recursive Kconfig dependencey. The AMD_IOMMU option selects
PCI_MSI, but was depending on X86_IO_APIC. This dependency is no
longer needed: as soon as PCI_MSI is selected, the presence of
X86_IO_APIC is guaranteed. Moreover, the AMD_IOMMU already depended on
X86_64, which already guaranteed that X86_IO_APIC was enabled, so this
dependency was anyway redundant.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: http://lkml.kernel.org/r/1380794354-9079-1-git-send-email-thomas.petazzoni@free-electrons.com
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-10-03 17:59:14 +08:00
|
|
|
depends on X86_32 && !SMP && !X86_32_NON_STANDARD && !PCI_MSI
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
A local APIC (Advanced Programmable Interrupt Controller) is an
|
|
|
|
|
integrated interrupt controller in the CPU. If you have a single-CPU
|
|
|
|
|
system which has a processor with a local APIC, you can say Y here to
|
|
|
|
|
enable and use it. If you say Y here even though your machine doesn't
|
|
|
|
|
have a local APIC, then the kernel will still run with no slowdown at
|
|
|
|
|
all. The local APIC supports CPU-generated self-interrupts (timer,
|
|
|
|
|
performance counters), and the NMI watchdog which detects hard
|
|
|
|
|
lockups.
|
|
|
|
|
|
|
|
|
|
config X86_UP_IOAPIC
|
|
|
|
|
bool "IO-APIC support on uniprocessors"
|
|
|
|
|
depends on X86_UP_APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
|
|
|
|
|
SMP-capable replacement for PC-style interrupt controllers. Most
|
|
|
|
|
SMP systems and many recent uniprocessor systems have one.
|
|
|
|
|
|
|
|
|
|
If you have a single-CPU system with an IO-APIC, you can say Y here
|
|
|
|
|
to use it. If you say Y here even though your machine doesn't have
|
|
|
|
|
an IO-APIC, then the kernel will still run with no slowdown at all.
|
|
|
|
|
|
|
|
|
|
config X86_LOCAL_APIC
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
x86, build, pci: Fix PCI_MSI build on !SMP
Commit ebd97be635 ('PCI: remove ARCH_SUPPORTS_MSI kconfig option')
removed the ARCH_SUPPORTS_MSI option which architectures could select
to indicate that they support MSI. Now, all architectures are supposed
to build fine when MSI support is enabled: instead of having the
architecture tell *when* MSI support can be used, it's up to the
architecture code to ensure that MSI support can be enabled.
On x86, commit ebd97be635 removed the following line:
select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
Which meant that MSI support was only available when the local APIC
and I/O APIC were enabled. While this is always true on SMP or x86-64,
it is not necessarily the case on i386 !SMP.
The below patch makes sure that the local APIC and I/O APIC support is
always enabled when MSI support is enabled. To do so, it:
* Ensures the X86_UP_APIC option is not visible when PCI_MSI is
enabled. This is the option that allows, on UP machines, to enable
or not the APIC support. It is already not visible on SMP systems,
or x86-64 systems, for example. We're simply also making it
invisible on i386 MSI systems.
* Ensures that the X86_LOCAL_APIC and X86_IO_APIC options are 'y'
when PCI_MSI is enabled.
Notice that this change requires a change in drivers/iommu/Kconfig to
avoid a recursive Kconfig dependencey. The AMD_IOMMU option selects
PCI_MSI, but was depending on X86_IO_APIC. This dependency is no
longer needed: as soon as PCI_MSI is selected, the presence of
X86_IO_APIC is guaranteed. Moreover, the AMD_IOMMU already depended on
X86_64, which already guaranteed that X86_IO_APIC was enabled, so this
dependency was anyway redundant.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: http://lkml.kernel.org/r/1380794354-9079-1-git-send-email-thomas.petazzoni@free-electrons.com
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-10-03 17:59:14 +08:00
|
|
|
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config X86_IO_APIC
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
x86, build, pci: Fix PCI_MSI build on !SMP
Commit ebd97be635 ('PCI: remove ARCH_SUPPORTS_MSI kconfig option')
removed the ARCH_SUPPORTS_MSI option which architectures could select
to indicate that they support MSI. Now, all architectures are supposed
to build fine when MSI support is enabled: instead of having the
architecture tell *when* MSI support can be used, it's up to the
architecture code to ensure that MSI support can be enabled.
On x86, commit ebd97be635 removed the following line:
select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
Which meant that MSI support was only available when the local APIC
and I/O APIC were enabled. While this is always true on SMP or x86-64,
it is not necessarily the case on i386 !SMP.
The below patch makes sure that the local APIC and I/O APIC support is
always enabled when MSI support is enabled. To do so, it:
* Ensures the X86_UP_APIC option is not visible when PCI_MSI is
enabled. This is the option that allows, on UP machines, to enable
or not the APIC support. It is already not visible on SMP systems,
or x86-64 systems, for example. We're simply also making it
invisible on i386 MSI systems.
* Ensures that the X86_LOCAL_APIC and X86_IO_APIC options are 'y'
when PCI_MSI is enabled.
Notice that this change requires a change in drivers/iommu/Kconfig to
avoid a recursive Kconfig dependencey. The AMD_IOMMU option selects
PCI_MSI, but was depending on X86_IO_APIC. This dependency is no
longer needed: as soon as PCI_MSI is selected, the presence of
X86_IO_APIC is guaranteed. Moreover, the AMD_IOMMU already depended on
X86_64, which already guaranteed that X86_IO_APIC was enabled, so this
dependency was anyway redundant.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: http://lkml.kernel.org/r/1380794354-9079-1-git-send-email-thomas.petazzoni@free-electrons.com
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-10-03 17:59:14 +08:00
|
|
|
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC || PCI_MSI
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config X86_VISWS_APIC
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32 && X86_VISWS
|
|
|
|
|
|
2008-07-15 19:48:55 +08:00
|
|
|
config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
|
|
|
|
|
bool "Reroute for broken boot IRQs"
|
|
|
|
|
depends on X86_IO_APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-07-15 19:48:55 +08:00
|
|
|
This option enables a workaround that fixes a source of
|
|
|
|
|
spurious interrupts. This is recommended when threaded
|
|
|
|
|
interrupt handling is used on systems where the generation of
|
|
|
|
|
superfluous "boot interrupts" cannot be disabled.
|
|
|
|
|
|
|
|
|
|
Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
|
|
|
|
|
entry in the chipset's IO-APIC is masked (as, e.g. the RT
|
|
|
|
|
kernel does during interrupt handling). On chipsets where this
|
|
|
|
|
boot IRQ generation cannot be disabled, this workaround keeps
|
|
|
|
|
the original IRQ line masked so that only the equivalent "boot
|
|
|
|
|
IRQ" is delivered to the CPUs. The workaround also tells the
|
|
|
|
|
kernel to set up the IRQ handler on the boot IRQ line. In this
|
|
|
|
|
way only one interrupt is delivered to the kernel. Otherwise
|
|
|
|
|
the spurious second interrupt may cause the kernel to bring
|
|
|
|
|
down (vital) interrupt lines.
|
|
|
|
|
|
|
|
|
|
Only affects "broken" chipsets. Interrupt sharing may be
|
|
|
|
|
increased on these systems.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config X86_MCE
|
2009-07-09 06:31:38 +08:00
|
|
|
bool "Machine Check / overheating reporting"
|
2011-09-13 21:23:21 +08:00
|
|
|
default y
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
2009-07-09 06:31:38 +08:00
|
|
|
Machine Check support allows the processor to notify the
|
|
|
|
|
kernel if it detects a problem (e.g. overheating, data corruption).
|
2007-11-10 04:56:54 +08:00
|
|
|
The action the kernel takes depends on the severity of the problem,
|
2009-07-09 06:31:38 +08:00
|
|
|
ranging from warning messages to halting the machine.
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-29 01:07:31 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config X86_MCE_INTEL
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Intel MCE features"
|
2009-07-09 06:31:41 +08:00
|
|
|
depends on X86_MCE && X86_LOCAL_APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Additional support for intel specific MCE features such as
|
|
|
|
|
the thermal monitor.
|
|
|
|
|
|
|
|
|
|
config X86_MCE_AMD
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "AMD MCE features"
|
2009-07-09 06:31:41 +08:00
|
|
|
depends on X86_MCE && X86_LOCAL_APIC
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Additional support for AMD specific MCE features such as
|
|
|
|
|
the DRAM Error Threshold.
|
|
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-29 01:07:31 +08:00
|
|
|
config X86_ANCIENT_MCE
|
2010-04-21 22:23:44 +08:00
|
|
|
bool "Support for old Pentium 5 / WinChip machine checks"
|
2009-07-09 06:31:37 +08:00
|
|
|
depends on X86_32 && X86_MCE
|
2009-05-27 15:57:31 +08:00
|
|
|
---help---
|
|
|
|
|
Include support for machine check handling on old Pentium 5 or WinChip
|
|
|
|
|
systems. These typically need to be enabled explicitely on the command
|
|
|
|
|
line.
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-29 01:07:31 +08:00
|
|
|
|
2009-02-12 20:49:31 +08:00
|
|
|
config X86_MCE_THRESHOLD
|
|
|
|
|
depends on X86_MCE_AMD || X86_MCE_INTEL
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2009-02-12 20:49:31 +08:00
|
|
|
|
2009-04-30 01:31:00 +08:00
|
|
|
config X86_MCE_INJECT
|
2009-07-09 06:31:41 +08:00
|
|
|
depends on X86_MCE
|
2009-04-30 01:31:00 +08:00
|
|
|
tristate "Machine check injector support"
|
|
|
|
|
---help---
|
|
|
|
|
Provide support for injecting machine checks for testing purposes.
|
|
|
|
|
If you don't know what a machine check is and you don't do kernel
|
|
|
|
|
QA it is safe to say n.
|
|
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-29 01:07:31 +08:00
|
|
|
config X86_THERMAL_VECTOR
|
|
|
|
|
def_bool y
|
2009-07-09 06:31:39 +08:00
|
|
|
depends on X86_MCE_INTEL
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-29 01:07:31 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config VM86
|
2011-01-21 06:44:16 +08:00
|
|
|
bool "Enable VM86 support" if EXPERT
|
2007-11-10 04:56:54 +08:00
|
|
|
default y
|
|
|
|
|
depends on X86_32
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
|
|
|
|
This option is required by programs like DOSEMU to run 16-bit legacy
|
2007-11-10 04:56:54 +08:00
|
|
|
code on X86 processors. It also may be needed by software like
|
2009-02-05 23:21:53 +08:00
|
|
|
XFree86 to initialize some video cards via BIOS. Disabling this
|
|
|
|
|
option saves about 6k.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config TOSHIBA
|
|
|
|
|
tristate "Toshiba Laptop support"
|
|
|
|
|
depends on X86_32
|
|
|
|
|
---help---
|
|
|
|
|
This adds a driver to safely access the System Management Mode of
|
|
|
|
|
the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
|
|
|
|
|
not work on models with a Phoenix BIOS. The System Management Mode
|
|
|
|
|
is used to set the BIOS and power saving options on Toshiba portables.
|
|
|
|
|
|
|
|
|
|
For information on utilities to make use of this driver see the
|
|
|
|
|
Toshiba Linux utilities web site at:
|
|
|
|
|
<http://www.buzzard.org.uk/toshiba/>.
|
|
|
|
|
|
|
|
|
|
Say Y if you intend to run this kernel on a Toshiba portable.
|
|
|
|
|
Say N otherwise.
|
|
|
|
|
|
|
|
|
|
config I8K
|
|
|
|
|
tristate "Dell laptop support"
|
2011-05-26 02:43:33 +08:00
|
|
|
select HWMON
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
|
|
|
|
This adds a driver to safely access the System Management Mode
|
|
|
|
|
of the CPU on the Dell Inspiron 8000. The System Management Mode
|
|
|
|
|
is used to read cpu temperature and cooling fan status and to
|
|
|
|
|
control the fans on the I8K portables.
|
|
|
|
|
|
|
|
|
|
This driver has been tested only on the Inspiron 8000 but it may
|
|
|
|
|
also work with other Dell laptops. You can force loading on other
|
|
|
|
|
models by passing the parameter `force=1' to the module. Use at
|
|
|
|
|
your own risk.
|
|
|
|
|
|
|
|
|
|
For information on utilities to make use of this driver see the
|
|
|
|
|
I8K Linux utilities web site at:
|
|
|
|
|
<http://people.debian.org/~dz/i8k/>
|
|
|
|
|
|
|
|
|
|
Say Y if you intend to run this kernel on a Dell Inspiron 8000.
|
|
|
|
|
Say N otherwise.
|
|
|
|
|
|
|
|
|
|
config X86_REBOOTFIXUPS
|
2008-10-16 13:01:38 +08:00
|
|
|
bool "Enable X86 board specific fixups for reboot"
|
|
|
|
|
depends on X86_32
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
|
|
|
|
This enables chipset and/or board specific fixups to be done
|
|
|
|
|
in order to get reboot to work correctly. This is only needed on
|
|
|
|
|
some combinations of hardware and BIOS. The symptom, for which
|
|
|
|
|
this config is intended, is when reboot ends with a stalled/hung
|
|
|
|
|
system.
|
|
|
|
|
|
|
|
|
|
Currently, the only fixup is for the Geode machines using
|
2008-01-30 20:33:36 +08:00
|
|
|
CS5530A and CS5536 chipsets and the RDC R-321x SoC.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
Say Y if you want to enable the fixup. Currently, it's safe to
|
|
|
|
|
enable this option even if you don't need it.
|
|
|
|
|
Say N otherwise.
|
|
|
|
|
|
|
|
|
|
config MICROCODE
|
2012-08-02 01:17:01 +08:00
|
|
|
tristate "CPU microcode loading support"
|
2013-10-14 00:36:29 +08:00
|
|
|
depends on CPU_SUP_AMD || CPU_SUP_INTEL
|
2007-11-10 04:56:54 +08:00
|
|
|
select FW_LOADER
|
|
|
|
|
---help---
|
2012-08-02 01:17:01 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
If you say Y here, you will be able to update the microcode on
|
2008-07-29 00:44:22 +08:00
|
|
|
certain Intel and AMD processors. The Intel support is for the
|
2012-08-02 01:17:01 +08:00
|
|
|
IA32 family, e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4,
|
|
|
|
|
Xeon etc. The AMD support is for families 0x10 and later. You will
|
|
|
|
|
obviously need the actual microcode binary data itself which is not
|
|
|
|
|
shipped with the Linux kernel.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2008-07-29 00:44:21 +08:00
|
|
|
This option selects the general module only, you need to select
|
|
|
|
|
at least one vendor specific module as well.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2012-08-02 01:17:01 +08:00
|
|
|
To compile this driver as a module, choose M here: the module
|
|
|
|
|
will be called microcode.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2008-07-29 00:44:21 +08:00
|
|
|
config MICROCODE_INTEL
|
2012-08-02 01:17:01 +08:00
|
|
|
bool "Intel microcode loading support"
|
2009-02-05 23:21:53 +08:00
|
|
|
depends on MICROCODE
|
|
|
|
|
default MICROCODE
|
|
|
|
|
select FW_LOADER
|
|
|
|
|
---help---
|
|
|
|
|
This options enables microcode patch loading support for Intel
|
|
|
|
|
processors.
|
|
|
|
|
|
|
|
|
|
For latest news and information on obtaining all the required
|
|
|
|
|
Intel ingredients for this driver, check:
|
|
|
|
|
<http://www.urbanmyth.org/microcode/>.
|
2008-07-29 00:44:21 +08:00
|
|
|
|
2008-07-29 00:44:22 +08:00
|
|
|
config MICROCODE_AMD
|
2012-08-02 01:17:01 +08:00
|
|
|
bool "AMD microcode loading support"
|
2009-02-05 23:21:53 +08:00
|
|
|
depends on MICROCODE
|
|
|
|
|
select FW_LOADER
|
|
|
|
|
---help---
|
|
|
|
|
If you select this option, microcode patch loading support for AMD
|
|
|
|
|
processors will be enabled.
|
2008-07-29 00:44:22 +08:00
|
|
|
|
2009-02-05 23:21:53 +08:00
|
|
|
config MICROCODE_OLD_INTERFACE
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on MICROCODE
|
|
|
|
|
|
2012-12-21 15:44:32 +08:00
|
|
|
config MICROCODE_INTEL_LIB
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on MICROCODE_INTEL
|
|
|
|
|
|
|
|
|
|
config MICROCODE_INTEL_EARLY
|
2013-05-31 03:09:19 +08:00
|
|
|
def_bool n
|
|
|
|
|
|
|
|
|
|
config MICROCODE_AMD_EARLY
|
|
|
|
|
def_bool n
|
|
|
|
|
|
|
|
|
|
config MICROCODE_EARLY
|
2012-12-21 15:44:32 +08:00
|
|
|
bool "Early load microcode"
|
2013-05-31 14:53:24 +08:00
|
|
|
depends on MICROCODE=y && BLK_DEV_INITRD
|
2013-05-31 03:09:19 +08:00
|
|
|
select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
|
|
|
|
|
select MICROCODE_AMD_EARLY if MICROCODE_AMD
|
2012-12-21 15:44:32 +08:00
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
This option provides functionality to read additional microcode data
|
|
|
|
|
at the beginning of initrd image. The data tells kernel to load
|
|
|
|
|
microcode to CPU's as early as possible. No functional change if no
|
|
|
|
|
microcode data is glued to the initrd, therefore it's safe to say Y.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config X86_MSR
|
|
|
|
|
tristate "/dev/cpu/*/msr - Model-specific register support"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This device gives privileged processes access to the x86
|
|
|
|
|
Model-Specific Registers (MSRs). It is a character device with
|
|
|
|
|
major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
|
|
|
|
|
MSR accesses are directed to a specific CPU on multi-processor
|
|
|
|
|
systems.
|
|
|
|
|
|
|
|
|
|
config X86_CPUID
|
|
|
|
|
tristate "/dev/cpu/*/cpuid - CPU information support"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This device gives processes access to the x86 CPUID instruction to
|
|
|
|
|
be executed on a specific processor. It is a character device
|
|
|
|
|
with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
|
|
|
|
|
/dev/cpu/31/cpuid.
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "High Memory Support"
|
|
|
|
|
default HIGHMEM64G if X86_NUMAQ
|
2010-04-21 22:23:44 +08:00
|
|
|
default HIGHMEM4G
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32
|
|
|
|
|
|
|
|
|
|
config NOHIGHMEM
|
|
|
|
|
bool "off"
|
|
|
|
|
depends on !X86_NUMAQ
|
|
|
|
|
---help---
|
|
|
|
|
Linux can use up to 64 Gigabytes of physical memory on x86 systems.
|
|
|
|
|
However, the address space of 32-bit x86 processors is only 4
|
|
|
|
|
Gigabytes large. That means that, if you have a large amount of
|
|
|
|
|
physical memory, not all of it can be "permanently mapped" by the
|
|
|
|
|
kernel. The physical memory that's not permanently mapped is called
|
|
|
|
|
"high memory".
|
|
|
|
|
|
|
|
|
|
If you are compiling a kernel which will never run on a machine with
|
|
|
|
|
more than 1 Gigabyte total physical RAM, answer "off" here (default
|
|
|
|
|
choice and suitable for most users). This will result in a "3GB/1GB"
|
|
|
|
|
split: 3GB are mapped so that each process sees a 3GB virtual memory
|
|
|
|
|
space and the remaining part of the 4GB virtual memory space is used
|
|
|
|
|
by the kernel to permanently map as much physical memory as
|
|
|
|
|
possible.
|
|
|
|
|
|
|
|
|
|
If the machine has between 1 and 4 Gigabytes physical RAM, then
|
|
|
|
|
answer "4GB" here.
|
|
|
|
|
|
|
|
|
|
If more than 4 Gigabytes is used then answer "64GB" here. This
|
|
|
|
|
selection turns Intel PAE (Physical Address Extension) mode on.
|
|
|
|
|
PAE implements 3-level paging on IA32 processors. PAE is fully
|
|
|
|
|
supported by Linux, PAE mode is implemented on all recent Intel
|
|
|
|
|
processors (Pentium Pro and better). NOTE: If you say "64GB" here,
|
|
|
|
|
then the kernel will not boot on CPUs that don't support PAE!
|
|
|
|
|
|
|
|
|
|
The actual amount of total physical memory will either be
|
|
|
|
|
auto detected or can be forced by using a kernel command line option
|
|
|
|
|
such as "mem=256M". (Try "man bootparam" or see the documentation of
|
|
|
|
|
your boot loader (lilo or loadlin) about how to pass options to the
|
|
|
|
|
kernel at boot time.)
|
|
|
|
|
|
|
|
|
|
If unsure, say "off".
|
|
|
|
|
|
|
|
|
|
config HIGHMEM4G
|
|
|
|
|
bool "4GB"
|
|
|
|
|
depends on !X86_NUMAQ
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Select this if you have a 32-bit processor and between 1 and 4
|
|
|
|
|
gigabytes of physical RAM.
|
|
|
|
|
|
|
|
|
|
config HIGHMEM64G
|
|
|
|
|
bool "64GB"
|
2012-11-29 03:50:23 +08:00
|
|
|
depends on !M486
|
2007-11-10 04:56:54 +08:00
|
|
|
select X86_PAE
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Select this if you have a 32-bit processor and more than 4
|
|
|
|
|
gigabytes of physical RAM.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
choice
|
2011-01-21 06:44:16 +08:00
|
|
|
prompt "Memory split" if EXPERT
|
2007-11-10 04:56:54 +08:00
|
|
|
default VMSPLIT_3G
|
|
|
|
|
depends on X86_32
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Select the desired split between kernel and user memory.
|
|
|
|
|
|
|
|
|
|
If the address range available to the kernel is less than the
|
|
|
|
|
physical memory installed, the remaining memory will be available
|
|
|
|
|
as "high memory". Accessing high memory is a little more costly
|
|
|
|
|
than low memory, as it needs to be mapped into the kernel first.
|
|
|
|
|
Note that increasing the kernel address space limits the range
|
|
|
|
|
available to user programs, making the address space there
|
|
|
|
|
tighter. Selecting anything other than the default 3G/1G split
|
|
|
|
|
will also likely make your kernel incompatible with binary-only
|
|
|
|
|
kernel modules.
|
|
|
|
|
|
|
|
|
|
If you are not absolutely sure what you are doing, leave this
|
|
|
|
|
option alone!
|
|
|
|
|
|
|
|
|
|
config VMSPLIT_3G
|
|
|
|
|
bool "3G/1G user/kernel split"
|
|
|
|
|
config VMSPLIT_3G_OPT
|
|
|
|
|
depends on !X86_PAE
|
|
|
|
|
bool "3G/1G user/kernel split (for full 1G low memory)"
|
|
|
|
|
config VMSPLIT_2G
|
|
|
|
|
bool "2G/2G user/kernel split"
|
|
|
|
|
config VMSPLIT_2G_OPT
|
|
|
|
|
depends on !X86_PAE
|
|
|
|
|
bool "2G/2G user/kernel split (for full 2G low memory)"
|
|
|
|
|
config VMSPLIT_1G
|
|
|
|
|
bool "1G/3G user/kernel split"
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config PAGE_OFFSET
|
|
|
|
|
hex
|
|
|
|
|
default 0xB0000000 if VMSPLIT_3G_OPT
|
|
|
|
|
default 0x80000000 if VMSPLIT_2G
|
|
|
|
|
default 0x78000000 if VMSPLIT_2G_OPT
|
|
|
|
|
default 0x40000000 if VMSPLIT_1G
|
|
|
|
|
default 0xC0000000
|
|
|
|
|
depends on X86_32
|
|
|
|
|
|
|
|
|
|
config HIGHMEM
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32 && (HIGHMEM64G || HIGHMEM4G)
|
|
|
|
|
|
|
|
|
|
config X86_PAE
|
2008-10-16 13:01:38 +08:00
|
|
|
bool "PAE (Physical Address Extension) Support"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32 && !HIGHMEM4G
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
PAE is required for NX support, and furthermore enables
|
|
|
|
|
larger swapspace support for non-overcommit purposes. It
|
|
|
|
|
has the cost of more pagetable lookup overhead, and also
|
|
|
|
|
consumes more pagetable space per process.
|
|
|
|
|
|
2008-09-11 16:31:45 +08:00
|
|
|
config ARCH_PHYS_ADDR_T_64BIT
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 || X86_PAE
|
2008-09-11 16:31:45 +08:00
|
|
|
|
2010-10-21 06:55:35 +08:00
|
|
|
config ARCH_DMA_ADDR_T_64BIT
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 || HIGHMEM64G
|
2010-10-21 06:55:35 +08:00
|
|
|
|
2008-10-22 18:33:16 +08:00
|
|
|
config DIRECT_GBPAGES
|
2011-01-21 06:44:16 +08:00
|
|
|
bool "Enable 1GB pages for kernel pagetables" if EXPERT
|
2008-10-22 18:33:16 +08:00
|
|
|
default y
|
|
|
|
|
depends on X86_64
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-10-22 18:33:16 +08:00
|
|
|
Allow the kernel linear mapping to use 1GB pages on CPUs that
|
|
|
|
|
support it. This can improve the kernel's performance a tiny bit by
|
|
|
|
|
reducing TLB pressure. If in doubt, say "Y".
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
# Common NUMA Features
|
|
|
|
|
config NUMA
|
2008-11-05 01:27:19 +08:00
|
|
|
bool "Numa Memory Allocation and Scheduler Support"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on SMP
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI))
|
2008-06-18 06:39:01 +08:00
|
|
|
default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Enable NUMA (Non Uniform Memory Access) support.
|
2008-11-05 01:27:19 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
The kernel will try to allocate memory used by a CPU on the
|
|
|
|
|
local memory controller of the CPU and add some more
|
|
|
|
|
NUMA awareness to the kernel.
|
|
|
|
|
|
2008-11-08 20:29:45 +08:00
|
|
|
For 64-bit this is recommended if the system is Intel Core i7
|
2008-11-05 01:27:19 +08:00
|
|
|
(or later), AMD Opteron, or EM64T NUMA.
|
|
|
|
|
|
|
|
|
|
For 32-bit this is only needed on (rare) 32-bit-only platforms
|
|
|
|
|
that support NUMA topologies, such as NUMAQ / Summit, or if you
|
|
|
|
|
boot a 32-bit kernel on a 64-bit NUMA platform.
|
|
|
|
|
|
|
|
|
|
Otherwise, you should say N.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
|
|
|
|
|
depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
|
|
|
|
|
|
2010-10-29 23:14:30 +08:00
|
|
|
config AMD_NUMA
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Old style AMD Opteron NUMA detection"
|
2011-07-11 16:34:32 +08:00
|
|
|
depends on X86_64 && NUMA && PCI
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2010-10-29 23:14:30 +08:00
|
|
|
Enable AMD NUMA node topology detection. You should say Y here if
|
|
|
|
|
you have a multi processor AMD system. This uses an old method to
|
|
|
|
|
read the NUMA configuration directly from the builtin Northbridge
|
|
|
|
|
of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
|
|
|
|
|
which also takes priority if both are compiled in.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config X86_64_ACPI_NUMA
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "ACPI NUMA detection"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_64 && NUMA && ACPI && PCI
|
|
|
|
|
select ACPI_NUMA
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Enable ACPI SRAT based node topology detection.
|
|
|
|
|
|
2008-03-26 01:14:35 +08:00
|
|
|
# Some NUMA nodes have memory ranges that span
|
|
|
|
|
# other nodes. Even though a pfn is valid and
|
|
|
|
|
# between a node's start and end pfns, it may not
|
|
|
|
|
# reside on that node. See memmap_init_zone()
|
|
|
|
|
# for details.
|
|
|
|
|
config NODES_SPAN_OTHER_NODES
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64_ACPI_NUMA
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config NUMA_EMU
|
|
|
|
|
bool "NUMA emulation"
|
2011-05-02 23:24:48 +08:00
|
|
|
depends on NUMA
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Enable NUMA emulation. A flat machine will be split
|
|
|
|
|
into virtual nodes when booted with "numa=fake=N", where N is the
|
|
|
|
|
number of nodes. This is only useful for debugging.
|
|
|
|
|
|
|
|
|
|
config NODES_SHIFT
|
2008-08-26 05:15:38 +08:00
|
|
|
int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
|
2010-03-26 06:39:27 +08:00
|
|
|
range 1 10
|
|
|
|
|
default "10" if MAXSMP
|
2007-11-10 04:56:54 +08:00
|
|
|
default "6" if X86_64
|
|
|
|
|
default "4" if X86_NUMAQ
|
|
|
|
|
default "3"
|
|
|
|
|
depends on NEED_MULTIPLE_NODES
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-05-13 03:21:12 +08:00
|
|
|
Specify the maximum number of NUMA Nodes available on the target
|
2009-01-26 18:12:25 +08:00
|
|
|
system. Increases memory reserved to accommodate various tables.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config ARCH_HAVE_MEMORY_PRESENT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32 && DISCONTIGMEM
|
|
|
|
|
|
|
|
|
|
config NEED_NODE_MEMMAP_SIZE
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_32 && (DISCONTIGMEM || SPARSEMEM)
|
|
|
|
|
|
|
|
|
|
config ARCH_FLATMEM_ENABLE
|
|
|
|
|
def_bool y
|
2011-04-01 17:15:12 +08:00
|
|
|
depends on X86_32 && !NUMA
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config ARCH_DISCONTIGMEM_ENABLE
|
|
|
|
|
def_bool y
|
2008-01-30 20:30:47 +08:00
|
|
|
depends on NUMA && X86_32
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config ARCH_DISCONTIGMEM_DEFAULT
|
|
|
|
|
def_bool y
|
2008-01-30 20:30:47 +08:00
|
|
|
depends on NUMA && X86_32
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config ARCH_SPARSEMEM_ENABLE
|
|
|
|
|
def_bool y
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD
|
2007-11-10 04:56:54 +08:00
|
|
|
select SPARSEMEM_STATIC if X86_32
|
|
|
|
|
select SPARSEMEM_VMEMMAP_ENABLE if X86_64
|
|
|
|
|
|
2011-04-01 17:15:12 +08:00
|
|
|
config ARCH_SPARSEMEM_DEFAULT
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config ARCH_SELECT_MEMORY_MODEL
|
|
|
|
|
def_bool y
|
2008-01-30 20:30:47 +08:00
|
|
|
depends on ARCH_SPARSEMEM_ENABLE
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config ARCH_MEMORY_PROBE
|
2013-07-20 01:47:48 +08:00
|
|
|
bool "Enable sysfs memory/probe interface"
|
2012-09-10 19:41:45 +08:00
|
|
|
depends on X86_64 && MEMORY_HOTPLUG
|
2013-07-20 01:47:48 +08:00
|
|
|
help
|
|
|
|
|
This option enables a sysfs memory/probe interface for testing.
|
|
|
|
|
See Documentation/memory-hotplug.txt for more information.
|
|
|
|
|
If you are unsure how to answer this question, answer N.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2011-04-01 17:15:12 +08:00
|
|
|
config ARCH_PROC_KCORE_TEXT
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 && PROC_KCORE
|
|
|
|
|
|
2010-01-10 22:28:09 +08:00
|
|
|
config ILLEGAL_POINTER_VALUE
|
|
|
|
|
hex
|
|
|
|
|
default 0 if X86_32
|
|
|
|
|
default 0xdead000000000000 if X86_64
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
source "mm/Kconfig"
|
|
|
|
|
|
|
|
|
|
config HIGHPTE
|
|
|
|
|
bool "Allocate 3rd-level pagetables from highmem"
|
2010-04-21 22:23:44 +08:00
|
|
|
depends on HIGHMEM
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
The VM uses one page table entry for each page of physical memory.
|
|
|
|
|
For systems with a lot of RAM, this can be wasteful of precious
|
|
|
|
|
low memory. Setting this option will put user-space page table
|
|
|
|
|
entries in high memory.
|
|
|
|
|
|
2008-09-07 16:51:34 +08:00
|
|
|
config X86_CHECK_BIOS_CORRUPTION
|
2009-02-05 23:21:53 +08:00
|
|
|
bool "Check for low memory corruption"
|
|
|
|
|
---help---
|
|
|
|
|
Periodically check for memory corruption in low memory, which
|
|
|
|
|
is suspected to be caused by BIOS. Even when enabled in the
|
|
|
|
|
configuration, it is disabled at runtime. Enable it by
|
|
|
|
|
setting "memory_corruption_check=1" on the kernel command
|
|
|
|
|
line. By default it scans the low 64k of memory every 60
|
|
|
|
|
seconds; see the memory_corruption_check_size and
|
|
|
|
|
memory_corruption_check_period parameters in
|
|
|
|
|
Documentation/kernel-parameters.txt to adjust this.
|
|
|
|
|
|
|
|
|
|
When enabled with the default parameters, this option has
|
|
|
|
|
almost no overhead, as it reserves a relatively small amount
|
|
|
|
|
of memory and scans it infrequently. It both detects corruption
|
|
|
|
|
and prevents it from affecting the running system.
|
|
|
|
|
|
|
|
|
|
It is, however, intended as a diagnostic tool; if repeatable
|
|
|
|
|
BIOS-originated corruption always affects the same memory,
|
|
|
|
|
you can use memmap= to prevent the kernel from using that
|
|
|
|
|
memory.
|
2008-09-07 16:51:34 +08:00
|
|
|
|
2008-09-07 17:37:32 +08:00
|
|
|
config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
|
2009-02-05 23:21:53 +08:00
|
|
|
bool "Set the default setting of memory_corruption_check"
|
2008-09-07 17:37:32 +08:00
|
|
|
depends on X86_CHECK_BIOS_CORRUPTION
|
|
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
|
|
|
|
Set whether the default state of memory_corruption_check is
|
|
|
|
|
on or off.
|
2008-09-07 17:37:32 +08:00
|
|
|
|
2010-08-26 07:38:20 +08:00
|
|
|
config X86_RESERVE_LOW
|
2010-08-25 08:32:04 +08:00
|
|
|
int "Amount of low memory, in kilobytes, to reserve for the BIOS"
|
|
|
|
|
default 64
|
|
|
|
|
range 4 640
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2010-08-25 08:32:04 +08:00
|
|
|
Specify the amount of low memory to reserve for the BIOS.
|
|
|
|
|
|
|
|
|
|
The first page contains BIOS data structures that the kernel
|
|
|
|
|
must not use, so that page must always be reserved.
|
|
|
|
|
|
|
|
|
|
By default we reserve the first 64K of physical RAM, as a
|
|
|
|
|
number of BIOSes are known to corrupt that memory range
|
|
|
|
|
during events such as suspend/resume or monitor cable
|
|
|
|
|
insertion, so it must not be used by the kernel.
|
2008-09-16 16:07:34 +08:00
|
|
|
|
2010-08-25 08:32:04 +08:00
|
|
|
You can set this to 4 if you are absolutely sure that you
|
|
|
|
|
trust the BIOS to get all its memory reservations and usages
|
|
|
|
|
right. If you know your BIOS have problems beyond the
|
|
|
|
|
default 64K area, you can set this to 640 to avoid using the
|
|
|
|
|
entire low memory range.
|
2008-09-16 16:07:34 +08:00
|
|
|
|
2010-08-25 08:32:04 +08:00
|
|
|
If you have doubts about the BIOS (e.g. suspend/resume does
|
|
|
|
|
not work or there's kernel crashes after certain hardware
|
|
|
|
|
hotplug events) then you might want to enable
|
|
|
|
|
X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check
|
|
|
|
|
typical corruption patterns.
|
2008-09-16 16:07:34 +08:00
|
|
|
|
2010-08-25 08:32:04 +08:00
|
|
|
Leave this to the default value of 64 if you are unsure.
|
2008-09-16 16:07:34 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config MATH_EMULATION
|
|
|
|
|
bool
|
|
|
|
|
prompt "Math emulation" if X86_32
|
|
|
|
|
---help---
|
|
|
|
|
Linux can emulate a math coprocessor (used for floating point
|
|
|
|
|
operations) if you don't have one. 486DX and Pentium processors have
|
|
|
|
|
a math coprocessor built in, 486SX and 386 do not, unless you added
|
|
|
|
|
a 487DX or 387, respectively. (The messages during boot time can
|
|
|
|
|
give you some hints here ["man dmesg"].) Everyone needs either a
|
|
|
|
|
coprocessor or this emulation.
|
|
|
|
|
|
|
|
|
|
If you don't have a math coprocessor, you need to say Y here; if you
|
|
|
|
|
say Y here even though you have a coprocessor, the coprocessor will
|
|
|
|
|
be used nevertheless. (This behavior can be changed with the kernel
|
|
|
|
|
command line option "no387", which comes handy if your coprocessor
|
|
|
|
|
is broken. Try "man bootparam" or see the documentation of your boot
|
|
|
|
|
loader (lilo or loadlin) about how to pass options to the kernel at
|
|
|
|
|
boot time.) This means that it is a good idea to say Y here if you
|
|
|
|
|
intend to use this kernel on different machines.
|
|
|
|
|
|
|
|
|
|
More information about the internals of the Linux math coprocessor
|
|
|
|
|
emulation can be found in <file:arch/x86/math-emu/README>.
|
|
|
|
|
|
|
|
|
|
If you are not sure, say Y; apart from resulting in a 66 KB bigger
|
|
|
|
|
kernel, it won't hurt.
|
|
|
|
|
|
|
|
|
|
config MTRR
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2011-01-21 06:44:16 +08:00
|
|
|
prompt "MTRR (Memory Type Range Register) support" if EXPERT
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
|
|
|
|
On Intel P6 family processors (Pentium Pro, Pentium II and later)
|
|
|
|
|
the Memory Type Range Registers (MTRRs) may be used to control
|
|
|
|
|
processor access to memory ranges. This is most useful if you have
|
|
|
|
|
a video (VGA) card on a PCI or AGP bus. Enabling write-combining
|
|
|
|
|
allows bus write transfers to be combined into a larger transfer
|
|
|
|
|
before bursting over the PCI/AGP bus. This can increase performance
|
|
|
|
|
of image write operations 2.5 times or more. Saying Y here creates a
|
|
|
|
|
/proc/mtrr file which may be used to manipulate your processor's
|
|
|
|
|
MTRRs. Typically the X server should use this.
|
|
|
|
|
|
|
|
|
|
This code has a reasonably generic interface so that similar
|
|
|
|
|
control registers on other processors can be easily supported
|
|
|
|
|
as well:
|
|
|
|
|
|
|
|
|
|
The Cyrix 6x86, 6x86MX and M II processors have Address Range
|
|
|
|
|
Registers (ARRs) which provide a similar functionality to MTRRs. For
|
|
|
|
|
these, the ARRs are used to emulate the MTRRs.
|
|
|
|
|
The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
|
|
|
|
|
MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
|
|
|
|
|
write-combining. All of these processors are supported by this code
|
|
|
|
|
and it makes sense to say Y here if you have one of them.
|
|
|
|
|
|
|
|
|
|
Saying Y here also fixes a problem with buggy SMP BIOSes which only
|
|
|
|
|
set the MTRRs for the boot CPU and not for the secondary CPUs. This
|
|
|
|
|
can lead to all sorts of problems, so it's good to say Y here.
|
|
|
|
|
|
|
|
|
|
You can safely say Y even if your machine doesn't have MTRRs, you'll
|
|
|
|
|
just add about 9 KB to your kernel.
|
|
|
|
|
|
2008-07-27 08:54:22 +08:00
|
|
|
See <file:Documentation/x86/mtrr.txt> for more information.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2008-04-29 18:52:33 +08:00
|
|
|
config MTRR_SANITIZER
|
x86: change MTRR_SANITIZER to def_bool y
This option has been added in v2.6.26 as a default-disabled
feature and went through several revisions since then.
The feature fixes a wide range of MTRR setup problems that BIOSes
leave us with: slow system, slow Xorg, slow system when adding lots
of RAM, etc., so we want to enable it by default for v2.6.28.
See:
[Bug 10508] Upgrade to 4GB of RAM messes up MTRRs
http://bugzilla.kernel.org/show_bug.cgi?id=10508
and the test results in:
http://lkml.org/lkml/2008/9/29/273
1. hpa
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x13c000000 (5056MB), size= 64MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg04: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg05: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 128M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
range0: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
hole: 000000013c000000 - 0000000140000000
Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC
2. Dylan Taft
reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1
reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg05: base=0xc7e00000 (3198MB), size= 2MB: uncachable, count=1
reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 4M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c8000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
hole: 00000000c7e00000 - 00000000c8000000
Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC
rangeX: 0000000100000000 - 0000000130000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
3. Gabriel
reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
reg05: base=0x128000000 (4736MB), size= 64MB: write-back, count=1
reg06: base=0xcf600000 (3318MB), size= 2MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 7 lose RAM: 0M
range0: 0000000000000000 - 00000000d0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
hole: 00000000cf600000 - 00000000cf800000
Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC
rangeX: 0000000100000000 - 000000012c000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB
Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB
4. Mika Fischer
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 5 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
rangeX: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-10-01 07:29:40 +08:00
|
|
|
def_bool y
|
2008-04-29 18:52:33 +08:00
|
|
|
prompt "MTRR cleanup support"
|
|
|
|
|
depends on MTRR
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-07-15 20:48:48 +08:00
|
|
|
Convert MTRR layout from continuous to discrete, so X drivers can
|
|
|
|
|
add writeback entries.
|
2008-04-29 18:52:33 +08:00
|
|
|
|
2008-07-15 20:48:48 +08:00
|
|
|
Can be disabled with disable_mtrr_cleanup on the kernel command line.
|
2009-01-26 18:12:25 +08:00
|
|
|
The largest mtrr entry size for a continuous block can be set with
|
2008-07-15 20:48:48 +08:00
|
|
|
mtrr_chunk_size.
|
2008-04-29 18:52:33 +08:00
|
|
|
|
x86: change MTRR_SANITIZER to def_bool y
This option has been added in v2.6.26 as a default-disabled
feature and went through several revisions since then.
The feature fixes a wide range of MTRR setup problems that BIOSes
leave us with: slow system, slow Xorg, slow system when adding lots
of RAM, etc., so we want to enable it by default for v2.6.28.
See:
[Bug 10508] Upgrade to 4GB of RAM messes up MTRRs
http://bugzilla.kernel.org/show_bug.cgi?id=10508
and the test results in:
http://lkml.org/lkml/2008/9/29/273
1. hpa
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x13c000000 (5056MB), size= 64MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg04: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg05: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 128M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
range0: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
hole: 000000013c000000 - 0000000140000000
Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC
2. Dylan Taft
reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1
reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg05: base=0xc7e00000 (3198MB), size= 2MB: uncachable, count=1
reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 4M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c8000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
hole: 00000000c7e00000 - 00000000c8000000
Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC
rangeX: 0000000100000000 - 0000000130000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
3. Gabriel
reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
reg05: base=0x128000000 (4736MB), size= 64MB: write-back, count=1
reg06: base=0xcf600000 (3318MB), size= 2MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 7 lose RAM: 0M
range0: 0000000000000000 - 00000000d0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
hole: 00000000cf600000 - 00000000cf800000
Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC
rangeX: 0000000100000000 - 000000012c000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB
Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB
4. Mika Fischer
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 5 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
rangeX: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-10-01 07:29:40 +08:00
|
|
|
If unsure, say Y.
|
2008-04-29 18:52:33 +08:00
|
|
|
|
|
|
|
|
config MTRR_SANITIZER_ENABLE_DEFAULT
|
2008-04-30 11:25:58 +08:00
|
|
|
int "MTRR cleanup enable value (0-1)"
|
|
|
|
|
range 0 1
|
|
|
|
|
default "0"
|
2008-04-29 18:52:33 +08:00
|
|
|
depends on MTRR_SANITIZER
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-04-30 11:25:58 +08:00
|
|
|
Enable mtrr cleanup default value
|
2008-04-29 18:52:33 +08:00
|
|
|
|
2008-05-02 17:40:22 +08:00
|
|
|
config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
|
|
|
|
|
int "MTRR cleanup spare reg num (0-7)"
|
|
|
|
|
range 0 7
|
|
|
|
|
default "1"
|
|
|
|
|
depends on MTRR_SANITIZER
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-05-02 17:40:22 +08:00
|
|
|
mtrr cleanup spare entries default, it can be changed via
|
2008-07-15 20:48:48 +08:00
|
|
|
mtrr_spare_reg_nr=N on the kernel command line.
|
2008-05-02 17:40:22 +08:00
|
|
|
|
2008-03-19 08:00:14 +08:00
|
|
|
config X86_PAT
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2011-01-21 06:44:16 +08:00
|
|
|
prompt "x86 PAT support" if EXPERT
|
2008-04-26 16:26:52 +08:00
|
|
|
depends on MTRR
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-03-19 08:00:14 +08:00
|
|
|
Use PAT attributes to setup page level cache control.
|
2008-03-25 05:22:35 +08:00
|
|
|
|
2008-03-19 08:00:14 +08:00
|
|
|
PATs are the modern equivalents of MTRRs and are much more
|
|
|
|
|
flexible than MTRRs.
|
|
|
|
|
|
|
|
|
|
Say N here if you see bootup problems (boot crash, boot hang,
|
2008-03-25 05:22:35 +08:00
|
|
|
spontaneous reboots) or a non-working video driver.
|
2008-03-19 08:00:14 +08:00
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2009-07-11 00:57:37 +08:00
|
|
|
config ARCH_USES_PG_UNCACHED
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_PAT
|
|
|
|
|
|
x86, random: Architectural inlines to get random integers with RDRAND
Architectural inlines to get random ints and longs using the RDRAND
instruction.
Intel has introduced a new RDRAND instruction, a Digital Random Number
Generator (DRNG), which is functionally an high bandwidth entropy
source, cryptographic whitener, and integrity monitor all built into
hardware. This enables RDRAND to be used directly, bypassing the
kernel random number pool.
For technical documentation, see:
http://software.intel.com/en-us/articles/download-the-latest-bull-mountain-software-implementation-guide/
In this patch, this is *only* used for the nonblocking random number
pool. RDRAND is a nonblocking source, similar to our /dev/urandom,
and is therefore not a direct replacement for /dev/random. The
architectural hooks presented in the previous patch only feed the
kernel internal users, which only use the nonblocking pool, and so
this is not a problem.
Since this instruction is available in userspace, there is no reason
to have a /dev/hw_rng device driver for the purpose of feeding rngd.
This is especially so since RDRAND is a nonblocking source, and needs
additional whitening and reduction (see the above technical
documentation for details) in order to be of "pure entropy source"
quality.
The CONFIG_EXPERT compile-time option can be used to disable this use
of RDRAND.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Originally-by: Fenghua Yu <fenghua.yu@intel.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "Theodore Ts'o" <tytso@mit.edu>
2011-08-01 04:59:29 +08:00
|
|
|
config ARCH_RANDOM
|
|
|
|
|
def_bool y
|
|
|
|
|
prompt "x86 architectural random number generator" if EXPERT
|
|
|
|
|
---help---
|
|
|
|
|
Enable the x86 architectural RDRAND instruction
|
|
|
|
|
(Intel Bull Mountain technology) to generate random numbers.
|
|
|
|
|
If supported, this is a high bandwidth, cryptographically
|
|
|
|
|
secure hardware random number generator.
|
|
|
|
|
|
2012-09-22 03:43:10 +08:00
|
|
|
config X86_SMAP
|
|
|
|
|
def_bool y
|
|
|
|
|
prompt "Supervisor Mode Access Prevention" if EXPERT
|
|
|
|
|
---help---
|
|
|
|
|
Supervisor Mode Access Prevention (SMAP) is a security
|
|
|
|
|
feature in newer Intel processors. There is a small
|
|
|
|
|
performance cost if this enabled and turned on; there is
|
|
|
|
|
also a small increase in the kernel size if this is enabled.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config EFI
|
2008-10-16 13:01:38 +08:00
|
|
|
bool "EFI runtime service support"
|
2008-01-30 20:31:19 +08:00
|
|
|
depends on ACPI
|
2013-04-16 22:31:08 +08:00
|
|
|
select UCS2_STRING
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
2009-02-05 23:21:53 +08:00
|
|
|
This enables the kernel to use EFI runtime services that are
|
|
|
|
|
available (such as the EFI variable services).
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2009-02-05 23:21:53 +08:00
|
|
|
This option is only useful on systems that have EFI firmware.
|
|
|
|
|
In addition, you should use the latest ELILO loader available
|
|
|
|
|
at <http://elilo.sourceforge.net> in order to take advantage
|
|
|
|
|
of EFI runtime services. However, even with this option, the
|
|
|
|
|
resultant kernel should continue to boot on existing non-EFI
|
|
|
|
|
platforms.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
x86, efi: EFI boot stub support
There is currently a large divide between kernel development and the
development of EFI boot loaders. The idea behind this patch is to give
the kernel developers full control over the EFI boot process. As
H. Peter Anvin put it,
"The 'kernel carries its own stub' approach been very successful in
dealing with BIOS, and would make a lot of sense to me for EFI as
well."
This patch introduces an EFI boot stub that allows an x86 bzImage to
be loaded and executed by EFI firmware. The bzImage appears to the
firmware as an EFI application. Luckily there are enough free bits
within the bzImage header so that it can masquerade as an EFI
application, thereby coercing the EFI firmware into loading it and
jumping to its entry point. The beauty of this masquerading approach
is that both BIOS and EFI boot loaders can still load and run the same
bzImage, thereby allowing a single kernel image to work in any boot
environment.
The EFI boot stub supports multiple initrds, but they must exist on
the same partition as the bzImage. Command-line arguments for the
kernel can be appended after the bzImage name when run from the EFI
shell, e.g.
Shell> bzImage console=ttyS0 root=/dev/sdb initrd=initrd.img
v7:
- Fix checkpatch warnings.
v6:
- Try to allocate initrd memory just below hdr->inird_addr_max.
v5:
- load_options_size is UTF-16, which needs dividing by 2 to convert
to the corresponding ASCII size.
v4:
- Don't read more than image->load_options_size
v3:
- Fix following warnings when compiling CONFIG_EFI_STUB=n
arch/x86/boot/tools/build.c: In function ‘main’:
arch/x86/boot/tools/build.c:138:24: warning: unused variable ‘pe_header’
arch/x86/boot/tools/build.c:138:15: warning: unused variable ‘file_sz’
- As reported by Matthew Garrett, some Apple machines have GOPs that
don't have hardware attached. We need to weed these out by
searching for ones that handle the PCIIO protocol.
- Don't allocate memory if no initrds are on cmdline
- Don't trust image->load_options_size
Maarten Lankhorst noted:
- Don't strip first argument when booted from efibootmgr
- Don't allocate too much memory for cmdline
- Don't update cmdline_size, the kernel considers it read-only
- Don't accept '\n' for initrd names
v2:
- File alignment was too large, was 8192 should be 512. Reported by
Maarten Lankhorst on LKML.
- Added UGA support for graphics
- Use VIDEO_TYPE_EFI instead of hard-coded number.
- Move linelength assignment until after we've assigned depth
- Dynamically fill out AddressOfEntryPoint in tools/build.c
- Don't use magic number for GDT/TSS stuff. Requested by Andi Kleen
- The bzImage may need to be relocated as it may have been loaded at
a high address address by the firmware. This was required to get my
macbook booting because the firmware loaded it at 0x7cxxxxxx, which
triggers this error in decompress_kernel(),
if (heap > ((-__PAGE_OFFSET-(128<<20)-1) & 0x7fffffff))
error("Destination address too large");
Cc: Mike Waychison <mikew@google.com>
Cc: Matthew Garrett <mjg@redhat.com>
Tested-by: Henrik Rydberg <rydberg@euromail.se>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Link: http://lkml.kernel.org/r/1321383097.2657.9.camel@mfleming-mobl1.ger.corp.intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-12-13 05:27:52 +08:00
|
|
|
config EFI_STUB
|
|
|
|
|
bool "EFI stub support"
|
|
|
|
|
depends on EFI
|
|
|
|
|
---help---
|
|
|
|
|
This kernel feature allows a bzImage to be loaded directly
|
|
|
|
|
by EFI firmware without the use of a bootloader.
|
|
|
|
|
|
2013-09-23 06:45:25 +08:00
|
|
|
See Documentation/efi-stub.txt for more information.
|
2012-03-16 20:03:13 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config SECCOMP
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Enable seccomp to safely compute untrusted bytecode"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This kernel feature is useful for number crunching applications
|
|
|
|
|
that may need to compute untrusted bytecode during their
|
|
|
|
|
execution. By using pipes or other transports made available to
|
|
|
|
|
the process as file descriptors supporting the read/write
|
|
|
|
|
syscalls, it's possible to isolate those applications in
|
|
|
|
|
their own address space using seccomp. Once seccomp is
|
2008-09-09 15:01:31 +08:00
|
|
|
enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
|
2007-11-10 04:56:54 +08:00
|
|
|
and the task is only allowed to execute a few safe syscalls
|
|
|
|
|
defined by each seccomp mode.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y. Only embedded should say N here.
|
|
|
|
|
|
|
|
|
|
config CC_STACKPROTECTOR
|
2012-07-06 22:08:25 +08:00
|
|
|
bool "Enable -fstack-protector buffer overflow detection"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
|
|
|
|
This option turns on the -fstack-protector GCC feature. This
|
2008-02-14 17:36:03 +08:00
|
|
|
feature puts, at the beginning of functions, a canary value on
|
|
|
|
|
the stack just before the return address, and validates
|
2007-11-10 04:56:54 +08:00
|
|
|
the value just before actually returning. Stack based buffer
|
|
|
|
|
overflows (that need to overwrite this return address) now also
|
|
|
|
|
overwrite the canary, which gets detected and the attack is then
|
|
|
|
|
neutralized via a kernel panic.
|
|
|
|
|
|
|
|
|
|
This feature requires gcc version 4.2 or above, or a distribution
|
|
|
|
|
gcc with the feature backported. Older versions are automatically
|
2008-02-14 17:36:03 +08:00
|
|
|
detected and for those versions, this configuration option is
|
|
|
|
|
ignored. (and a warning is printed during bootup)
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
source kernel/Kconfig.hz
|
|
|
|
|
|
|
|
|
|
config KEXEC
|
|
|
|
|
bool "kexec system call"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
kexec is a system call that implements the ability to shutdown your
|
|
|
|
|
current kernel, and to start another kernel. It is like a reboot
|
|
|
|
|
but it is independent of the system firmware. And like a reboot
|
|
|
|
|
you can start any kernel with it, not just Linux.
|
|
|
|
|
|
|
|
|
|
The name comes from the similarity to the exec system call.
|
|
|
|
|
|
|
|
|
|
It is an ongoing process to be certain the hardware in a machine
|
|
|
|
|
is properly shutdown, so do not be surprised if this code does not
|
2013-08-21 03:38:03 +08:00
|
|
|
initially work for you. As of this writing the exact hardware
|
|
|
|
|
interface is strongly in flux, so no good recommendation can be
|
|
|
|
|
made.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
config CRASH_DUMP
|
2008-08-14 23:16:50 +08:00
|
|
|
bool "kernel crash dumps"
|
2007-11-10 04:56:54 +08:00
|
|
|
depends on X86_64 || (X86_32 && HIGHMEM)
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
Generate crash dump after being started by kexec.
|
|
|
|
|
This should be normally only set in special crash dump kernels
|
|
|
|
|
which are loaded in the main kernel with kexec-tools into
|
|
|
|
|
a specially reserved region and then later executed after
|
|
|
|
|
a crash by kdump/kexec. The crash dump kernel must be compiled
|
|
|
|
|
to a memory address not used by the main kernel or BIOS using
|
|
|
|
|
PHYSICAL_START, or it must be built as a relocatable image
|
|
|
|
|
(CONFIG_RELOCATABLE=y).
|
|
|
|
|
For more details see Documentation/kdump/kdump.txt
|
|
|
|
|
|
2008-07-26 10:45:07 +08:00
|
|
|
config KEXEC_JUMP
|
2012-10-03 02:16:47 +08:00
|
|
|
bool "kexec jump"
|
2009-03-10 10:57:16 +08:00
|
|
|
depends on KEXEC && HIBERNATION
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
kexec jump: save/restore device state
This patch implements devices state save/restore before after kexec.
This patch together with features in kexec_jump patch can be used for
following:
- A simple hibernation implementation without ACPI support. You can kexec a
hibernating kernel, save the memory image of original system and shutdown
the system. When resuming, you restore the memory image of original system
via ordinary kexec load then jump back.
- Kernel/system debug through making system snapshot. You can make system
snapshot, jump back, do some thing and make another system snapshot.
- Cooperative multi-kernel/system. With kexec jump, you can switch between
several kernels/systems quickly without boot process except the first time.
This appears like swap a whole kernel/system out/in.
- A general method to call program in physical mode (paging turning
off). This can be used to invoke BIOS code under Linux.
The following user-space tools can be used with kexec jump:
- kexec-tools needs to be patched to support kexec jump. The patches
and the precompiled kexec can be download from the following URL:
source: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-src_git_kh10.tar.bz2
patches: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-patches_git_kh10.tar.bz2
binary: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec_git_kh10
- makedumpfile with patches are used as memory image saving tool, it
can exclude free pages from original kernel memory image file. The
patches and the precompiled makedumpfile can be download from the
following URL:
source: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-src_cvs_kh10.tar.bz2
patches: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-patches_cvs_kh10.tar.bz2
binary: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile_cvs_kh10
- An initramfs image can be used as the root file system of kexeced
kernel. An initramfs image built with "BuildRoot" can be downloaded
from the following URL:
initramfs image: http://khibernation.sourceforge.net/download/release_v10/initramfs/rootfs_cvs_kh10.gz
All user space tools above are included in the initramfs image.
Usage example of simple hibernation:
1. Compile and install patched kernel with following options selected:
CONFIG_X86_32=y
CONFIG_RELOCATABLE=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_PM=y
CONFIG_HIBERNATION=y
CONFIG_KEXEC_JUMP=y
2. Build an initramfs image contains kexec-tool and makedumpfile, or
download the pre-built initramfs image, called rootfs.gz in
following text.
3. Prepare a partition to save memory image of original kernel, called
hibernating partition in following text.
4. Boot kernel compiled in step 1 (kernel A).
5. In the kernel A, load kernel compiled in step 1 (kernel B) with
/sbin/kexec. The shell command line can be as follow:
/sbin/kexec --load-preserve-context /boot/bzImage --mem-min=0x100000
--mem-max=0xffffff --initrd=rootfs.gz
6. Boot the kernel B with following shell command line:
/sbin/kexec -e
7. The kernel B will boot as normal kexec. In kernel B the memory
image of kernel A can be saved into hibernating partition as
follow:
jump_back_entry=`cat /proc/cmdline | tr ' ' '\n' | grep kexec_jump_back_entry | cut -d '='`
echo $jump_back_entry > kexec_jump_back_entry
cp /proc/vmcore dump.elf
Then you can shutdown the machine as normal.
8. Boot kernel compiled in step 1 (kernel C). Use the rootfs.gz as
root file system.
9. In kernel C, load the memory image of kernel A as follow:
/sbin/kexec -l --args-none --entry=`cat kexec_jump_back_entry` dump.elf
10. Jump back to the kernel A as follow:
/sbin/kexec -e
Then, kernel A is resumed.
Implementation point:
To support jumping between two kernels, before jumping to (executing)
the new kernel and jumping back to the original kernel, the devices
are put into quiescent state, and the state of devices and CPU is
saved. After jumping back from kexeced kernel and jumping to the new
kernel, the state of devices and CPU are restored accordingly. The
devices/CPU state save/restore code of software suspend is called to
implement corresponding function.
Known issues:
- Because the segment number supported by sys_kexec_load is limited,
hibernation image with many segments may not be load. This is
planned to be eliminated by adding a new flag to sys_kexec_load to
make a image can be loaded with multiple sys_kexec_load invoking.
Now, only the i386 architecture is supported.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Nigel Cunningham <nigel@nigel.suspend2.net>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-26 10:45:10 +08:00
|
|
|
Jump between original kernel and kexeced kernel and invoke
|
|
|
|
|
code in physical address mode via KEXEC
|
2008-07-26 10:45:07 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config PHYSICAL_START
|
2011-01-21 06:44:16 +08:00
|
|
|
hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
|
2009-05-12 07:12:16 +08:00
|
|
|
default "0x1000000"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This gives the physical address where the kernel is loaded.
|
|
|
|
|
|
|
|
|
|
If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
|
|
|
|
|
bzImage will decompress itself to above physical address and
|
|
|
|
|
run from there. Otherwise, bzImage will run from the address where
|
|
|
|
|
it has been loaded by the boot loader and will ignore above physical
|
|
|
|
|
address.
|
|
|
|
|
|
|
|
|
|
In normal kdump cases one does not have to set/change this option
|
|
|
|
|
as now bzImage can be compiled as a completely relocatable image
|
|
|
|
|
(CONFIG_RELOCATABLE=y) and be used to load and run from a different
|
|
|
|
|
address. This option is mainly useful for the folks who don't want
|
|
|
|
|
to use a bzImage for capturing the crash dump and want to use a
|
|
|
|
|
vmlinux instead. vmlinux is not relocatable hence a kernel needs
|
|
|
|
|
to be specifically compiled to run from a specific memory area
|
|
|
|
|
(normally a reserved region) and this option comes handy.
|
|
|
|
|
|
2009-05-12 07:12:16 +08:00
|
|
|
So if you are using bzImage for capturing the crash dump,
|
|
|
|
|
leave the value here unchanged to 0x1000000 and set
|
|
|
|
|
CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux
|
|
|
|
|
for capturing the crash dump change this value to start of
|
|
|
|
|
the reserved region. In other words, it can be set based on
|
|
|
|
|
the "X" value as specified in the "crashkernel=YM@XM"
|
|
|
|
|
command line boot parameter passed to the panic-ed
|
|
|
|
|
kernel. Please take a look at Documentation/kdump/kdump.txt
|
|
|
|
|
for more details about crash dumps.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
|
|
|
|
Usage of bzImage for capturing the crash dump is recommended as
|
|
|
|
|
one does not have to build two kernels. Same kernel can be used
|
|
|
|
|
as production kernel and capture kernel. Above option should have
|
|
|
|
|
gone away after relocatable bzImage support is introduced. But it
|
|
|
|
|
is present because there are users out there who continue to use
|
|
|
|
|
vmlinux for dump capture. This option should go away down the
|
|
|
|
|
line.
|
|
|
|
|
|
|
|
|
|
Don't change this unless you know what you are doing.
|
|
|
|
|
|
|
|
|
|
config RELOCATABLE
|
2009-05-08 05:19:34 +08:00
|
|
|
bool "Build a relocatable kernel"
|
|
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This builds a kernel image that retains relocation information
|
|
|
|
|
so it can be loaded someplace besides the default 1MB.
|
|
|
|
|
The relocations tend to make the kernel binary about 10% larger,
|
|
|
|
|
but are discarded at runtime.
|
|
|
|
|
|
|
|
|
|
One use is for the kexec on panic case where the recovery kernel
|
|
|
|
|
must live at a different physical address than the primary
|
|
|
|
|
kernel.
|
|
|
|
|
|
|
|
|
|
Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
|
|
|
|
|
it has been loaded at and the compile time physical address
|
|
|
|
|
(CONFIG_PHYSICAL_START) is ignored.
|
|
|
|
|
|
2009-05-06 12:20:51 +08:00
|
|
|
# Relocation on x86-32 needs some additional build support
|
|
|
|
|
config X86_NEED_RELOCS
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_32 && RELOCATABLE
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config PHYSICAL_ALIGN
|
2013-07-09 00:15:17 +08:00
|
|
|
hex "Alignment value to which kernel should be aligned"
|
2009-05-12 07:12:16 +08:00
|
|
|
default "0x1000000"
|
2013-07-09 00:15:17 +08:00
|
|
|
range 0x2000 0x1000000 if X86_32
|
|
|
|
|
range 0x200000 0x1000000 if X86_64
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-10 04:56:54 +08:00
|
|
|
This value puts the alignment restrictions on physical address
|
|
|
|
|
where kernel is loaded and run from. Kernel is compiled for an
|
|
|
|
|
address which meets above alignment restriction.
|
|
|
|
|
|
|
|
|
|
If bootloader loads the kernel at a non-aligned address and
|
|
|
|
|
CONFIG_RELOCATABLE is set, kernel will move itself to nearest
|
|
|
|
|
address aligned to above value and run from there.
|
|
|
|
|
|
|
|
|
|
If bootloader loads the kernel at a non-aligned address and
|
|
|
|
|
CONFIG_RELOCATABLE is not set, kernel will ignore the run time
|
|
|
|
|
load address and decompress itself to the address it has been
|
|
|
|
|
compiled for and run from there. The address for which kernel is
|
|
|
|
|
compiled already meets above alignment restrictions. Hence the
|
|
|
|
|
end result is that kernel runs from a physical address meeting
|
|
|
|
|
above alignment restrictions.
|
|
|
|
|
|
2013-07-09 00:15:17 +08:00
|
|
|
On 32-bit this value must be a multiple of 0x2000. On 64-bit
|
|
|
|
|
this value must be a multiple of 0x200000.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
Don't change this unless you know what you are doing.
|
|
|
|
|
|
|
|
|
|
config HOTPLUG_CPU
|
2008-08-11 23:46:46 +08:00
|
|
|
bool "Support for hot-pluggable CPUs"
|
2013-05-21 11:49:35 +08:00
|
|
|
depends on SMP
|
2007-11-10 04:56:54 +08:00
|
|
|
---help---
|
2008-08-11 23:46:46 +08:00
|
|
|
Say Y here to allow turning CPUs off and on. CPUs can be
|
|
|
|
|
controlled through /sys/devices/system/cpu.
|
|
|
|
|
( Note: power management support will enable this option
|
|
|
|
|
automatically on SMP systems. )
|
|
|
|
|
Say N if you want to disable CPU hotplug.
|
2007-11-10 04:56:54 +08:00
|
|
|
|
2012-11-14 03:32:39 +08:00
|
|
|
config BOOTPARAM_HOTPLUG_CPU0
|
|
|
|
|
bool "Set default setting of cpu0_hotpluggable"
|
|
|
|
|
default n
|
2013-01-23 05:01:19 +08:00
|
|
|
depends on HOTPLUG_CPU
|
2012-11-14 03:32:39 +08:00
|
|
|
---help---
|
|
|
|
|
Set whether default state of cpu0_hotpluggable is on or off.
|
|
|
|
|
|
|
|
|
|
Say Y here to enable CPU0 hotplug by default. If this switch
|
|
|
|
|
is turned on, there is no need to give cpu0_hotplug kernel
|
|
|
|
|
parameter and the CPU0 hotplug feature is enabled by default.
|
|
|
|
|
|
|
|
|
|
Please note: there are two known CPU0 dependencies if you want
|
|
|
|
|
to enable the CPU0 hotplug feature either by this switch or by
|
|
|
|
|
cpu0_hotplug kernel parameter.
|
|
|
|
|
|
|
|
|
|
First, resume from hibernate or suspend always starts from CPU0.
|
|
|
|
|
So hibernate and suspend are prevented if CPU0 is offline.
|
|
|
|
|
|
|
|
|
|
Second dependency is PIC interrupts always go to CPU0. CPU0 can not
|
|
|
|
|
offline if any interrupt can not migrate out of CPU0. There may
|
|
|
|
|
be other CPU0 dependencies.
|
|
|
|
|
|
|
|
|
|
Please make sure the dependencies are under your control before
|
|
|
|
|
you enable this feature.
|
|
|
|
|
|
|
|
|
|
Say N if you don't want to enable CPU0 hotplug feature by default.
|
|
|
|
|
You still can enable the CPU0 hotplug feature at boot by kernel
|
|
|
|
|
parameter cpu0_hotplug.
|
|
|
|
|
|
2012-11-14 03:32:51 +08:00
|
|
|
config DEBUG_HOTPLUG_CPU0
|
|
|
|
|
def_bool n
|
|
|
|
|
prompt "Debug CPU0 hotplug"
|
2013-01-23 05:01:19 +08:00
|
|
|
depends on HOTPLUG_CPU
|
2012-11-14 03:32:51 +08:00
|
|
|
---help---
|
|
|
|
|
Enabling this option offlines CPU0 (if CPU0 can be offlined) as
|
|
|
|
|
soon as possible and boots up userspace with CPU0 offlined. User
|
|
|
|
|
can online CPU0 back after boot time.
|
|
|
|
|
|
|
|
|
|
To debug CPU0 hotplug, you need to enable CPU0 offline/online
|
|
|
|
|
feature by either turning on CONFIG_BOOTPARAM_HOTPLUG_CPU0 during
|
|
|
|
|
compilation or giving cpu0_hotplug kernel parameter at boot.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
config COMPAT_VDSO
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
|
|
|
|
prompt "Compat VDSO support"
|
2008-01-30 20:30:43 +08:00
|
|
|
depends on X86_32 || IA32_EMULATION
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-01-30 20:30:43 +08:00
|
|
|
Map the 32-bit VDSO to the predictable old-style address too.
|
2009-11-11 07:46:52 +08:00
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
Say N here if you are running a sufficiently recent glibc
|
|
|
|
|
version (2.3.3 or later), to remove the high-mapped
|
|
|
|
|
VDSO mapping and to exclusively use the randomized VDSO.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2008-08-13 03:52:36 +08:00
|
|
|
config CMDLINE_BOOL
|
|
|
|
|
bool "Built-in kernel command line"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-08-13 03:52:36 +08:00
|
|
|
Allow for specifying boot arguments to the kernel at
|
|
|
|
|
build time. On some systems (e.g. embedded ones), it is
|
|
|
|
|
necessary or convenient to provide some or all of the
|
|
|
|
|
kernel boot arguments with the kernel itself (that is,
|
|
|
|
|
to not rely on the boot loader to provide them.)
|
|
|
|
|
|
|
|
|
|
To compile command line arguments into the kernel,
|
|
|
|
|
set this option to 'Y', then fill in the
|
|
|
|
|
the boot arguments in CONFIG_CMDLINE.
|
|
|
|
|
|
|
|
|
|
Systems with fully functional boot loaders (i.e. non-embedded)
|
|
|
|
|
should leave this option set to 'N'.
|
|
|
|
|
|
|
|
|
|
config CMDLINE
|
|
|
|
|
string "Built-in kernel command string"
|
|
|
|
|
depends on CMDLINE_BOOL
|
|
|
|
|
default ""
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-08-13 03:52:36 +08:00
|
|
|
Enter arguments here that should be compiled into the kernel
|
|
|
|
|
image and used at boot time. If the boot loader provides a
|
|
|
|
|
command line at boot time, it is appended to this string to
|
|
|
|
|
form the full kernel command line, when the system boots.
|
|
|
|
|
|
|
|
|
|
However, you can use the CONFIG_CMDLINE_OVERRIDE option to
|
|
|
|
|
change this behavior.
|
|
|
|
|
|
|
|
|
|
In most cases, the command line (whether built-in or provided
|
|
|
|
|
by the boot loader) should specify the device for the root
|
|
|
|
|
file system.
|
|
|
|
|
|
|
|
|
|
config CMDLINE_OVERRIDE
|
|
|
|
|
bool "Built-in command line overrides boot loader arguments"
|
|
|
|
|
depends on CMDLINE_BOOL
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-08-13 03:52:36 +08:00
|
|
|
Set this option to 'Y' to have the kernel ignore the boot loader
|
|
|
|
|
command line, and use ONLY the built-in command line.
|
|
|
|
|
|
|
|
|
|
This is used to work around broken boot loaders. This should
|
|
|
|
|
be set to 'N' under normal conditions.
|
|
|
|
|
|
2007-11-10 04:56:54 +08:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
config ARCH_ENABLE_MEMORY_HOTPLUG
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 || (X86_32 && HIGHMEM)
|
|
|
|
|
|
2008-11-01 01:52:03 +08:00
|
|
|
config ARCH_ENABLE_MEMORY_HOTREMOVE
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on MEMORY_HOTPLUG
|
|
|
|
|
|
2010-05-27 05:44:58 +08:00
|
|
|
config USE_PERCPU_NUMA_NODE_ID
|
2011-01-23 21:37:40 +08:00
|
|
|
def_bool y
|
2010-05-27 05:44:58 +08:00
|
|
|
depends on NUMA
|
|
|
|
|
|
2013-11-15 06:31:10 +08:00
|
|
|
config ARCH_ENABLE_SPLIT_PMD_PTLOCK
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_64 || X86_PAE
|
|
|
|
|
|
2008-11-06 03:37:27 +08:00
|
|
|
menu "Power management and ACPI options"
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
config ARCH_HIBERNATION_HEADER
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 03:41:05 +08:00
|
|
|
depends on X86_64 && HIBERNATION
|
|
|
|
|
|
|
|
|
|
source "kernel/power/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "drivers/acpi/Kconfig"
|
|
|
|
|
|
2009-08-15 03:23:29 +08:00
|
|
|
source "drivers/sfi/Kconfig"
|
|
|
|
|
|
2008-01-30 20:32:49 +08:00
|
|
|
config X86_APM_BOOT
|
2010-04-21 22:23:44 +08:00
|
|
|
def_bool y
|
2011-11-17 18:41:31 +08:00
|
|
|
depends on APM
|
2008-01-30 20:32:49 +08:00
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
menuconfig APM
|
|
|
|
|
tristate "APM (Advanced Power Management) BIOS support"
|
2008-07-10 22:09:50 +08:00
|
|
|
depends on X86_32 && PM_SLEEP
|
2007-11-07 03:41:05 +08:00
|
|
|
---help---
|
|
|
|
|
APM is a BIOS specification for saving power using several different
|
|
|
|
|
techniques. This is mostly useful for battery powered laptops with
|
|
|
|
|
APM compliant BIOSes. If you say Y here, the system time will be
|
|
|
|
|
reset after a RESUME operation, the /proc/apm device will provide
|
|
|
|
|
battery status information, and user-space programs will receive
|
|
|
|
|
notification of APM "events" (e.g. battery status change).
|
|
|
|
|
|
|
|
|
|
If you select "Y" here, you can disable actual use of the APM
|
|
|
|
|
BIOS by passing the "apm=off" option to the kernel at boot time.
|
|
|
|
|
|
|
|
|
|
Note that the APM support is almost completely disabled for
|
|
|
|
|
machines with more than one CPU.
|
|
|
|
|
|
|
|
|
|
In order to use APM, you will need supporting software. For location
|
2011-07-09 05:11:16 +08:00
|
|
|
and more information, read <file:Documentation/power/apm-acpi.txt>
|
|
|
|
|
and the Battery Powered Linux mini-HOWTO, available from
|
2007-11-07 03:41:05 +08:00
|
|
|
<http://www.tldp.org/docs.html#howto>.
|
|
|
|
|
|
|
|
|
|
This driver does not spin down disk drives (see the hdparm(8)
|
|
|
|
|
manpage ("man 8 hdparm") for that), and it doesn't turn off
|
|
|
|
|
VESA-compliant "green" monitors.
|
|
|
|
|
|
|
|
|
|
This driver does not support the TI 4000M TravelMate and the ACER
|
|
|
|
|
486/DX4/75 because they don't have compliant BIOSes. Many "green"
|
|
|
|
|
desktop machines also don't have compliant BIOSes, and this driver
|
|
|
|
|
may cause those machines to panic during the boot phase.
|
|
|
|
|
|
|
|
|
|
Generally, if you don't have a battery in your machine, there isn't
|
|
|
|
|
much point in using this driver and you should say N. If you get
|
|
|
|
|
random kernel OOPSes or reboots that don't seem to be related to
|
|
|
|
|
anything, try disabling/enabling this option (or disabling/enabling
|
|
|
|
|
APM in your BIOS).
|
|
|
|
|
|
|
|
|
|
Some other things you should try when experiencing seemingly random,
|
|
|
|
|
"weird" problems:
|
|
|
|
|
|
|
|
|
|
1) make sure that you have enough swap space and that it is
|
|
|
|
|
enabled.
|
|
|
|
|
2) pass the "no-hlt" option to the kernel
|
|
|
|
|
3) switch on floating point emulation in the kernel and pass
|
|
|
|
|
the "no387" option to the kernel
|
|
|
|
|
4) pass the "floppy=nodma" option to the kernel
|
|
|
|
|
5) pass the "mem=4M" option to the kernel (thereby disabling
|
|
|
|
|
all but the first 4 MB of RAM)
|
|
|
|
|
6) make sure that the CPU is not over clocked.
|
|
|
|
|
7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
|
|
|
|
|
8) disable the cache from your BIOS settings
|
|
|
|
|
9) install a fan for the video card or exchange video RAM
|
|
|
|
|
10) install a better fan for the CPU
|
|
|
|
|
11) exchange RAM chips
|
|
|
|
|
12) exchange the motherboard.
|
|
|
|
|
|
|
|
|
|
To compile this driver as a module, choose M here: the
|
|
|
|
|
module will be called apm.
|
|
|
|
|
|
|
|
|
|
if APM
|
|
|
|
|
|
|
|
|
|
config APM_IGNORE_USER_SUSPEND
|
|
|
|
|
bool "Ignore USER SUSPEND"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
This option will ignore USER SUSPEND requests. On machines with a
|
|
|
|
|
compliant APM BIOS, you want to say N. However, on the NEC Versa M
|
|
|
|
|
series notebooks, it is necessary to say Y because of a BIOS bug.
|
|
|
|
|
|
|
|
|
|
config APM_DO_ENABLE
|
|
|
|
|
bool "Enable PM at boot time"
|
|
|
|
|
---help---
|
|
|
|
|
Enable APM features at boot time. From page 36 of the APM BIOS
|
|
|
|
|
specification: "When disabled, the APM BIOS does not automatically
|
|
|
|
|
power manage devices, enter the Standby State, enter the Suspend
|
|
|
|
|
State, or take power saving steps in response to CPU Idle calls."
|
|
|
|
|
This driver will make CPU Idle calls when Linux is idle (unless this
|
|
|
|
|
feature is turned off -- see "Do CPU IDLE calls", below). This
|
|
|
|
|
should always save battery power, but more complicated APM features
|
|
|
|
|
will be dependent on your BIOS implementation. You may need to turn
|
|
|
|
|
this option off if your computer hangs at boot time when using APM
|
|
|
|
|
support, or if it beeps continuously instead of suspending. Turn
|
|
|
|
|
this off if you have a NEC UltraLite Versa 33/C or a Toshiba
|
|
|
|
|
T400CDT. This is off by default since most machines do fine without
|
|
|
|
|
this feature.
|
|
|
|
|
|
|
|
|
|
config APM_CPU_IDLE
|
2013-02-10 10:10:04 +08:00
|
|
|
depends on CPU_IDLE
|
2007-11-07 03:41:05 +08:00
|
|
|
bool "Make CPU Idle calls when idle"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
|
|
|
|
|
On some machines, this can activate improved power savings, such as
|
|
|
|
|
a slowed CPU clock rate, when the machine is idle. These idle calls
|
|
|
|
|
are made after the idle loop has run for some length of time (e.g.,
|
|
|
|
|
333 mS). On some machines, this will cause a hang at boot time or
|
|
|
|
|
whenever the CPU becomes idle. (On machines with more than one CPU,
|
|
|
|
|
this option does nothing.)
|
|
|
|
|
|
|
|
|
|
config APM_DISPLAY_BLANK
|
|
|
|
|
bool "Enable console blanking using APM"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
Enable console blanking using the APM. Some laptops can use this to
|
|
|
|
|
turn off the LCD backlight when the screen blanker of the Linux
|
|
|
|
|
virtual console blanks the screen. Note that this is only used by
|
|
|
|
|
the virtual console screen blanker, and won't turn off the backlight
|
|
|
|
|
when using the X Window system. This also doesn't have anything to
|
|
|
|
|
do with your VESA-compliant power-saving monitor. Further, this
|
|
|
|
|
option doesn't work for all laptops -- it might not turn off your
|
|
|
|
|
backlight at all, or it might print a lot of errors to the console,
|
|
|
|
|
especially if you are using gpm.
|
|
|
|
|
|
|
|
|
|
config APM_ALLOW_INTS
|
|
|
|
|
bool "Allow interrupts during APM BIOS calls"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
Normally we disable external interrupts while we are making calls to
|
|
|
|
|
the APM BIOS as a measure to lessen the effects of a badly behaving
|
|
|
|
|
BIOS implementation. The BIOS should reenable interrupts if it
|
|
|
|
|
needs to. Unfortunately, some BIOSes do not -- especially those in
|
|
|
|
|
many of the newer IBM Thinkpads. If you experience hangs when you
|
|
|
|
|
suspend, try setting this to Y. Otherwise, say N.
|
|
|
|
|
|
|
|
|
|
endif # APM
|
|
|
|
|
|
2011-05-20 06:51:07 +08:00
|
|
|
source "drivers/cpufreq/Kconfig"
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
source "drivers/cpuidle/Kconfig"
|
|
|
|
|
|
2008-10-10 02:45:22 +08:00
|
|
|
source "drivers/idle/Kconfig"
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
menu "Bus options (PCI etc.)"
|
|
|
|
|
|
|
|
|
|
config PCI
|
2008-05-19 20:10:14 +08:00
|
|
|
bool "PCI support"
|
2008-01-30 20:32:32 +08:00
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
Find out whether you have a PCI motherboard. PCI is the name of a
|
|
|
|
|
bus system, i.e. the way the CPU talks to the other stuff inside
|
|
|
|
|
your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
|
|
|
|
|
VESA. If you have PCI, say Y, otherwise N.
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "PCI access mode"
|
2008-07-10 22:09:50 +08:00
|
|
|
depends on X86_32 && PCI
|
2007-11-07 03:41:05 +08:00
|
|
|
default PCI_GOANY
|
|
|
|
|
---help---
|
|
|
|
|
On PCI systems, the BIOS can be used to detect the PCI devices and
|
|
|
|
|
determine their configuration. However, some old PCI motherboards
|
|
|
|
|
have BIOS bugs and may crash if this is done. Also, some embedded
|
|
|
|
|
PCI-based systems don't have any BIOS at all. Linux can also try to
|
|
|
|
|
detect the PCI hardware directly without using the BIOS.
|
|
|
|
|
|
|
|
|
|
With this option, you can specify how Linux should detect the
|
|
|
|
|
PCI devices. If you choose "BIOS", the BIOS will be used,
|
|
|
|
|
if you choose "Direct", the BIOS won't be used, and if you
|
|
|
|
|
choose "MMConfig", then PCI Express MMCONFIG will be used.
|
|
|
|
|
If you choose "Any", the kernel will try MMCONFIG, then the
|
|
|
|
|
direct access method and falls back to the BIOS if that doesn't
|
|
|
|
|
work. If unsure, go with the default, which is "Any".
|
|
|
|
|
|
|
|
|
|
config PCI_GOBIOS
|
|
|
|
|
bool "BIOS"
|
|
|
|
|
|
|
|
|
|
config PCI_GOMMCONFIG
|
|
|
|
|
bool "MMConfig"
|
|
|
|
|
|
|
|
|
|
config PCI_GODIRECT
|
|
|
|
|
bool "Direct"
|
|
|
|
|
|
2008-04-29 15:59:53 +08:00
|
|
|
config PCI_GOOLPC
|
2010-09-24 00:28:04 +08:00
|
|
|
bool "OLPC XO-1"
|
2008-04-29 15:59:53 +08:00
|
|
|
depends on OLPC
|
|
|
|
|
|
2008-06-06 05:14:41 +08:00
|
|
|
config PCI_GOANY
|
|
|
|
|
bool "Any"
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config PCI_BIOS
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2008-07-10 22:09:50 +08:00
|
|
|
depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
|
|
|
|
|
config PCI_DIRECT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2011-05-27 14:59:39 +08:00
|
|
|
depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
config PCI_MMCONFIG
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2009-08-15 03:37:50 +08:00
|
|
|
depends on X86_32 && PCI && (ACPI || SFI) && (PCI_GOMMCONFIG || PCI_GOANY)
|
2007-11-07 03:41:05 +08:00
|
|
|
|
2008-04-29 15:59:53 +08:00
|
|
|
config PCI_OLPC
|
2008-06-06 05:14:41 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
|
2008-04-29 15:59:53 +08:00
|
|
|
|
2010-03-19 04:31:34 +08:00
|
|
|
config PCI_XEN
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on PCI && XEN
|
|
|
|
|
select SWIOTLB_XEN
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
config PCI_DOMAINS
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2007-11-07 03:41:05 +08:00
|
|
|
depends on PCI
|
|
|
|
|
|
|
|
|
|
config PCI_MMCONFIG
|
|
|
|
|
bool "Support mmconfig PCI config space access"
|
|
|
|
|
depends on X86_64 && PCI && ACPI
|
|
|
|
|
|
2010-04-02 02:43:30 +08:00
|
|
|
config PCI_CNB20LE_QUIRK
|
2011-01-21 06:44:16 +08:00
|
|
|
bool "Read CNB20LE Host Bridge Windows" if EXPERT
|
2012-10-03 02:16:47 +08:00
|
|
|
depends on PCI
|
2010-04-02 02:43:30 +08:00
|
|
|
help
|
|
|
|
|
Read the PCI windows out of the CNB20LE host bridge. This allows
|
|
|
|
|
PCI hotplug to work on systems with the CNB20LE chipset which do
|
|
|
|
|
not have ACPI.
|
|
|
|
|
|
2011-01-07 01:12:30 +08:00
|
|
|
There's no public spec for this chipset, and this functionality
|
|
|
|
|
is known to be incomplete.
|
|
|
|
|
|
|
|
|
|
You should say N unless you know you need this.
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
source "drivers/pci/pcie/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "drivers/pci/Kconfig"
|
|
|
|
|
|
2011-03-23 07:34:59 +08:00
|
|
|
# x86_64 have no ISA slots, but can have ISA-style DMA.
|
2007-11-07 03:41:05 +08:00
|
|
|
config ISA_DMA_API
|
2011-03-23 07:34:59 +08:00
|
|
|
bool "ISA-style DMA support" if (X86_64 && EXPERT)
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Enables ISA-style DMA support for devices requiring such controllers.
|
|
|
|
|
If unsure, say Y.
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
if X86_32
|
|
|
|
|
|
|
|
|
|
config ISA
|
|
|
|
|
bool "ISA support"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
Find out whether you have ISA slots on your motherboard. ISA is the
|
|
|
|
|
name of a bus system, i.e. the way the CPU talks to the other stuff
|
|
|
|
|
inside your box. Other bus systems are PCI, EISA, MicroChannel
|
|
|
|
|
(MCA) or VESA. ISA is an older system, now being displaced by PCI;
|
|
|
|
|
newer boards don't support it. If you have ISA, say Y, otherwise N.
|
|
|
|
|
|
|
|
|
|
config EISA
|
|
|
|
|
bool "EISA support"
|
|
|
|
|
depends on ISA
|
|
|
|
|
---help---
|
|
|
|
|
The Extended Industry Standard Architecture (EISA) bus was
|
|
|
|
|
developed as an open alternative to the IBM MicroChannel bus.
|
|
|
|
|
|
|
|
|
|
The EISA bus provided some of the features of the IBM MicroChannel
|
|
|
|
|
bus while maintaining backward compatibility with cards made for
|
|
|
|
|
the older ISA bus. The EISA bus saw limited use between 1988 and
|
|
|
|
|
1995 when it was made obsolete by the PCI bus.
|
|
|
|
|
|
|
|
|
|
Say Y here if you are building a kernel for an EISA-based machine.
|
|
|
|
|
|
|
|
|
|
Otherwise, say N.
|
|
|
|
|
|
|
|
|
|
source "drivers/eisa/Kconfig"
|
|
|
|
|
|
|
|
|
|
config SCx200
|
|
|
|
|
tristate "NatSemi SCx200 support"
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
This provides basic support for National Semiconductor's
|
|
|
|
|
(now AMD's) Geode processors. The driver probes for the
|
|
|
|
|
PCI-IDs of several on-chip devices, so its a good dependency
|
|
|
|
|
for other scx200_* drivers.
|
|
|
|
|
|
|
|
|
|
If compiled as a module, the driver is named scx200.
|
|
|
|
|
|
|
|
|
|
config SCx200HR_TIMER
|
|
|
|
|
tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
|
2010-07-14 08:56:20 +08:00
|
|
|
depends on SCx200
|
2007-11-07 03:41:05 +08:00
|
|
|
default y
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2007-11-07 03:41:05 +08:00
|
|
|
This driver provides a clocksource built upon the on-chip
|
|
|
|
|
27MHz high-resolution timer. Its also a workaround for
|
|
|
|
|
NSC Geode SC-1100's buggy TSC, which loses time when the
|
|
|
|
|
processor goes idle (as is done by the scheduler). The
|
|
|
|
|
other workaround is idle=poll boot option.
|
|
|
|
|
|
2008-04-29 15:59:53 +08:00
|
|
|
config OLPC
|
|
|
|
|
bool "One Laptop Per Child support"
|
2011-02-23 16:50:15 +08:00
|
|
|
depends on !X86_PAE
|
2009-12-15 10:00:36 +08:00
|
|
|
select GPIOLIB
|
2011-02-23 17:08:31 +08:00
|
|
|
select OF
|
2011-03-13 23:10:17 +08:00
|
|
|
select OF_PROMTREE
|
2011-12-17 06:50:17 +08:00
|
|
|
select IRQ_DOMAIN
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2008-04-29 15:59:53 +08:00
|
|
|
Add support for detecting the unique features of the OLPC
|
|
|
|
|
XO hardware.
|
|
|
|
|
|
2011-06-26 00:34:10 +08:00
|
|
|
config OLPC_XO1_PM
|
|
|
|
|
bool "OLPC XO-1 Power Management"
|
2011-06-26 00:34:11 +08:00
|
|
|
depends on OLPC && MFD_CS5535 && PM_SLEEP
|
2011-06-26 00:34:10 +08:00
|
|
|
select MFD_CORE
|
2010-10-10 17:40:32 +08:00
|
|
|
---help---
|
2011-06-26 00:34:11 +08:00
|
|
|
Add support for poweroff and suspend of the OLPC XO-1 laptop.
|
2010-10-10 17:40:32 +08:00
|
|
|
|
2011-06-26 00:34:17 +08:00
|
|
|
config OLPC_XO1_RTC
|
|
|
|
|
bool "OLPC XO-1 Real Time Clock"
|
|
|
|
|
depends on OLPC_XO1_PM && RTC_DRV_CMOS
|
|
|
|
|
---help---
|
|
|
|
|
Add support for the XO-1 real time clock, which can be used as a
|
|
|
|
|
programmable wakeup source.
|
|
|
|
|
|
2011-06-26 00:34:12 +08:00
|
|
|
config OLPC_XO1_SCI
|
|
|
|
|
bool "OLPC XO-1 SCI extras"
|
2011-07-25 01:33:21 +08:00
|
|
|
depends on OLPC && OLPC_XO1_PM
|
2012-12-19 04:22:17 +08:00
|
|
|
depends on INPUT=y
|
2011-07-25 01:33:21 +08:00
|
|
|
select POWER_SUPPLY
|
2011-06-26 00:34:12 +08:00
|
|
|
select GPIO_CS5535
|
|
|
|
|
select MFD_CORE
|
|
|
|
|
---help---
|
|
|
|
|
Add support for SCI-based features of the OLPC XO-1 laptop:
|
2011-06-26 00:34:14 +08:00
|
|
|
- EC-driven system wakeups
|
2011-06-26 00:34:12 +08:00
|
|
|
- Power button
|
2011-06-26 00:34:14 +08:00
|
|
|
- Ebook switch
|
2011-06-26 00:34:15 +08:00
|
|
|
- Lid switch
|
2011-06-26 00:34:16 +08:00
|
|
|
- AC adapter status updates
|
|
|
|
|
- Battery status updates
|
2011-06-26 00:34:12 +08:00
|
|
|
|
2011-06-26 00:34:18 +08:00
|
|
|
config OLPC_XO15_SCI
|
|
|
|
|
bool "OLPC XO-1.5 SCI extras"
|
2011-07-25 01:33:21 +08:00
|
|
|
depends on OLPC && ACPI
|
|
|
|
|
select POWER_SUPPLY
|
2011-06-26 00:34:18 +08:00
|
|
|
---help---
|
|
|
|
|
Add support for SCI-based features of the OLPC XO-1.5 laptop:
|
|
|
|
|
- EC-driven system wakeups
|
|
|
|
|
- AC adapter status updates
|
|
|
|
|
- Battery status updates
|
2010-10-10 17:40:32 +08:00
|
|
|
|
2011-09-21 05:00:12 +08:00
|
|
|
config ALIX
|
|
|
|
|
bool "PCEngines ALIX System Support (LED setup)"
|
|
|
|
|
select GPIOLIB
|
|
|
|
|
---help---
|
|
|
|
|
This option enables system support for the PCEngines ALIX.
|
|
|
|
|
At present this just sets up LEDs for GPIO control on
|
|
|
|
|
ALIX2/3/6 boards. However, other system specific setup should
|
|
|
|
|
get added here.
|
|
|
|
|
|
|
|
|
|
Note: You must still enable the drivers for GPIO and LED support
|
|
|
|
|
(GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
|
|
|
|
|
|
|
|
|
|
Note: You have to set alix.force=1 for boards with Award BIOS.
|
|
|
|
|
|
2012-03-06 07:05:15 +08:00
|
|
|
config NET5501
|
|
|
|
|
bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
|
|
|
|
|
select GPIOLIB
|
|
|
|
|
---help---
|
|
|
|
|
This option enables system support for the Soekris Engineering net5501.
|
|
|
|
|
|
2012-01-14 16:45:39 +08:00
|
|
|
config GEOS
|
|
|
|
|
bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
|
|
|
|
|
select GPIOLIB
|
|
|
|
|
depends on DMI
|
|
|
|
|
---help---
|
|
|
|
|
This option enables system support for the Traverse Technologies GEOS.
|
|
|
|
|
|
2013-01-05 05:18:14 +08:00
|
|
|
config TS5500
|
|
|
|
|
bool "Technologic Systems TS-5500 platform support"
|
|
|
|
|
depends on MELAN
|
|
|
|
|
select CHECK_SIGNATURE
|
|
|
|
|
select NEW_LEDS
|
|
|
|
|
select LEDS_CLASS
|
|
|
|
|
---help---
|
|
|
|
|
This option enables system support for the Technologic Systems TS-5500.
|
|
|
|
|
|
2007-11-07 06:10:39 +08:00
|
|
|
endif # X86_32
|
|
|
|
|
|
2010-09-18 00:03:43 +08:00
|
|
|
config AMD_NB
|
2007-11-07 03:41:05 +08:00
|
|
|
def_bool y
|
2010-03-12 22:43:03 +08:00
|
|
|
depends on CPU_SUP_AMD && PCI
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
source "drivers/pcmcia/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "drivers/pci/hotplug/Kconfig"
|
|
|
|
|
|
2011-03-24 07:43:03 +08:00
|
|
|
config RAPIDIO
|
2013-07-04 06:08:56 +08:00
|
|
|
tristate "RapidIO support"
|
2011-03-24 07:43:03 +08:00
|
|
|
depends on PCI
|
|
|
|
|
default n
|
|
|
|
|
help
|
2013-07-04 06:08:56 +08:00
|
|
|
If enabled this option will include drivers and the core
|
2011-03-24 07:43:03 +08:00
|
|
|
infrastructure code to support RapidIO interconnect devices.
|
|
|
|
|
|
|
|
|
|
source "drivers/rapidio/Kconfig"
|
|
|
|
|
|
x86: provide platform-devices for boot-framebuffers
The current situation regarding boot-framebuffers (VGA, VESA/VBE, EFI) on
x86 causes troubles when loading multiple fbdev drivers. The global
"struct screen_info" does not provide any state-tracking about which
drivers use the FBs. request_mem_region() theoretically works, but
unfortunately vesafb/efifb ignore it due to quirks for broken boards.
Avoid this by creating a platform framebuffer devices with a pointer
to the "struct screen_info" as platform-data. Drivers can now create
platform-drivers and the driver-core will refuse multiple drivers being
active simultaneously.
We keep the screen_info available for backwards-compatibility. Drivers
can be converted in follow-up patches.
Different devices are created for VGA/VESA/EFI FBs to allow multiple
drivers to be loaded on distro kernels. We create:
- "vesa-framebuffer" for VBE/VESA graphics FBs
- "efi-framebuffer" for EFI FBs
- "platform-framebuffer" for everything else
This allows to load vesafb, efifb and others simultaneously and each
picks up only the supported FB types.
Apart from platform-framebuffer devices, this also introduces a
compatibility option for "simple-framebuffer" drivers which recently got
introduced for OF based systems. If CONFIG_X86_SYSFB is selected, we
try to match the screen_info against a simple-framebuffer supported
format. If we succeed, we create a "simple-framebuffer" device instead
of a platform-framebuffer.
This allows to reuse the simplefb.c driver across architectures and also
to introduce a SimpleDRM driver. There is no need to have vesafb.c,
efifb.c, simplefb.c and more just to have architecture specific quirks
in their setup-routines.
Instead, we now move the architecture specific quirks into x86-setup and
provide a generic simple-framebuffer. For backwards-compatibility (if
strange formats are used), we still allow vesafb/efifb to be loaded
simultaneously and pick up all remaining devices.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Link: http://lkml.kernel.org/r/1375445127-15480-4-git-send-email-dh.herrmann@gmail.com
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-02 20:05:22 +08:00
|
|
|
config X86_SYSFB
|
|
|
|
|
bool "Mark VGA/VBE/EFI FB as generic system framebuffer"
|
|
|
|
|
help
|
|
|
|
|
Firmwares often provide initial graphics framebuffers so the BIOS,
|
|
|
|
|
bootloader or kernel can show basic video-output during boot for
|
|
|
|
|
user-guidance and debugging. Historically, x86 used the VESA BIOS
|
|
|
|
|
Extensions and EFI-framebuffers for this, which are mostly limited
|
|
|
|
|
to x86.
|
|
|
|
|
This option, if enabled, marks VGA/VBE/EFI framebuffers as generic
|
|
|
|
|
framebuffers so the new generic system-framebuffer drivers can be
|
|
|
|
|
used on x86. If the framebuffer is not compatible with the generic
|
|
|
|
|
modes, it is adverticed as fallback platform framebuffer so legacy
|
|
|
|
|
drivers like efifb, vesafb and uvesafb can pick it up.
|
|
|
|
|
If this option is not selected, all system framebuffers are always
|
|
|
|
|
marked as fallback platform framebuffers as usual.
|
|
|
|
|
|
|
|
|
|
Note: Legacy fbdev drivers, including vesafb, efifb, uvesafb, will
|
|
|
|
|
not be able to pick up generic system framebuffers if this option
|
|
|
|
|
is selected. You are highly encouraged to enable simplefb as
|
|
|
|
|
replacement if you select this option. simplefb can correctly deal
|
|
|
|
|
with generic system framebuffers. But you should still keep vesafb
|
|
|
|
|
and others enabled as fallback if a system framebuffer is
|
|
|
|
|
incompatible with simplefb.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
menu "Executable file formats / Emulations"
|
|
|
|
|
|
|
|
|
|
source "fs/Kconfig.binfmt"
|
|
|
|
|
|
|
|
|
|
config IA32_EMULATION
|
|
|
|
|
bool "IA32 Emulation"
|
|
|
|
|
depends on X86_64
|
2013-06-19 03:33:40 +08:00
|
|
|
select BINFMT_ELF
|
2008-01-30 20:31:55 +08:00
|
|
|
select COMPAT_BINFMT_ELF
|
2012-10-09 07:28:08 +08:00
|
|
|
select HAVE_UID16
|
2009-02-05 23:21:53 +08:00
|
|
|
---help---
|
2012-02-20 02:40:03 +08:00
|
|
|
Include code to run legacy 32-bit programs under a
|
|
|
|
|
64-bit kernel. You should likely turn this on, unless you're
|
|
|
|
|
100% sure that you don't have any 32-bit programs left.
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
config IA32_AOUT
|
2009-02-05 23:21:53 +08:00
|
|
|
tristate "IA32 a.out support"
|
|
|
|
|
depends on IA32_EMULATION
|
|
|
|
|
---help---
|
|
|
|
|
Support old a.out binaries in the 32bit emulation.
|
2007-11-07 03:41:05 +08:00
|
|
|
|
2012-02-28 06:09:10 +08:00
|
|
|
config X86_X32
|
2012-10-03 02:16:47 +08:00
|
|
|
bool "x32 ABI for 64-bit mode"
|
|
|
|
|
depends on X86_64 && IA32_EMULATION
|
2012-02-20 02:40:03 +08:00
|
|
|
---help---
|
|
|
|
|
Include code to run binaries for the x32 native 32-bit ABI
|
|
|
|
|
for 64-bit processors. An x32 process gets access to the
|
|
|
|
|
full 64-bit register file and wide data path while leaving
|
|
|
|
|
pointers at 32 bits for smaller memory footprint.
|
|
|
|
|
|
|
|
|
|
You will need a recent binutils (2.22 or later) with
|
|
|
|
|
elf32_x86_64 support enabled to compile a kernel with this
|
|
|
|
|
option set.
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
config COMPAT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2012-02-28 06:09:10 +08:00
|
|
|
depends on IA32_EMULATION || X86_X32
|
[PATCH v3] ipc: provide generic compat versions of IPC syscalls
When using the "compat" APIs, architectures will generally want to
be able to make direct syscalls to msgsnd(), shmctl(), etc., and
in the kernel we would want them to be handled directly by
compat_sys_xxx() functions, as is true for other compat syscalls.
However, for historical reasons, several of the existing compat IPC
syscalls do not do this. semctl() expects a pointer to the fourth
argument, instead of the fourth argument itself. msgsnd(), msgrcv()
and shmat() expect arguments in different order.
This change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be
set to preserve this behavior for ports that use it (x86, sparc, powerpc,
s390, and mips). No actual semantics are changed for those architectures,
and there is only a minimal amount of code refactoring in ipc/compat.c.
Newer architectures like tile (and perhaps future architectures such
as arm64 and unicore64) should not select this option, and thus can
avoid having any IPC-specific code at all in their architecture-specific
compat layer. In the same vein, if this option is not selected, IPC_64
mode is assumed, since that's what the <asm-generic> headers expect.
The workaround code in "tile" for msgsnd() and msgrcv() is removed
with this change; it also fixes the bug that shmat() and semctl() were
not being properly handled.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-03-16 01:13:38 +08:00
|
|
|
select ARCH_WANT_OLD_COMPAT_IPC
|
2007-11-07 03:41:05 +08:00
|
|
|
|
2012-09-10 19:41:45 +08:00
|
|
|
if COMPAT
|
2007-11-07 03:41:05 +08:00
|
|
|
config COMPAT_FOR_U64_ALIGNMENT
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
2007-11-07 03:41:05 +08:00
|
|
|
|
|
|
|
|
config SYSVIPC_COMPAT
|
2008-01-30 20:31:03 +08:00
|
|
|
def_bool y
|
2012-09-10 19:41:45 +08:00
|
|
|
depends on SYSVIPC
|
2007-11-07 03:41:05 +08:00
|
|
|
|
2011-03-07 23:06:20 +08:00
|
|
|
config KEYS_COMPAT
|
2012-09-10 19:41:45 +08:00
|
|
|
def_bool y
|
|
|
|
|
depends on KEYS
|
|
|
|
|
endif
|
2011-03-07 23:06:20 +08:00
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
|
2008-11-04 01:21:45 +08:00
|
|
|
config HAVE_ATOMIC_IOMAP
|
|
|
|
|
def_bool y
|
|
|
|
|
depends on X86_32
|
|
|
|
|
|
2012-04-05 01:39:58 +08:00
|
|
|
config X86_DEV_DMA_OPS
|
|
|
|
|
bool
|
2012-04-05 01:40:21 +08:00
|
|
|
depends on X86_64 || STA2X11
|
2012-04-05 01:39:58 +08:00
|
|
|
|
2012-04-05 01:40:10 +08:00
|
|
|
config X86_DMA_REMAP
|
|
|
|
|
bool
|
2012-04-05 01:40:21 +08:00
|
|
|
depends on STA2X11
|
2012-04-05 01:40:10 +08:00
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
source "net/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "drivers/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "drivers/firmware/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "fs/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "arch/x86/Kconfig.debug"
|
|
|
|
|
|
|
|
|
|
source "security/Kconfig"
|
|
|
|
|
|
|
|
|
|
source "crypto/Kconfig"
|
|
|
|
|
|
2007-12-16 17:02:48 +08:00
|
|
|
source "arch/x86/kvm/Kconfig"
|
|
|
|
|
|
2007-11-07 03:41:05 +08:00
|
|
|
source "lib/Kconfig"
|