2011-10-04 18:19:01 +08:00
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/*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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2012-12-18 01:30:17 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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2011-10-04 18:19:01 +08:00
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*/
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2014-01-31 05:19:27 +08:00
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#include <linux/pm_runtime.h>
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2012-10-03 01:01:07 +08:00
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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2011-10-04 18:19:01 +08:00
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2014-05-09 13:25:20 +08:00
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#include <linux/component.h>
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2013-12-20 18:16:24 +08:00
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2011-10-04 18:19:01 +08:00
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#include <drm/exynos_drm.h>
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#include "exynos_drm_drv.h"
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#include "exynos_drm_crtc.h"
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2012-02-15 10:25:19 +08:00
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#include "exynos_drm_encoder.h"
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2011-10-04 18:19:01 +08:00
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#include "exynos_drm_fbdev.h"
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#include "exynos_drm_fb.h"
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#include "exynos_drm_gem.h"
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2011-12-08 16:54:07 +08:00
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#include "exynos_drm_plane.h"
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2012-03-21 09:55:26 +08:00
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#include "exynos_drm_vidi.h"
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2012-04-23 20:01:28 +08:00
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#include "exynos_drm_dmabuf.h"
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2012-05-17 19:06:32 +08:00
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#include "exynos_drm_g2d.h"
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drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
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#include "exynos_drm_ipp.h"
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2012-10-20 22:53:42 +08:00
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#include "exynos_drm_iommu.h"
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2011-10-04 18:19:01 +08:00
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2011-12-15 16:31:24 +08:00
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#define DRIVER_NAME "exynos"
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2011-10-04 18:19:01 +08:00
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#define DRIVER_DESC "Samsung SoC DRM"
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#define DRIVER_DATE "20110530"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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2012-10-16 08:20:12 +08:00
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static struct platform_device *exynos_drm_pdev;
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2014-05-09 13:25:20 +08:00
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static DEFINE_MUTEX(drm_component_lock);
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static LIST_HEAD(drm_component_list);
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struct component_dev {
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struct list_head list;
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2014-05-29 17:28:02 +08:00
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struct device *crtc_dev;
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struct device *conn_dev;
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enum exynos_drm_output_type out_type;
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unsigned int dev_type_flag;
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2014-05-09 13:25:20 +08:00
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};
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2011-10-04 18:19:01 +08:00
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static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
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{
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struct exynos_drm_private *private;
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int ret;
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int nr;
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private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL);
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2013-08-19 18:04:55 +08:00
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if (!private)
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2011-10-04 18:19:01 +08:00
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return -ENOMEM;
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INIT_LIST_HEAD(&private->pageflip_event_list);
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2014-01-31 05:19:27 +08:00
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dev_set_drvdata(dev->dev, dev);
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2011-10-04 18:19:01 +08:00
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dev->dev_private = (void *)private;
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2012-10-20 22:53:42 +08:00
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/*
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* create mapping to manage iommu table and set a pointer to iommu
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* mapping structure to iommu_mapping of private data.
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* also this iommu_mapping can be used to check if iommu is supported
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* or not.
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*/
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ret = drm_create_iommu_mapping(dev);
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if (ret < 0) {
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DRM_ERROR("failed to create iommu mapping.\n");
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2014-02-28 17:37:02 +08:00
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goto err_free_private;
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2012-10-20 22:53:42 +08:00
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}
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2011-10-04 18:19:01 +08:00
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drm_mode_config_init(dev);
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exynos_drm_mode_config_init(dev);
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2011-12-08 16:54:07 +08:00
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for (nr = 0; nr < MAX_PLANE; nr++) {
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2012-06-27 13:27:04 +08:00
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struct drm_plane *plane;
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2014-01-31 05:19:11 +08:00
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unsigned long possible_crtcs = (1 << MAX_CRTC) - 1;
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2012-06-27 13:27:04 +08:00
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2014-09-19 20:58:53 +08:00
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plane = exynos_plane_init(dev, possible_crtcs,
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DRM_PLANE_TYPE_OVERLAY);
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2014-10-10 20:31:53 +08:00
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if (!IS_ERR(plane))
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continue;
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ret = PTR_ERR(plane);
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goto err_mode_config_cleanup;
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2011-12-08 16:54:07 +08:00
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}
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2012-02-15 10:25:19 +08:00
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/* setup possible_clones. */
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exynos_drm_encoder_setup(dev);
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2013-12-11 18:34:23 +08:00
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platform_set_drvdata(dev->platformdev, dev);
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2014-05-09 13:25:20 +08:00
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/* Try to bind all sub drivers. */
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ret = component_bind_all(dev->dev, dev);
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if (ret)
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2014-10-07 21:09:14 +08:00
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goto err_mode_config_cleanup;
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ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
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if (ret)
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goto err_unbind_all;
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2014-05-09 13:25:20 +08:00
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2014-04-14 11:55:55 +08:00
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/* Probe non kms sub drivers and virtual display driver. */
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2014-05-09 13:25:20 +08:00
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ret = exynos_drm_device_subdrv_probe(dev);
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if (ret)
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2014-10-07 21:09:14 +08:00
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goto err_cleanup_vblank;
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2014-05-09 13:25:20 +08:00
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2014-09-18 16:50:35 +08:00
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/*
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* enable drm irq mode.
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* - with irq_enabled = true, we can use the vblank feature.
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*
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* P.S. note that we wouldn't use drm irq handler but
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* just specific driver own one instead because
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* drm framework supports only one irq handler.
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*/
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dev->irq_enabled = true;
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/*
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* with vblank_disable_allowed = true, vblank interrupt will be disabled
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* by drm timer once a current process gives up ownership of
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* vblank event.(after drm_vblank_put function is called)
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*/
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dev->vblank_disable_allowed = true;
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2014-10-10 20:31:54 +08:00
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/* init kms poll for handling hpd */
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drm_kms_helper_poll_init(dev);
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/* force connectors detection */
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drm_helper_hpd_irq_event(dev);
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2011-10-04 18:19:01 +08:00
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return 0;
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2014-05-09 13:25:20 +08:00
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err_cleanup_vblank:
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2011-10-04 18:19:01 +08:00
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drm_vblank_cleanup(dev);
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2014-10-07 21:09:14 +08:00
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err_unbind_all:
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component_unbind_all(dev->dev, dev);
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2014-02-19 20:02:55 +08:00
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err_mode_config_cleanup:
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drm_mode_config_cleanup(dev);
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2012-10-20 22:53:42 +08:00
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drm_release_iommu_mapping(dev);
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2014-02-28 17:37:02 +08:00
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err_free_private:
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2011-10-04 18:19:01 +08:00
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kfree(private);
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return ret;
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}
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static int exynos_drm_unload(struct drm_device *dev)
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{
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2014-05-09 13:25:20 +08:00
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exynos_drm_device_subdrv_remove(dev);
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2011-10-04 18:19:01 +08:00
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exynos_drm_fbdev_fini(dev);
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2011-10-18 15:58:05 +08:00
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drm_kms_helper_poll_fini(dev);
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2012-10-20 22:53:42 +08:00
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2014-09-09 21:16:06 +08:00
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drm_vblank_cleanup(dev);
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2014-10-07 21:09:14 +08:00
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component_unbind_all(dev->dev, dev);
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2014-09-09 21:16:06 +08:00
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drm_mode_config_cleanup(dev);
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2012-10-20 22:53:42 +08:00
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drm_release_iommu_mapping(dev);
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2011-10-04 18:19:01 +08:00
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2014-09-09 21:16:06 +08:00
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kfree(dev->dev_private);
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2011-10-04 18:19:01 +08:00
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dev->dev_private = NULL;
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return 0;
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}
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2014-01-31 05:19:27 +08:00
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static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state)
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{
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struct drm_connector *connector;
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drm_modeset_lock_all(dev);
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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int old_dpms = connector->dpms;
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if (connector->funcs->dpms)
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connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF);
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/* Set the old mode back to the connector for resume */
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connector->dpms = old_dpms;
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}
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drm_modeset_unlock_all(dev);
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return 0;
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}
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static int exynos_drm_resume(struct drm_device *dev)
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{
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struct drm_connector *connector;
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drm_modeset_lock_all(dev);
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list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
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if (connector->funcs->dpms)
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connector->funcs->dpms(connector, connector->dpms);
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}
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2014-05-09 14:14:15 +08:00
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drm_modeset_unlock_all(dev);
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2014-01-31 05:19:27 +08:00
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drm_helper_resume_force_mode(dev);
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return 0;
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}
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2012-03-16 17:47:09 +08:00
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static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
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{
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2012-05-17 19:06:32 +08:00
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struct drm_exynos_file_private *file_priv;
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2013-07-01 16:00:47 +08:00
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int ret;
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2012-05-17 19:06:32 +08:00
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file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
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if (!file_priv)
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return -ENOMEM;
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file->driver_priv = file_priv;
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2012-04-23 20:01:28 +08:00
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2013-07-01 16:00:47 +08:00
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ret = exynos_drm_subdrv_open(dev, file);
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2014-01-16 14:01:26 +08:00
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if (ret)
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2014-03-17 11:28:06 +08:00
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goto err_file_priv_free;
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2013-07-01 16:00:47 +08:00
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2014-01-16 14:01:26 +08:00
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return ret;
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2014-03-17 11:28:06 +08:00
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err_file_priv_free:
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2014-01-16 14:01:26 +08:00
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kfree(file_priv);
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file->driver_priv = NULL;
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2013-07-01 16:00:47 +08:00
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return ret;
|
2012-03-16 17:47:09 +08:00
|
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}
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2011-10-14 12:29:51 +08:00
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static void exynos_drm_preclose(struct drm_device *dev,
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2012-02-15 10:25:18 +08:00
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struct drm_file *file)
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2013-10-01 13:51:37 +08:00
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{
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exynos_drm_subdrv_close(dev, file);
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}
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static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
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2011-10-14 12:29:51 +08:00
|
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{
|
2012-03-16 17:47:07 +08:00
|
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struct exynos_drm_private *private = dev->dev_private;
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2013-10-01 13:51:37 +08:00
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struct drm_pending_vblank_event *v, *vt;
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struct drm_pending_event *e, *et;
|
2012-03-16 17:47:07 +08:00
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unsigned long flags;
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2013-10-01 13:51:37 +08:00
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if (!file->driver_priv)
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return;
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/* Release all events not unhandled by page flip handler. */
|
2012-03-16 17:47:07 +08:00
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spin_lock_irqsave(&dev->event_lock, flags);
|
2013-10-01 13:51:37 +08:00
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list_for_each_entry_safe(v, vt, &private->pageflip_event_list,
|
2012-03-16 17:47:07 +08:00
|
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base.link) {
|
2013-10-01 13:51:37 +08:00
|
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if (v->base.file_priv == file) {
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list_del(&v->base.link);
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drm_vblank_put(dev, v->pipe);
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v->base.destroy(&v->base);
|
2012-03-16 17:47:07 +08:00
|
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}
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}
|
2012-03-16 17:47:09 +08:00
|
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|
2013-10-01 13:51:37 +08:00
|
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|
/* Release all events handled by page flip handler but not freed. */
|
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list_for_each_entry_safe(e, et, &file->event_list, link) {
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list_del(&e->link);
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e->destroy(e);
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}
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|
spin_unlock_irqrestore(&dev->event_lock, flags);
|
2011-10-14 12:29:51 +08:00
|
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|
2012-02-15 10:25:22 +08:00
|
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|
kfree(file->driver_priv);
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|
file->driver_priv = NULL;
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|
|
}
|
|
|
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|
2011-10-04 18:19:01 +08:00
|
|
|
static void exynos_drm_lastclose(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
exynos_drm_fbdev_restore_mode(dev);
|
|
|
|
}
|
|
|
|
|
2012-05-17 19:27:22 +08:00
|
|
|
static const struct vm_operations_struct exynos_drm_gem_vm_ops = {
|
2011-10-04 18:19:01 +08:00
|
|
|
.fault = exynos_drm_gem_fault,
|
|
|
|
.open = drm_gem_vm_open,
|
|
|
|
.close = drm_gem_vm_close,
|
|
|
|
};
|
|
|
|
|
2013-08-03 01:27:49 +08:00
|
|
|
static const struct drm_ioctl_desc exynos_ioctls[] = {
|
2011-10-04 18:19:01 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl,
|
|
|
|
DRM_UNLOCKED | DRM_AUTH),
|
2012-05-04 14:51:17 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET,
|
|
|
|
exynos_drm_gem_get_ioctl, DRM_UNLOCKED),
|
2012-03-21 09:55:26 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION,
|
|
|
|
vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
2012-05-17 19:06:32 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER,
|
|
|
|
exynos_g2d_get_ver_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST,
|
|
|
|
exynos_g2d_set_cmdlist_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC,
|
|
|
|
exynos_g2d_exec_ioctl, DRM_UNLOCKED | DRM_AUTH),
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY,
|
|
|
|
exynos_drm_ipp_get_property, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY,
|
|
|
|
exynos_drm_ipp_set_property, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF,
|
|
|
|
exynos_drm_ipp_queue_buf, DRM_UNLOCKED | DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL,
|
|
|
|
exynos_drm_ipp_cmd_ctrl, DRM_UNLOCKED | DRM_AUTH),
|
2011-10-04 18:19:01 +08:00
|
|
|
};
|
|
|
|
|
2011-12-08 14:00:20 +08:00
|
|
|
static const struct file_operations exynos_drm_driver_fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = drm_open,
|
|
|
|
.mmap = exynos_drm_gem_mmap,
|
|
|
|
.poll = drm_poll,
|
|
|
|
.read = drm_read,
|
|
|
|
.unlocked_ioctl = drm_ioctl,
|
2012-07-10 06:40:07 +08:00
|
|
|
#ifdef CONFIG_COMPAT
|
|
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
|
|
#endif
|
2011-12-08 14:00:20 +08:00
|
|
|
.release = drm_release,
|
|
|
|
};
|
|
|
|
|
2011-10-04 18:19:01 +08:00
|
|
|
static struct drm_driver exynos_drm_driver = {
|
2014-04-12 08:39:52 +08:00
|
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
|
2011-10-04 18:19:01 +08:00
|
|
|
.load = exynos_drm_load,
|
|
|
|
.unload = exynos_drm_unload,
|
2014-01-31 05:19:27 +08:00
|
|
|
.suspend = exynos_drm_suspend,
|
|
|
|
.resume = exynos_drm_resume,
|
2012-03-16 17:47:09 +08:00
|
|
|
.open = exynos_drm_open,
|
2011-10-14 12:29:51 +08:00
|
|
|
.preclose = exynos_drm_preclose,
|
2011-10-04 18:19:01 +08:00
|
|
|
.lastclose = exynos_drm_lastclose,
|
2012-02-15 10:25:22 +08:00
|
|
|
.postclose = exynos_drm_postclose,
|
2014-08-29 18:12:43 +08:00
|
|
|
.set_busid = drm_platform_set_busid,
|
2011-10-04 18:19:01 +08:00
|
|
|
.get_vblank_counter = drm_vblank_count,
|
|
|
|
.enable_vblank = exynos_drm_crtc_enable_vblank,
|
|
|
|
.disable_vblank = exynos_drm_crtc_disable_vblank,
|
|
|
|
.gem_free_object = exynos_drm_gem_free_object,
|
|
|
|
.gem_vm_ops = &exynos_drm_gem_vm_ops,
|
|
|
|
.dumb_create = exynos_drm_gem_dumb_create,
|
|
|
|
.dumb_map_offset = exynos_drm_gem_dumb_map_offset,
|
2013-07-16 15:12:04 +08:00
|
|
|
.dumb_destroy = drm_gem_dumb_destroy,
|
2012-04-23 20:01:28 +08:00
|
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
|
|
.gem_prime_export = exynos_dmabuf_prime_export,
|
|
|
|
.gem_prime_import = exynos_dmabuf_prime_import,
|
2011-10-04 18:19:01 +08:00
|
|
|
.ioctls = exynos_ioctls,
|
2013-08-03 01:27:49 +08:00
|
|
|
.num_ioctls = ARRAY_SIZE(exynos_ioctls),
|
2011-12-08 14:00:20 +08:00
|
|
|
.fops = &exynos_drm_driver_fops,
|
2011-10-04 18:19:01 +08:00
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.desc = DRIVER_DESC,
|
|
|
|
.date = DRIVER_DATE,
|
|
|
|
.major = DRIVER_MAJOR,
|
|
|
|
.minor = DRIVER_MINOR,
|
|
|
|
};
|
|
|
|
|
2014-01-31 05:19:27 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int exynos_drm_sys_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
|
|
|
pm_message_t message;
|
|
|
|
|
2014-06-30 21:25:44 +08:00
|
|
|
if (pm_runtime_suspended(dev) || !drm_dev)
|
2014-01-31 05:19:27 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
message.event = PM_EVENT_SUSPEND;
|
|
|
|
return exynos_drm_suspend(drm_dev, message);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int exynos_drm_sys_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
|
|
|
|
2014-06-30 21:25:44 +08:00
|
|
|
if (pm_runtime_suspended(dev) || !drm_dev)
|
2014-01-31 05:19:27 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
return exynos_drm_resume(drm_dev);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static const struct dev_pm_ops exynos_drm_pm_ops = {
|
|
|
|
SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_sys_suspend, exynos_drm_sys_resume)
|
|
|
|
};
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
int exynos_drm_component_add(struct device *dev,
|
2014-05-29 17:28:02 +08:00
|
|
|
enum exynos_drm_device_type dev_type,
|
|
|
|
enum exynos_drm_output_type out_type)
|
2014-05-09 13:25:20 +08:00
|
|
|
{
|
|
|
|
struct component_dev *cdev;
|
2014-05-29 17:28:02 +08:00
|
|
|
|
|
|
|
if (dev_type != EXYNOS_DEVICE_TYPE_CRTC &&
|
|
|
|
dev_type != EXYNOS_DEVICE_TYPE_CONNECTOR) {
|
|
|
|
DRM_ERROR("invalid device type.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_lock(&drm_component_lock);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure to check if there is a component which has two device
|
|
|
|
* objects, for connector and for encoder/connector.
|
|
|
|
* It should make sure that crtc and encoder/connector drivers are
|
|
|
|
* ready before exynos drm core binds them.
|
|
|
|
*/
|
|
|
|
list_for_each_entry(cdev, &drm_component_list, list) {
|
|
|
|
if (cdev->out_type == out_type) {
|
|
|
|
/*
|
|
|
|
* If crtc and encoder/connector device objects are
|
|
|
|
* added already just return.
|
|
|
|
*/
|
|
|
|
if (cdev->dev_type_flag == (EXYNOS_DEVICE_TYPE_CRTC |
|
|
|
|
EXYNOS_DEVICE_TYPE_CONNECTOR)) {
|
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CRTC) {
|
|
|
|
cdev->crtc_dev = dev;
|
|
|
|
cdev->dev_type_flag |= dev_type;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CONNECTOR) {
|
|
|
|
cdev->conn_dev = dev;
|
|
|
|
cdev->dev_type_flag |= dev_type;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&drm_component_lock);
|
2014-05-09 13:25:20 +08:00
|
|
|
|
|
|
|
cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
|
|
|
|
if (!cdev)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2014-05-29 17:28:02 +08:00
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CRTC)
|
|
|
|
cdev->crtc_dev = dev;
|
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CONNECTOR)
|
|
|
|
cdev->conn_dev = dev;
|
2014-05-09 13:25:20 +08:00
|
|
|
|
2014-05-29 17:28:02 +08:00
|
|
|
cdev->out_type = out_type;
|
|
|
|
cdev->dev_type_flag = dev_type;
|
2014-05-09 13:25:20 +08:00
|
|
|
|
|
|
|
mutex_lock(&drm_component_lock);
|
|
|
|
list_add_tail(&cdev->list, &drm_component_list);
|
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void exynos_drm_component_del(struct device *dev,
|
2014-05-29 17:28:02 +08:00
|
|
|
enum exynos_drm_device_type dev_type)
|
2014-05-09 13:25:20 +08:00
|
|
|
{
|
|
|
|
struct component_dev *cdev, *next;
|
|
|
|
|
|
|
|
mutex_lock(&drm_component_lock);
|
|
|
|
|
|
|
|
list_for_each_entry_safe(cdev, next, &drm_component_list, list) {
|
2014-05-29 17:28:02 +08:00
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CRTC) {
|
|
|
|
if (cdev->crtc_dev == dev) {
|
|
|
|
cdev->crtc_dev = NULL;
|
|
|
|
cdev->dev_type_flag &= ~dev_type;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dev_type == EXYNOS_DEVICE_TYPE_CONNECTOR) {
|
|
|
|
if (cdev->conn_dev == dev) {
|
|
|
|
cdev->conn_dev = NULL;
|
|
|
|
cdev->dev_type_flag &= ~dev_type;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Release cdev object only in case that both of crtc and
|
|
|
|
* encoder/connector device objects are NULL.
|
|
|
|
*/
|
|
|
|
if (!cdev->crtc_dev && !cdev->conn_dev) {
|
2014-05-09 13:25:20 +08:00
|
|
|
list_del(&cdev->list);
|
|
|
|
kfree(cdev);
|
|
|
|
}
|
2014-05-29 17:28:02 +08:00
|
|
|
|
|
|
|
break;
|
2014-05-09 13:25:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
}
|
|
|
|
|
2014-09-11 16:04:03 +08:00
|
|
|
static int compare_dev(struct device *dev, void *data)
|
2014-05-09 13:25:20 +08:00
|
|
|
{
|
|
|
|
return dev == (struct device *)data;
|
|
|
|
}
|
|
|
|
|
2014-09-11 16:04:03 +08:00
|
|
|
static struct component_match *exynos_drm_match_add(struct device *dev)
|
2014-05-09 13:25:20 +08:00
|
|
|
{
|
2014-09-11 16:04:03 +08:00
|
|
|
struct component_match *match = NULL;
|
2014-05-09 13:25:20 +08:00
|
|
|
struct component_dev *cdev;
|
2014-05-29 17:28:02 +08:00
|
|
|
unsigned int attach_cnt = 0;
|
2014-05-09 13:25:20 +08:00
|
|
|
|
|
|
|
mutex_lock(&drm_component_lock);
|
|
|
|
|
|
|
|
list_for_each_entry(cdev, &drm_component_list, list) {
|
2014-05-29 17:28:02 +08:00
|
|
|
/*
|
|
|
|
* Add components to master only in case that crtc and
|
|
|
|
* encoder/connector device objects exist.
|
|
|
|
*/
|
|
|
|
if (!cdev->crtc_dev || !cdev->conn_dev)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
attach_cnt++;
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
|
2014-05-29 17:28:02 +08:00
|
|
|
/*
|
|
|
|
* fimd and dpi modules have same device object so add
|
|
|
|
* only crtc device object in this case.
|
|
|
|
*/
|
|
|
|
if (cdev->crtc_dev == cdev->conn_dev) {
|
2014-09-11 16:04:03 +08:00
|
|
|
component_match_add(dev, &match, compare_dev,
|
|
|
|
cdev->crtc_dev);
|
2014-05-29 17:28:02 +08:00
|
|
|
goto out_lock;
|
|
|
|
}
|
2014-05-09 13:25:20 +08:00
|
|
|
|
2014-05-29 17:28:02 +08:00
|
|
|
/*
|
|
|
|
* Do not chage below call order.
|
|
|
|
* crtc device first should be added to master because
|
|
|
|
* connector/encoder need pipe number of crtc when they
|
|
|
|
* are created.
|
|
|
|
*/
|
2014-09-11 16:04:03 +08:00
|
|
|
component_match_add(dev, &match, compare_dev, cdev->crtc_dev);
|
|
|
|
component_match_add(dev, &match, compare_dev, cdev->conn_dev);
|
2014-05-29 17:28:02 +08:00
|
|
|
|
|
|
|
out_lock:
|
2014-05-09 13:25:20 +08:00
|
|
|
mutex_lock(&drm_component_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&drm_component_lock);
|
|
|
|
|
2014-09-11 16:04:03 +08:00
|
|
|
return attach_cnt ? match : ERR_PTR(-EPROBE_DEFER);
|
2014-05-09 13:25:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int exynos_drm_bind(struct device *dev)
|
|
|
|
{
|
|
|
|
return drm_platform_init(&exynos_drm_driver, to_platform_device(dev));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void exynos_drm_unbind(struct device *dev)
|
|
|
|
{
|
|
|
|
drm_put_dev(dev_get_drvdata(dev));
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct component_master_ops exynos_drm_ops = {
|
|
|
|
.bind = exynos_drm_bind,
|
|
|
|
.unbind = exynos_drm_unbind,
|
2011-10-04 18:19:01 +08:00
|
|
|
};
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
static int exynos_drm_platform_probe(struct platform_device *pdev)
|
2011-10-04 18:19:01 +08:00
|
|
|
{
|
2014-09-11 16:04:03 +08:00
|
|
|
struct component_match *match;
|
2012-03-16 17:47:08 +08:00
|
|
|
int ret;
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
2014-06-09 21:39:49 +08:00
|
|
|
exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
|
2014-05-09 13:25:20 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMD
|
|
|
|
ret = platform_driver_register(&fimd_driver);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
#endif
|
|
|
|
|
2014-01-31 05:19:23 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_DP
|
|
|
|
ret = platform_driver_register(&dp_driver);
|
|
|
|
if (ret < 0)
|
2014-05-09 13:25:20 +08:00
|
|
|
goto err_unregister_fimd_drv;
|
2014-01-31 05:19:23 +08:00
|
|
|
#endif
|
|
|
|
|
2014-04-04 00:19:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_DSI
|
|
|
|
ret = platform_driver_register(&dsi_driver);
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_dp_drv;
|
2014-04-04 00:19:56 +08:00
|
|
|
#endif
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_HDMI
|
|
|
|
ret = platform_driver_register(&mixer_driver);
|
|
|
|
if (ret < 0)
|
2014-05-09 13:25:20 +08:00
|
|
|
goto err_unregister_dsi_drv;
|
|
|
|
ret = platform_driver_register(&hdmi_driver);
|
2012-03-21 09:55:26 +08:00
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_mixer_drv;
|
2012-03-21 09:55:26 +08:00
|
|
|
#endif
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_G2D
|
|
|
|
ret = platform_driver_register(&g2d_driver);
|
|
|
|
if (ret < 0)
|
2014-05-09 13:25:20 +08:00
|
|
|
goto err_unregister_hdmi_drv;
|
2012-05-17 19:06:32 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:55 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMC
|
|
|
|
ret = platform_driver_register(&fimc_driver);
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_g2d_drv;
|
2012-12-14 16:58:55 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_ROTATOR
|
|
|
|
ret = platform_driver_register(&rotator_driver);
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_fimc_drv;
|
2012-12-14 16:58:56 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:57 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_GSC
|
|
|
|
ret = platform_driver_register(&gsc_driver);
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_rotator_drv;
|
2012-12-14 16:58:57 +08:00
|
|
|
#endif
|
|
|
|
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_IPP
|
|
|
|
ret = platform_driver_register(&ipp_driver);
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_gsc_drv;
|
2013-04-23 13:02:53 +08:00
|
|
|
|
|
|
|
ret = exynos_platform_device_ipp_register();
|
|
|
|
if (ret < 0)
|
2014-04-17 12:49:35 +08:00
|
|
|
goto err_unregister_ipp_drv;
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#endif
|
|
|
|
|
2014-09-11 16:04:03 +08:00
|
|
|
match = exynos_drm_match_add(&pdev->dev);
|
|
|
|
if (IS_ERR(match)) {
|
|
|
|
ret = PTR_ERR(match);
|
|
|
|
goto err_unregister_resources;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = component_master_add_with_match(&pdev->dev, &exynos_drm_ops,
|
|
|
|
match);
|
2012-03-16 17:47:08 +08:00
|
|
|
if (ret < 0)
|
2014-09-11 16:04:03 +08:00
|
|
|
goto err_unregister_resources;
|
2012-03-16 17:47:08 +08:00
|
|
|
|
2014-09-11 16:04:03 +08:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
err_unregister_resources:
|
2012-03-16 17:47:08 +08:00
|
|
|
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_IPP
|
2014-09-11 16:04:03 +08:00
|
|
|
exynos_platform_device_ipp_unregister();
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_ipp_drv:
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
platform_driver_unregister(&ipp_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_gsc_drv:
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:57 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_GSC
|
|
|
|
platform_driver_unregister(&gsc_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_rotator_drv:
|
2012-12-14 16:58:57 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_ROTATOR
|
|
|
|
platform_driver_unregister(&rotator_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_fimc_drv:
|
2012-12-14 16:58:56 +08:00
|
|
|
#endif
|
|
|
|
|
2012-12-14 16:58:55 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMC
|
|
|
|
platform_driver_unregister(&fimc_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_g2d_drv:
|
2012-12-14 16:58:55 +08:00
|
|
|
#endif
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_G2D
|
|
|
|
platform_driver_unregister(&g2d_driver);
|
2014-05-09 13:25:20 +08:00
|
|
|
err_unregister_hdmi_drv:
|
2012-03-21 09:55:26 +08:00
|
|
|
#endif
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_HDMI
|
|
|
|
platform_driver_unregister(&hdmi_driver);
|
2014-05-09 13:25:20 +08:00
|
|
|
err_unregister_mixer_drv:
|
|
|
|
platform_driver_unregister(&mixer_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_dsi_drv:
|
2014-01-31 05:19:23 +08:00
|
|
|
#endif
|
2014-03-17 18:27:17 +08:00
|
|
|
|
2014-04-04 00:19:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_DSI
|
|
|
|
platform_driver_unregister(&dsi_driver);
|
2014-04-17 12:49:35 +08:00
|
|
|
err_unregister_dp_drv:
|
2014-04-04 00:19:56 +08:00
|
|
|
#endif
|
|
|
|
|
2014-01-31 05:19:23 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_DP
|
|
|
|
platform_driver_unregister(&dp_driver);
|
2014-05-09 13:25:20 +08:00
|
|
|
err_unregister_fimd_drv:
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_DRM_EXYNOS_FIMD
|
|
|
|
platform_driver_unregister(&fimd_driver);
|
2012-03-16 17:47:08 +08:00
|
|
|
#endif
|
|
|
|
return ret;
|
2011-10-04 18:19:01 +08:00
|
|
|
}
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
static int exynos_drm_platform_remove(struct platform_device *pdev)
|
2011-10-04 18:19:01 +08:00
|
|
|
{
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
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#ifdef CONFIG_DRM_EXYNOS_IPP
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2013-04-23 13:02:53 +08:00
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exynos_platform_device_ipp_unregister();
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drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
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platform_driver_unregister(&ipp_driver);
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#endif
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2012-12-14 16:58:57 +08:00
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#ifdef CONFIG_DRM_EXYNOS_GSC
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platform_driver_unregister(&gsc_driver);
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#endif
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2012-12-14 16:58:56 +08:00
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#ifdef CONFIG_DRM_EXYNOS_ROTATOR
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platform_driver_unregister(&rotator_driver);
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#endif
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2012-12-14 16:58:55 +08:00
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#ifdef CONFIG_DRM_EXYNOS_FIMC
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platform_driver_unregister(&fimc_driver);
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#endif
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2012-05-17 19:06:32 +08:00
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#ifdef CONFIG_DRM_EXYNOS_G2D
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platform_driver_unregister(&g2d_driver);
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#endif
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2012-03-16 17:47:08 +08:00
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#ifdef CONFIG_DRM_EXYNOS_HDMI
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platform_driver_unregister(&mixer_driver);
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platform_driver_unregister(&hdmi_driver);
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#endif
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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platform_driver_unregister(&fimd_driver);
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#endif
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2014-01-31 05:19:23 +08:00
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2014-04-04 00:19:56 +08:00
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#ifdef CONFIG_DRM_EXYNOS_DSI
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platform_driver_unregister(&dsi_driver);
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#endif
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2014-01-31 05:19:23 +08:00
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#ifdef CONFIG_DRM_EXYNOS_DP
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platform_driver_unregister(&dp_driver);
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#endif
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2014-05-09 13:25:20 +08:00
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component_master_del(&pdev->dev, &exynos_drm_ops);
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return 0;
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}
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static struct platform_driver exynos_drm_platform_driver = {
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.probe = exynos_drm_platform_probe,
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.remove = exynos_drm_platform_remove,
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.driver = {
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.owner = THIS_MODULE,
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.name = "exynos-drm",
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.pm = &exynos_drm_pm_ops,
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},
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};
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static int exynos_drm_init(void)
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{
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int ret;
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exynos_drm_pdev = platform_device_register_simple("exynos-drm", -1,
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NULL, 0);
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if (IS_ERR(exynos_drm_pdev))
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return PTR_ERR(exynos_drm_pdev);
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#ifdef CONFIG_DRM_EXYNOS_VIDI
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ret = exynos_drm_probe_vidi();
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if (ret < 0)
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goto err_unregister_pd;
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#endif
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ret = platform_driver_register(&exynos_drm_platform_driver);
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if (ret)
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goto err_remove_vidi;
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return 0;
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err_remove_vidi:
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#ifdef CONFIG_DRM_EXYNOS_VIDI
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exynos_drm_remove_vidi();
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2014-06-17 19:38:07 +08:00
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err_unregister_pd:
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2014-05-09 13:25:20 +08:00
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#endif
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2014-06-17 19:38:07 +08:00
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platform_device_unregister(exynos_drm_pdev);
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2014-05-09 13:25:20 +08:00
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return ret;
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}
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static void exynos_drm_exit(void)
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{
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2014-06-17 19:38:07 +08:00
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platform_driver_unregister(&exynos_drm_platform_driver);
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2014-05-09 13:25:20 +08:00
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#ifdef CONFIG_DRM_EXYNOS_VIDI
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exynos_drm_remove_vidi();
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#endif
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platform_device_unregister(exynos_drm_pdev);
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2011-10-04 18:19:01 +08:00
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}
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module_init(exynos_drm_init);
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module_exit(exynos_drm_exit);
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MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
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MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
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MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
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MODULE_DESCRIPTION("Samsung SoC DRM Driver");
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MODULE_LICENSE("GPL");
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