2007-12-24 02:50:57 +08:00
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/*
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2009-03-09 16:12:55 +08:00
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* C-Media CMI8788 driver for C-Media's reference design and similar models
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2007-12-24 02:50:57 +08:00
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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2009-09-28 17:17:36 +08:00
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* CMI8788:
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*
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2007-12-24 02:50:57 +08:00
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* SPI 0 -> 1st AK4396 (front)
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2008-01-14 15:55:03 +08:00
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* SPI 1 -> 2nd AK4396 (surround)
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2007-12-24 02:50:57 +08:00
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* SPI 2 -> 3rd AK4396 (center/LFE)
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* SPI 3 -> WM8785
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2008-01-14 15:55:03 +08:00
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* SPI 4 -> 4th AK4396 (back)
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2007-12-24 02:50:57 +08:00
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*
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* GPIO 0 -> DFS0 of AK5385
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* GPIO 1 -> DFS1 of AK5385
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2009-03-09 16:12:55 +08:00
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* GPIO 8 -> enable headphone amplifier on HT-Omega models
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2009-09-28 17:17:36 +08:00
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*
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* CM9780:
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*
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* GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
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2007-12-24 02:50:57 +08:00
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*/
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2008-08-29 19:08:34 +08:00
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#include <linux/delay.h>
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2008-02-23 01:40:56 +08:00
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#include <linux/mutex.h>
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2007-12-24 02:50:57 +08:00
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#include <linux/pci.h>
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2008-02-23 01:40:56 +08:00
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#include <sound/ac97_codec.h>
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2008-01-16 15:32:08 +08:00
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#include <sound/control.h>
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2007-12-24 02:50:57 +08:00
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "oxygen.h"
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2008-01-25 15:41:52 +08:00
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#include "ak4396.h"
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2008-03-19 15:14:01 +08:00
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#include "wm8785.h"
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2007-12-24 02:50:57 +08:00
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_DESCRIPTION("C-Media CMI8788 driver");
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2008-05-13 15:18:27 +08:00
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MODULE_LICENSE("GPL v2");
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2007-12-24 02:50:57 +08:00
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MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
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static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "card index");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string");
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module_param_array(enable, bool, NULL, 0444);
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MODULE_PARM_DESC(enable, "enable card");
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2008-09-22 14:57:24 +08:00
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enum {
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MODEL_CMEDIA_REF, /* C-Media's reference design */
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MODEL_MERIDIAN, /* AuzenTech X-Meridian */
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2009-03-09 16:12:55 +08:00
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MODEL_CLARO, /* HT-Omega Claro */
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MODEL_CLARO_HALO, /* HT-Omega Claro halo */
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2008-09-22 14:57:24 +08:00
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};
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2010-02-06 06:21:03 +08:00
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static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
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2008-09-22 14:57:24 +08:00
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
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2009-03-09 16:12:55 +08:00
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{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
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{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
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2007-12-24 02:50:57 +08:00
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{ }
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};
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MODULE_DEVICE_TABLE(pci, oxygen_ids);
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2008-01-21 15:50:19 +08:00
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#define GPIO_AK5385_DFS_MASK 0x0003
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#define GPIO_AK5385_DFS_NORMAL 0x0000
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#define GPIO_AK5385_DFS_DOUBLE 0x0001
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#define GPIO_AK5385_DFS_QUAD 0x0002
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2009-03-09 16:12:55 +08:00
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#define GPIO_CLARO_HP 0x0100
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2008-01-21 15:51:55 +08:00
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struct generic_data {
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2009-09-28 17:18:45 +08:00
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u8 ak4396_regs[4][5];
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2009-09-28 17:21:51 +08:00
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u16 wm8785_regs[3];
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2008-01-21 15:51:55 +08:00
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};
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2007-12-24 02:50:57 +08:00
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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{
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/* maps ALSA channel pair number to SPI output */
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static const u8 codec_spi_map[4] = {
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2008-01-14 15:55:03 +08:00
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0, 1, 2, 4
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2007-12-24 02:50:57 +08:00
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};
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2009-09-28 17:18:45 +08:00
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struct generic_data *data = chip->model_data;
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2008-01-18 16:17:53 +08:00
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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2007-12-24 02:50:57 +08:00
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OXYGEN_SPI_DATA_LENGTH_2 |
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2008-01-30 15:38:30 +08:00
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OXYGEN_SPI_CLOCK_160 |
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2007-12-24 02:50:57 +08:00
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(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
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2008-01-18 16:17:53 +08:00
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OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
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2007-12-24 02:50:57 +08:00
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AK4396_WRITE | (reg << 8) | value);
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2009-09-28 17:18:45 +08:00
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data->ak4396_regs[codec][reg] = value;
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}
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static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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{
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struct generic_data *data = chip->model_data;
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if (value != data->ak4396_regs[codec][reg])
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ak4396_write(chip, codec, reg, value);
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2007-12-24 02:50:57 +08:00
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}
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static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
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{
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2008-05-13 15:20:51 +08:00
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struct generic_data *data = chip->model_data;
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2008-01-18 16:17:53 +08:00
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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2007-12-24 02:50:57 +08:00
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OXYGEN_SPI_DATA_LENGTH_2 |
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2008-01-30 15:38:30 +08:00
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OXYGEN_SPI_CLOCK_160 |
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2008-01-18 16:17:53 +08:00
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(3 << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
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2007-12-24 02:50:57 +08:00
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(reg << 9) | value);
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2009-09-28 17:18:45 +08:00
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if (reg < ARRAY_SIZE(data->wm8785_regs))
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data->wm8785_regs[reg] = value;
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2008-05-13 15:21:48 +08:00
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}
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2008-05-13 15:22:43 +08:00
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static void ak4396_registers_init(struct oxygen *chip)
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2007-12-24 02:50:57 +08:00
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{
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2008-01-21 15:51:55 +08:00
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struct generic_data *data = chip->model_data;
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2007-12-24 02:50:57 +08:00
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unsigned int i;
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for (i = 0; i < 4; ++i) {
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2009-09-28 17:18:45 +08:00
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ak4396_write(chip, i, AK4396_CONTROL_1,
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AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i, AK4396_CONTROL_2,
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data->ak4396_regs[0][AK4396_CONTROL_2]);
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ak4396_write(chip, i, AK4396_CONTROL_3,
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AK4396_PCM);
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ak4396_write(chip, i, AK4396_LCH_ATT,
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chip->dac_volume[i * 2]);
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ak4396_write(chip, i, AK4396_RCH_ATT,
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chip->dac_volume[i * 2 + 1]);
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2007-12-24 02:50:57 +08:00
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}
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2008-05-13 15:22:43 +08:00
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}
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static void ak4396_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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2009-09-28 17:18:45 +08:00
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data->ak4396_regs[0][AK4396_CONTROL_2] =
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AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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2008-05-13 15:22:43 +08:00
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ak4396_registers_init(chip);
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2007-12-24 02:50:57 +08:00
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snd_component_add(chip->card, "AK4396");
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}
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static void ak5385_init(struct oxygen *chip)
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{
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2008-01-21 15:50:19 +08:00
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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2007-12-24 02:50:57 +08:00
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snd_component_add(chip->card, "AK5385");
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}
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2008-05-13 15:22:43 +08:00
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static void wm8785_registers_init(struct oxygen *chip)
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2007-12-24 02:50:57 +08:00
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{
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2008-05-13 15:20:51 +08:00
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struct generic_data *data = chip->model_data;
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2008-01-21 15:50:19 +08:00
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wm8785_write(chip, WM8785_R7, 0);
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2009-09-28 17:18:45 +08:00
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wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
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2009-09-28 17:21:51 +08:00
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wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
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2008-05-13 15:22:43 +08:00
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}
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2008-05-13 15:20:51 +08:00
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2008-05-13 15:22:43 +08:00
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static void wm8785_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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2009-09-28 17:18:45 +08:00
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data->wm8785_regs[0] =
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WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
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2009-09-28 17:21:51 +08:00
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data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
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2008-05-13 15:22:43 +08:00
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wm8785_registers_init(chip);
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2007-12-24 02:50:57 +08:00
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snd_component_add(chip->card, "WM8785");
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}
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static void generic_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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wm8785_init(chip);
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}
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static void meridian_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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ak5385_init(chip);
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}
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2009-03-09 16:12:55 +08:00
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static void claro_enable_hp(struct oxygen *chip)
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{
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msleep(300);
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
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oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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wm8785_init(chip);
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claro_enable_hp(chip);
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}
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static void claro_halo_init(struct oxygen *chip)
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2009-02-20 16:31:14 +08:00
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{
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ak4396_init(chip);
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ak5385_init(chip);
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2009-03-09 16:12:55 +08:00
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claro_enable_hp(chip);
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2009-02-20 16:31:14 +08:00
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}
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2007-12-24 02:50:57 +08:00
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static void generic_cleanup(struct oxygen *chip)
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{
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}
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2009-03-09 16:12:55 +08:00
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static void claro_disable_hp(struct oxygen *chip)
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{
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_cleanup(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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static void claro_suspend(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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2008-05-13 15:24:39 +08:00
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static void generic_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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wm8785_registers_init(chip);
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}
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2008-09-22 15:05:29 +08:00
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static void meridian_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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}
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2009-03-09 16:12:55 +08:00
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static void claro_resume(struct oxygen *chip)
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2009-02-20 16:31:14 +08:00
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{
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ak4396_registers_init(chip);
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2009-03-09 16:12:55 +08:00
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claro_enable_hp(chip);
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2009-02-20 16:31:14 +08:00
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}
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2007-12-24 02:50:57 +08:00
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static void set_ak4396_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
|
2008-01-21 15:51:55 +08:00
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struct generic_data *data = chip->model_data;
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2007-12-24 02:50:57 +08:00
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unsigned int i;
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u8 value;
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2009-09-28 17:18:45 +08:00
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value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
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2007-12-24 02:50:57 +08:00
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if (params_rate(params) <= 54000)
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value |= AK4396_DFS_NORMAL;
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2008-01-28 15:32:58 +08:00
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else if (params_rate(params) <= 108000)
|
2007-12-24 02:50:57 +08:00
|
|
|
value |= AK4396_DFS_DOUBLE;
|
|
|
|
else
|
|
|
|
value |= AK4396_DFS_QUAD;
|
2008-08-29 19:08:34 +08:00
|
|
|
|
|
|
|
msleep(1); /* wait for the new MCLK to become stable */
|
|
|
|
|
2009-09-28 17:18:45 +08:00
|
|
|
if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
|
|
|
|
for (i = 0; i < 4; ++i) {
|
|
|
|
ak4396_write(chip, i, AK4396_CONTROL_1,
|
|
|
|
AK4396_DIF_24_MSB);
|
|
|
|
ak4396_write(chip, i, AK4396_CONTROL_2, value);
|
|
|
|
ak4396_write(chip, i, AK4396_CONTROL_1,
|
|
|
|
AK4396_DIF_24_MSB | AK4396_RSTN);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void update_ak4396_volume(struct oxygen *chip)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
2007-12-24 02:50:57 +08:00
|
|
|
for (i = 0; i < 4; ++i) {
|
2009-09-28 17:18:45 +08:00
|
|
|
ak4396_write_cached(chip, i, AK4396_LCH_ATT,
|
|
|
|
chip->dac_volume[i * 2]);
|
|
|
|
ak4396_write_cached(chip, i, AK4396_RCH_ATT,
|
|
|
|
chip->dac_volume[i * 2 + 1]);
|
2007-12-24 02:50:57 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void update_ak4396_mute(struct oxygen *chip)
|
|
|
|
{
|
2008-01-21 15:51:55 +08:00
|
|
|
struct generic_data *data = chip->model_data;
|
2007-12-24 02:50:57 +08:00
|
|
|
unsigned int i;
|
|
|
|
u8 value;
|
|
|
|
|
2009-09-28 17:18:45 +08:00
|
|
|
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
|
2007-12-24 02:50:57 +08:00
|
|
|
if (chip->dac_mute)
|
|
|
|
value |= AK4396_SMUTE;
|
|
|
|
for (i = 0; i < 4; ++i)
|
2009-09-28 17:18:45 +08:00
|
|
|
ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
|
2007-12-24 02:50:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void set_wm8785_params(struct oxygen *chip,
|
|
|
|
struct snd_pcm_hw_params *params)
|
|
|
|
{
|
2009-09-28 17:18:45 +08:00
|
|
|
struct generic_data *data = chip->model_data;
|
2007-12-24 02:50:57 +08:00
|
|
|
unsigned int value;
|
|
|
|
|
2008-01-21 15:50:19 +08:00
|
|
|
value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
|
2008-01-21 15:50:51 +08:00
|
|
|
if (params_rate(params) <= 48000)
|
|
|
|
value |= WM8785_OSR_SINGLE;
|
|
|
|
else if (params_rate(params) <= 96000)
|
2007-12-24 02:50:57 +08:00
|
|
|
value |= WM8785_OSR_DOUBLE;
|
|
|
|
else
|
2008-01-21 15:50:51 +08:00
|
|
|
value |= WM8785_OSR_QUAD;
|
2009-09-28 17:18:45 +08:00
|
|
|
if (value != data->wm8785_regs[0]) {
|
|
|
|
wm8785_write(chip, WM8785_R7, 0);
|
|
|
|
wm8785_write(chip, WM8785_R0, value);
|
2009-09-28 17:21:51 +08:00
|
|
|
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
|
2009-09-28 17:18:45 +08:00
|
|
|
}
|
2007-12-24 02:50:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void set_ak5385_params(struct oxygen *chip,
|
|
|
|
struct snd_pcm_hw_params *params)
|
|
|
|
{
|
|
|
|
unsigned int value;
|
|
|
|
|
|
|
|
if (params_rate(params) <= 54000)
|
2008-01-21 15:50:19 +08:00
|
|
|
value = GPIO_AK5385_DFS_NORMAL;
|
2007-12-24 02:50:57 +08:00
|
|
|
else if (params_rate(params) <= 108000)
|
2008-01-21 15:50:19 +08:00
|
|
|
value = GPIO_AK5385_DFS_DOUBLE;
|
2007-12-24 02:50:57 +08:00
|
|
|
else
|
2008-01-21 15:50:19 +08:00
|
|
|
value = GPIO_AK5385_DFS_QUAD;
|
|
|
|
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
|
|
|
|
value, GPIO_AK5385_DFS_MASK);
|
2007-12-24 02:50:57 +08:00
|
|
|
}
|
|
|
|
|
2009-09-28 17:21:21 +08:00
|
|
|
static int rolloff_info(struct snd_kcontrol *ctl,
|
|
|
|
struct snd_ctl_elem_info *info)
|
|
|
|
{
|
|
|
|
static const char *const names[2] = {
|
|
|
|
"Sharp Roll-off", "Slow Roll-off"
|
|
|
|
};
|
|
|
|
|
|
|
|
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
|
|
|
|
info->count = 1;
|
|
|
|
info->value.enumerated.items = 2;
|
|
|
|
if (info->value.enumerated.item >= 2)
|
|
|
|
info->value.enumerated.item = 1;
|
|
|
|
strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rolloff_get(struct snd_kcontrol *ctl,
|
|
|
|
struct snd_ctl_elem_value *value)
|
|
|
|
{
|
|
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
|
|
|
|
value->value.enumerated.item[0] =
|
|
|
|
(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rolloff_put(struct snd_kcontrol *ctl,
|
|
|
|
struct snd_ctl_elem_value *value)
|
|
|
|
{
|
|
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
unsigned int i;
|
|
|
|
int changed;
|
|
|
|
u8 reg;
|
|
|
|
|
|
|
|
mutex_lock(&chip->mutex);
|
|
|
|
reg = data->ak4396_regs[0][AK4396_CONTROL_2];
|
|
|
|
if (value->value.enumerated.item[0])
|
|
|
|
reg |= AK4396_SLOW;
|
|
|
|
else
|
|
|
|
reg &= ~AK4396_SLOW;
|
|
|
|
changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
|
|
|
|
if (changed) {
|
|
|
|
for (i = 0; i < 4; ++i)
|
|
|
|
ak4396_write(chip, i, AK4396_CONTROL_2, reg);
|
|
|
|
}
|
|
|
|
mutex_unlock(&chip->mutex);
|
|
|
|
return changed;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new rolloff_control = {
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
|
|
.name = "DAC Filter Playback Enum",
|
|
|
|
.info = rolloff_info,
|
|
|
|
.get = rolloff_get,
|
|
|
|
.put = rolloff_put,
|
|
|
|
};
|
|
|
|
|
2009-09-28 17:21:51 +08:00
|
|
|
static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
|
|
|
|
{
|
|
|
|
static const char *const names[2] = {
|
|
|
|
"None", "High-pass Filter"
|
|
|
|
};
|
|
|
|
|
|
|
|
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
|
|
|
|
info->count = 1;
|
|
|
|
info->value.enumerated.items = 2;
|
|
|
|
if (info->value.enumerated.item >= 2)
|
|
|
|
info->value.enumerated.item = 1;
|
|
|
|
strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
|
|
|
|
{
|
|
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
|
|
|
|
value->value.enumerated.item[0] =
|
|
|
|
(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
|
|
|
|
{
|
|
|
|
struct oxygen *chip = ctl->private_data;
|
|
|
|
struct generic_data *data = chip->model_data;
|
|
|
|
unsigned int reg;
|
|
|
|
int changed;
|
|
|
|
|
|
|
|
mutex_lock(&chip->mutex);
|
|
|
|
reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
|
|
|
|
if (value->value.enumerated.item[0])
|
|
|
|
reg |= WM8785_HPFR | WM8785_HPFL;
|
|
|
|
changed = reg != data->wm8785_regs[WM8785_R2];
|
|
|
|
if (changed)
|
|
|
|
wm8785_write(chip, WM8785_R2, reg);
|
|
|
|
mutex_unlock(&chip->mutex);
|
|
|
|
return changed;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new hpf_control = {
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
|
|
.name = "ADC Filter Capture Enum",
|
|
|
|
.info = hpf_info,
|
|
|
|
.get = hpf_get,
|
|
|
|
.put = hpf_put,
|
|
|
|
};
|
|
|
|
|
2009-09-28 17:21:21 +08:00
|
|
|
static int generic_mixer_init(struct oxygen *chip)
|
|
|
|
{
|
|
|
|
return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
|
|
|
|
}
|
|
|
|
|
2009-09-28 17:21:51 +08:00
|
|
|
static int generic_wm8785_mixer_init(struct oxygen *chip)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = generic_mixer_init(chip);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-12-24 02:50:57 +08:00
|
|
|
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
|
|
|
|
|
|
|
|
static const struct oxygen_model model_generic = {
|
|
|
|
.shortname = "C-Media CMI8788",
|
|
|
|
.longname = "C-Media Oxygen HD Audio",
|
|
|
|
.chip = "CMI8788",
|
|
|
|
.init = generic_init,
|
2009-09-28 17:21:51 +08:00
|
|
|
.mixer_init = generic_wm8785_mixer_init,
|
2007-12-24 02:50:57 +08:00
|
|
|
.cleanup = generic_cleanup,
|
2008-05-13 15:24:39 +08:00
|
|
|
.resume = generic_resume,
|
2009-09-28 17:20:11 +08:00
|
|
|
.get_i2s_mclk = oxygen_default_i2s_mclk,
|
2007-12-24 02:50:57 +08:00
|
|
|
.set_dac_params = set_ak4396_params,
|
|
|
|
.set_adc_params = set_wm8785_params,
|
|
|
|
.update_dac_volume = update_ak4396_volume,
|
|
|
|
.update_dac_mute = update_ak4396_mute,
|
2008-04-16 15:15:45 +08:00
|
|
|
.dac_tlv = ak4396_db_scale,
|
2008-01-21 15:51:55 +08:00
|
|
|
.model_data_size = sizeof(struct generic_data),
|
2008-09-22 15:02:08 +08:00
|
|
|
.device_config = PLAYBACK_0_TO_I2S |
|
|
|
|
PLAYBACK_1_TO_SPDIF |
|
|
|
|
PLAYBACK_2_TO_AC97_1 |
|
|
|
|
CAPTURE_0_FROM_I2S_1 |
|
|
|
|
CAPTURE_1_FROM_SPDIF |
|
|
|
|
CAPTURE_2_FROM_AC97_1,
|
2008-01-25 15:37:49 +08:00
|
|
|
.dac_channels = 8,
|
2008-04-16 15:13:36 +08:00
|
|
|
.dac_volume_min = 0,
|
|
|
|
.dac_volume_max = 255,
|
2008-03-19 15:20:13 +08:00
|
|
|
.function_flags = OXYGEN_FUNCTION_SPI |
|
|
|
|
OXYGEN_FUNCTION_ENABLE_SPI_4_5,
|
2008-01-17 16:05:09 +08:00
|
|
|
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
|
|
|
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
2007-12-24 02:50:57 +08:00
|
|
|
};
|
|
|
|
|
2009-02-19 15:42:44 +08:00
|
|
|
static int __devinit get_oxygen_model(struct oxygen *chip,
|
|
|
|
const struct pci_device_id *id)
|
|
|
|
{
|
|
|
|
chip->model = model_generic;
|
|
|
|
switch (id->driver_data) {
|
|
|
|
case MODEL_MERIDIAN:
|
|
|
|
chip->model.init = meridian_init;
|
2009-09-28 17:21:51 +08:00
|
|
|
chip->model.mixer_init = generic_mixer_init;
|
2009-02-19 15:42:44 +08:00
|
|
|
chip->model.resume = meridian_resume;
|
|
|
|
chip->model.set_adc_params = set_ak5385_params;
|
|
|
|
chip->model.device_config = PLAYBACK_0_TO_I2S |
|
|
|
|
PLAYBACK_1_TO_SPDIF |
|
|
|
|
CAPTURE_0_FROM_I2S_2 |
|
|
|
|
CAPTURE_1_FROM_SPDIF;
|
|
|
|
break;
|
2009-03-09 16:12:55 +08:00
|
|
|
case MODEL_CLARO:
|
|
|
|
chip->model.init = claro_init;
|
|
|
|
chip->model.cleanup = claro_cleanup;
|
|
|
|
chip->model.suspend = claro_suspend;
|
|
|
|
chip->model.resume = claro_resume;
|
|
|
|
break;
|
|
|
|
case MODEL_CLARO_HALO:
|
|
|
|
chip->model.init = claro_halo_init;
|
2009-09-28 17:21:51 +08:00
|
|
|
chip->model.mixer_init = generic_mixer_init;
|
2009-03-09 16:12:55 +08:00
|
|
|
chip->model.cleanup = claro_cleanup;
|
|
|
|
chip->model.suspend = claro_suspend;
|
|
|
|
chip->model.resume = claro_resume;
|
2009-02-20 16:31:14 +08:00
|
|
|
chip->model.set_adc_params = set_ak5385_params;
|
2010-09-22 17:07:41 +08:00
|
|
|
chip->model.device_config = PLAYBACK_0_TO_I2S |
|
|
|
|
PLAYBACK_1_TO_SPDIF |
|
|
|
|
CAPTURE_0_FROM_I2S_2 |
|
|
|
|
CAPTURE_1_FROM_SPDIF;
|
2009-02-20 16:31:14 +08:00
|
|
|
break;
|
2009-02-19 15:42:44 +08:00
|
|
|
}
|
|
|
|
if (id->driver_data == MODEL_MERIDIAN ||
|
2009-03-09 16:12:55 +08:00
|
|
|
id->driver_data == MODEL_CLARO_HALO) {
|
2009-02-19 15:42:44 +08:00
|
|
|
chip->model.misc_flags = OXYGEN_MISC_MIDI;
|
|
|
|
chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-12-24 02:50:57 +08:00
|
|
|
static int __devinit generic_oxygen_probe(struct pci_dev *pci,
|
|
|
|
const struct pci_device_id *pci_id)
|
|
|
|
{
|
|
|
|
static int dev;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (dev >= SNDRV_CARDS)
|
|
|
|
return -ENODEV;
|
|
|
|
if (!enable[dev]) {
|
|
|
|
++dev;
|
|
|
|
return -ENOENT;
|
|
|
|
}
|
2009-02-19 15:37:13 +08:00
|
|
|
err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
|
2009-02-19 15:42:44 +08:00
|
|
|
oxygen_ids, get_oxygen_model);
|
2007-12-24 02:50:57 +08:00
|
|
|
if (err >= 0)
|
|
|
|
++dev;
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pci_driver oxygen_driver = {
|
|
|
|
.name = "CMI8788",
|
|
|
|
.id_table = oxygen_ids,
|
|
|
|
.probe = generic_oxygen_probe,
|
|
|
|
.remove = __devexit_p(oxygen_pci_remove),
|
2008-05-13 15:24:39 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
.suspend = oxygen_pci_suspend,
|
|
|
|
.resume = oxygen_pci_resume,
|
|
|
|
#endif
|
2007-12-24 02:50:57 +08:00
|
|
|
};
|
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static int __init alsa_card_oxygen_init(void)
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|
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|
{
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return pci_register_driver(&oxygen_driver);
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}
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static void __exit alsa_card_oxygen_exit(void)
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{
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pci_unregister_driver(&oxygen_driver);
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}
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module_init(alsa_card_oxygen_init)
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module_exit(alsa_card_oxygen_exit)
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