Merge tag 'omap-for-v5.3/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

dts changes for omap variants for v5.3

This series of changes improves support for few boards:

- configure another lcd type for logicpd torpedo devkit

- a series of updates for am335x phytec boards

- configure mmc card detect pin for am335x-baltos

* tag 'omap-for-v5.3/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-baltos: add support for MMC1 CD pin
  ARM: dts: am335x-baltos: Fix PHY mode for ethernet
  ARM: dts: Add support for phyBOARD-REGOR-AM335x
  ARM: dts: am335x-pcm-953: Remove eth phy delay
  ARM: dts: am335x-pcm-953: Update user led names
  ARM: dts: am335x-phycore-som: Enable gpmc node in dts files
  ARM: dts: am335x-phycore-som: Add emmc node
  ARM: dts: am335x phytec boards: Remove regulator node
  ARM: dts: Add LCD type 28 support to LogicPD Torpedo DM3730 devkit

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-19 06:25:29 -07:00
commit 0164a087a6
13 changed files with 372 additions and 45 deletions

View File

@ -160,6 +160,9 @@ Boards:
- AM335X phyCORE-AM335x: Development kit - AM335X phyCORE-AM335x: Development kit
compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx" compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"
- AM335x phyBOARD-REGOR: Single Board Computer
compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx"
- AM335X UC-8100-ME-T: Communication-centric industrial computing platform - AM335X UC-8100-ME-T: Communication-centric industrial computing platform
compatible = "moxa,uc-8100-me-t", "ti,am33xx"; compatible = "moxa,uc-8100-me-t", "ti,am33xx";

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@ -748,6 +748,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pepper.dtb \ am335x-pepper.dtb \
am335x-phycore-rdk.dtb \ am335x-phycore-rdk.dtb \
am335x-pocketbeagle.dtb \ am335x-pocketbeagle.dtb \
am335x-regor-rdk.dtb \
am335x-sancloud-bbe.dtb \ am335x-sancloud-bbe.dtb \
am335x-shc.dtb \ am335x-shc.dtb \
am335x-sbc-t335.dtb \ am335x-sbc-t335.dtb \

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@ -33,6 +33,12 @@ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_p
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
>; >;
}; };
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
}; };
&uart1 { &uart1 {
@ -68,7 +74,13 @@ &cpsw_emac0 {
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-mode = "rgmii-txid"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
phy-handle = <&phy1>; phy-handle = <&phy1>;
}; };
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};

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@ -54,6 +54,12 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
>; >;
}; };
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
}; };
&uart1 { &uart1 {
@ -110,7 +116,13 @@ fixed-link {
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-mode = "rgmii-txid"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
phy-handle = <&phy1>; phy-handle = <&phy1>;
}; };
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};

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@ -63,6 +63,11 @@ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mca
>; >;
}; };
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
}; };
&uart1 { &uart1 {
@ -128,7 +133,7 @@ fixed-link {
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-mode = "rgmii-txid"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
phy-handle = <&phy1>; phy-handle = <&phy1>;
}; };
@ -139,3 +144,9 @@ &dcan1 {
status = "okay"; status = "okay";
}; };
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};

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@ -39,15 +39,13 @@ user_leds: user_leds {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>; pinctrl-0 = <&user_leds_pins>;
green { user-led0 {
label = "green:user";
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio"; linux,default-trigger = "gpio";
default-state = "on"; default-state = "on";
}; };
yellow { user-led1 {
label = "yellow:user";
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
linux,default-trigger = "gpio"; linux,default-trigger = "gpio";
default-state = "on"; default-state = "on";
@ -138,22 +136,6 @@ &cpsw_emac1 {
&davinci_mdio { &davinci_mdio {
phy1: ethernet-phy@2 { phy1: ethernet-phy@2 {
reg = <2>; reg = <2>;
/* Register 260 (104h) RGMII Clock and Control Pad Skew */
rxc-skew-ps = <1400>;
rxdv-skew-ps = <0>;
txc-skew-ps = <1400>;
txen-skew-ps = <0>;
/* Register 261 (105h) RGMII RX Data Pad Skew */
rxd3-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd0-skew-ps = <0>;
/* Register 262 (106h) RGMII TX Data Pad Skew */
txd3-skew-ps = <0>;
txd2-skew-ps = <0>;
txd1-skew-ps = <0>;
txd0-skew-ps = <0>;
}; };
}; };

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@ -13,6 +13,10 @@
#include "am335x-pcm-953.dtsi" #include "am335x-pcm-953.dtsi"
/* SoM */ /* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom { &i2c_eeprom {
status = "okay"; status = "okay";
}; };

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@ -30,17 +30,13 @@ memory@80000000 {
reg = <0x80000000 0x10000000>; /* 256 MB */ reg = <0x80000000 0x10000000>; /* 256 MB */
}; };
regulators { vcc5v: fixedregulator0 {
compatible = "simple-bus"; compatible = "regulator-fixed";
regulator-name = "vcc5v";
vcc5v: fixedregulator0 { regulator-min-microvolt = <5000000>;
compatible = "regulator-fixed"; regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v"; regulator-boot-on;
regulator-min-microvolt = <5000000>; regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
}; };
}; };
@ -53,6 +49,33 @@ &sham {
status = "okay"; status = "okay";
}; };
/* EMMC */
&am33xx_pinmux {
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
ti,non-removable;
status = "disabled";
};
/* Ethernet */ /* Ethernet */
&am33xx_pinmux { &am33xx_pinmux {
ethernet0_pins: pinmux_ethernet0 { ethernet0_pins: pinmux_ethernet0 {
@ -167,7 +190,7 @@ &elm {
}; };
&gpmc { &gpmc {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>; pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */ ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */

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@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/dts-v1/;
#include "am335x-phycore-som.dtsi"
#include "am335x-regor.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};
&serial_flash {
status = "okay";
};

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@ -0,0 +1,223 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/ {
model = "Phytec AM335x phyBOARD-REGOR";
compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
vcc3v3: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
/* User IO */
user_leds: user_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
run_stop-led {
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
error-led {
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
};
};
/* User Leds */
&am33xx_pinmux {
user_leds_pins: pinmux_user_leds {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
>;
};
};
/* CAN Busses */
&am33xx_pinmux {
dcan1_pins: pinmux_dcan1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
>;
};
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
/* Ethernet */
&am33xx_pinmux {
ethernet1_pins: pinmux_ethernet1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1) /* gpmc_a2.mii2_txd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1) /* gpmc_a3.mii2_txd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1) /* gpmc_a4.mii2_txd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1) /* gpmc_a5.mii2_txd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a6.mii2_txclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a7.mii2_rxclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_ben1.mii2_col */
>;
};
};
&cpsw_emac1 {
phy-handle = <&phy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mac {
slaves = <2>;
pinctrl-names = "default";
pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
dual_emac = <1>;
};
/* GPIOs */
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&user_gpios_pins>;
user_gpios_pins: pinmux_user_gpios {
pinctrl-single,pins = <
/* DIGIN 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) /* gpmc_ad8.gpio0_22 */
/* DIGOUT 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad15.gpio1_15 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad14.gpio1_14 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad13.gpio1_13 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad12.gpio1_12 */
>;
};
};
/* MMC */
&am33xx_pinmux {
mmc1_pins: pinmux_mmc1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
>;
};
};
&mmc1 {
vmmc-supply = <&vcc3v3>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
/* RTC */
&i2c_rtc {
status = "okay";
};
/* UARTs */
&am33xx_pinmux {
uart0_pins: pinmux_uart0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
/* RS485 - UART1 */
&am33xx_pinmux {
uart1_rs485_pins: pinmux_uart1_rs485_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_rs485_pins>;
status = "okay";
linux,rs485-enabled-at-boot-time;
};
/* USB */
&cppi41dma {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb0_phy {
status = "okay";
};

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@ -13,6 +13,10 @@
#include "am335x-wega.dtsi" #include "am335x-wega.dtsi"
/* SoM */ /* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom { &i2c_eeprom {
status = "okay"; status = "okay";
}; };

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@ -15,16 +15,12 @@ sound: sound_iface {
compatible = "ti,da830-evm-audio"; compatible = "ti,da830-evm-audio";
}; };
regulators { vcc3v3: fixedregulator1 {
compatible = "simple-bus"; compatible = "regulator-fixed";
regulator-name = "vcc3v3";
vcc3v3: fixedregulator1 { regulator-min-microvolt = <3300000>;
compatible = "regulator-fixed"; regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3"; regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
}; };
}; };

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@ -0,0 +1,32 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/*
* There are two types of 4.3" LCD, Type 15 and Type 28.
* By default, type 15 was used. This device tree file
* uses the timing for the type 28 LCD
*/
#include "logicpd-torpedo-37xx-devkit.dts"
&lcd0 {
label = "28";
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <3>;
hback-porch = <2>;
hsync-len = <42>;
vback-porch = <3>;
vfront-porch = <2>;
vsync-len = <11>;
hsync-active = <1>;
vsync-active = <1>;
de-active = <1>;
pixelclk-active = <0>;
};
};