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Device tree related changes for omaps with minor code 

changes also to platform data quirks that are still needed
 for some features.
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Merge tag 'omap-for-v3.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

OMAP device tree changes from Tony Lindgren:

Device tree related changes for omaps with minor code
changes also to platform data quirks that are still needed
for some features.

* tag 'omap-for-v3.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (60 commits)
  ARM: dts: omap4+: Add DMM bindings
  ARM: dts: am43x-gp-evm: Add matrix gpio keys.
  ARM: dts: am43xx: add support for parallel NAND flash
  ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
  ARM: dts: am335x-evm: NAND: update MTD partition table
  ARM: OMAP2+: gpmc: update gpmc_hwecc_bch_capable() for new platforms and ECC schemes
  ARM: dts: omap3-gta04: Add bma180 accelerometer
  ARM: dts: omap3-gta04: Enable mmc2 for wifi
  ARM: dts: omap3-gta04: Add basic sound support
  ARM: dts: omap3-gta04: Add twl4030 charger
  ARM: dts: omap3-gta04: Add touchscreen properties
  ARM: dts: omap3-gta04: Add support for magnetometer
  ARM: dts: am437x-gp-evm: Enable gpio.
  ARM: dts: am437x-gp-evm: Add pwm backlight support.
  ARM: dts: am437x-gp-evm: Add gp dts.
  ARM: dts: am43x-epos-evm: Add SPI data.
  ARM: dts: am43x-epos-evm: Add I2C2 data.
  pinctrl: am43xx: dt-bindings: add MUX_MODE8
  ARM: dts: am43x-epos-evm: Add pwm backlight support.
  ARM: dts: am4372: Add pwm-cells property for ecap device.
  ...
This commit is contained in:
Olof Johansson 2014-03-08 23:19:06 -08:00
parent 86a37e52bb f777ba1780
commit 20bb468598
44 changed files with 2020 additions and 169 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/devicetree/bindings/arm/omap/dmm.txt Normal file
View File

@ -0,0 +1,22 @@
OMAP Dynamic Memory Manager (DMM) bindings
The dynamic memory manager (DMM) is a module located immediately in front of the
SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
accesses such as priority generation amongst initiators, configuration of SDRAM
interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
translation for initiators which need contiguous dma bus addresses.
Required properties:
- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
- reg: Contains DMM register address range (base address and length)
- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
Example:
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
ti,hwmods = "dmm";
};

3
Documentation/devicetree/bindings/arm/omap/omap.txt
View File

@ -114,5 +114,8 @@ Boards:
- AM43x EPOS EVM
compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
- AM437x GP EVM
compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"
- DRA7 EVM: Software Developement Board for DRA7XX
compatible = "ti,dra7-evm", "ti,dra7"

7
arch/arm/boot/dts/Makefile
View File

@ -228,6 +228,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap2420-n810-wimax.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
omap3-cm-t3517.dtb \
omap3-sbc-t3517.dtb \
omap3-cm-t3530.dtb \
omap3-sbc-t3530.dtb \
omap3-cm-t3730.dtb \
omap3-sbc-t3730.dtb \
omap3-devkit8000.dtb \
@ -242,6 +246,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-gta04.dtb \
omap3-igep0020.dtb \
omap3-igep0030.dtb \
omap3-lilly-dbb056.dtb \
omap3-zoom3.dtb \
omap4-panda.dtb \
omap4-panda-a4.dtb \
@ -256,9 +261,11 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am335x-boneblack.dtb \
am335x-nano.dtb \
am335x-base0033.dtb \
am3517-craneboard.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb

51
arch/arm/boot/dts/am335x-evm.dts
View File

@ -434,9 +434,9 @@ &gpmc {
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
@ -460,50 +460,51 @@ nand@0,0 {
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL1";
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "SPL2";
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "SPL3";
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "SPL4";
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
label = "NAND.u-boot-spl";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "environment";
reg = <0x00260000 0x00020000>;
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
partition@6 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
partition@7 {
label = "File-System";
reg = <0x00780000 0x0F880000>;
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00A00000 0x0F600000>;
};
};
};

11
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -121,7 +121,7 @@ sound {
ti,model = "AM335x-EVMSK";
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <24576000>;
ti,codec-clock-rate = <24000000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT";
@ -336,9 +336,18 @@ usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
};
&epwmss2 {

13
arch/arm/boot/dts/am33xx.dtsi
View File

@ -58,6 +58,10 @@ cpu@0 {
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
@ -318,6 +322,7 @@ hwspinlock: spinlock@480ca000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x480ca000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
wdt2: wdt@44e35000 {
@ -399,7 +404,7 @@ timer7: timer@4804a000 {
ti,timer-pwm;
};
rtc@44e3e000 {
rtc: rtc@44e3e000 {
compatible = "ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <75
@ -582,6 +587,8 @@ ecap0: ecap@48300100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
interrupts = <31>;
interrupt-names = "ecap0";
ti,hwmods = "ecap0";
status = "disabled";
};
@ -610,6 +617,8 @@ ecap1: ecap@48302100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
interrupts = <47>;
interrupt-names = "ecap1";
ti,hwmods = "ecap1";
status = "disabled";
};
@ -638,6 +647,8 @@ ecap2: ecap@48304100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
interrupts = <61>;
interrupt-names = "ecap2";
ti,hwmods = "ecap2";
status = "disabled";
};

174
arch/arm/boot/dts/am3517-craneboard.dts Normal file
View File

@ -0,0 +1,174 @@
/*
* See craneboard.org for more details
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am3517.dtsi"
/ {
model = "TI AM3517 CraneBoard (TMDSEVM3517)";
compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
};
&davinci_emac {
status = "okay";
};
&davinci_mdio {
status = "okay";
};
&i2c1 {
clock-frequency = <2600000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&i2c2 {
clock-frequency = <400000>;
/* goes to expansion connector */
status = "disabled";
};
&i2c3 {
clock-frequency = <400000>;
/* goes to expansion connector */
status = "disabled";
};
&mmc1 {
vmmc-supply = <&vdd2_reg>;
bus-width = <8>;
};
&mmc2 {
/* goes to expansion connector */
status = "disabled";
};
&mmc3 {
/* goes to expansion connector */
status = "disabled";
};
#include "tps65910.dtsi"
&omap3_pmx_core {
tps_pins: pinmux_tps_pins {
pinctrl-single,pins = <
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
>;
};
};
&tps {
pinctrl-names = "default";
pinctrl-0 = <&tps_pins>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
ti,en-ck32k-xtal;
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
/*
* Unused:
* VDIG1=2.7V,300mA max
* VDIG2=1.8V,300mA max
*/
vpll_reg: regulator@7 {
/* VDDS_DPLL_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vaux1_reg: regulator@9 {
/* VDDS_SRAM_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vaux2_reg: regulator@10 {
/* VDDA1P8V_USBPHY */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
/* VAUX33 unused */
vdac_reg: regulator@8 {
/* VDDA_DAC_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vmmc_reg: regulator@12 {
/* VDDA3P3V_USBPHY */
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_CORE */
regulator-name = "vdd_core";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDDSHV_3V3 */
regulator-name = "vdd_shv";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* VDD3 unused */
};
};

45
arch/arm/boot/dts/am4372.dtsi
View File

@ -33,6 +33,11 @@ cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
@ -351,6 +356,13 @@ gpio5: gpio@48322000 {
status = "disabled";
};
hwspinlock: spinlock@480ca000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x480ca000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
i2c0: i2c@44e0b000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x44e0b000 0x1000>;
@ -521,6 +533,7 @@ epwmss0: epwmss@48300000 {
ecap0: ecap@48300100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
ti,hwmods = "ecap0";
status = "disabled";
@ -528,6 +541,7 @@ ecap0: ecap@48300100 {
ehrpwm0: ehrpwm@48300200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48300200 0x80>;
ti,hwmods = "ehrpwm0";
status = "disabled";
@ -545,6 +559,7 @@ epwmss1: epwmss@48302000 {
ecap1: ecap@48302100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
ti,hwmods = "ecap1";
status = "disabled";
@ -552,6 +567,7 @@ ecap1: ecap@48302100 {
ehrpwm1: ehrpwm@48302200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48302200 0x80>;
ti,hwmods = "ehrpwm1";
status = "disabled";
@ -569,6 +585,7 @@ epwmss2: epwmss@48304000 {
ecap2: ecap@48304100 {
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
ti,hwmods = "ecap2";
status = "disabled";
@ -576,6 +593,7 @@ ecap2: ecap@48304100 {
ehrpwm2: ehrpwm@48304200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48304200 0x80>;
ti,hwmods = "ehrpwm2";
status = "disabled";
@ -593,6 +611,7 @@ epwmss3: epwmss@48306000 {
ehrpwm3: ehrpwm@48306200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48306200 0x80>;
ti,hwmods = "ehrpwm3";
status = "disabled";
@ -610,6 +629,7 @@ epwmss4: epwmss@48308000 {
ehrpwm4: ehrpwm@48308200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48308200 0x80>;
ti,hwmods = "ehrpwm4";
status = "disabled";
@ -627,6 +647,7 @@ epwmss5: epwmss@4830a000 {
ehrpwm5: ehrpwm@4830a200 {
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x4830a200 0x80>;
ti,hwmods = "ehrpwm5";
status = "disabled";
@ -689,6 +710,30 @@ mcasp1: mcasp@4803C000 {
<&edma 11>;
dma-names = "tx", "rx";
};
elm: elm@48080000 {
compatible = "ti,am3352-elm";
reg = <0x48080000 0x2000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "elm";
clocks = <&l4ls_gclk>;
clock-names = "fck";
status = "disabled";
};
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
clocks = <&l3s_gclk>;
clock-names = "fck";
reg = <0x50000000 0x2000>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";
};
};
};

100
arch/arm/boot/dts/am437x-gp-evm.dts Normal file
View File

@ -0,0 +1,100 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* AM437x GP EVM */
/dts-v1/;
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "TI AM437x GP EVM";
compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
matrix_keypad: matrix_keypad@0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
&gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
&gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
&gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
linux,keymap = <0x00000201 /* P1 */
0x00010202 /* P2 */
0x01000067 /* UP */
0x0101006a /* RIGHT */
0x02000069 /* LEFT */
0x0201006c>; /* DOWN */
};
};
&am43xx_pinmux {
i2c0_pins: i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: i2c1_pins {
pinctrl-single,pins = <
0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
&gpio3 {
status = "okay";
};
&gpio4 {
status = "okay";
};

174
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -13,6 +13,7 @@
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "TI AM43x EPOS EVM";
@ -79,6 +80,58 @@ i2c0_pins: pinmux_i2c0_pins {
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
nand_flash_x8: nand_flash_x8 {
pinctrl-single,pins = <
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
0x0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x1c0 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
0x1c4 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
0x150 (PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
0x154 (PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
0x158 (PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
0x190 (PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
0x194 (PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
0x198 (PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
0x19c (PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
>;
};
};
matrix_keypad: matrix_keypad@0 {
@ -113,6 +166,13 @@ &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
0x0203006c /* DOWN */
0x03030069>; /* LEFT */
};
backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
};
&mmc1 {
@ -169,6 +229,12 @@ pixcir_ts@5c {
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&gpio0 {
status = "okay";
};
@ -184,3 +250,111 @@ &gpio2 {
&gpio3 {
status = "okay";
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
gpmc,cs-wr-off-ns = <40>;
gpmc,adv-on-ns = <0>; /* cs-on-ns */
gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
gpmc,we-on-ns = <0>; /* cs-on-ns */
gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
gpmc,access-ns = <30>; /* tCEA + 4*/
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x00040000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00040000 0x00040000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00080000 0x00040000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x000C0000 0x00040000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00100000 0x00080000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x00180000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x00280000 0x00040000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x002C0000 0x00040000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00300000 0x00700000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00800000 0x1F600000>;
};
};
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
};

19
arch/arm/boot/dts/dra7.dtsi
View File

@ -47,6 +47,11 @@ cpu0: cpu@0 {
1000000 1060000
1176000 1160000
>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
cpu@1 {
device_type = "cpu";
@ -464,6 +469,20 @@ wdt2: wdt@4ae14000 {
ti,hwmods = "wd_timer2";
};
hwspinlock: spinlock@4a0f6000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x4a0f6000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
dmm@4e000000 {
compatible = "ti,omap5-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;

2
arch/arm/boot/dts/omap2420.dtsi
View File

@ -99,6 +99,7 @@ mcbsp1: mcbsp@48074000 {
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp2: mcbsp@48076000 {
@ -112,6 +113,7 @@ mcbsp2: mcbsp@48076000 {
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
status = "disabled";
};
msdi1: mmc@4809c000 {

5
arch/arm/boot/dts/omap2430.dtsi
View File

@ -113,6 +113,7 @@ mcbsp1: mcbsp@48074000 {
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp2: mcbsp@48076000 {
@ -128,6 +129,7 @@ mcbsp2: mcbsp@48076000 {
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp3: mcbsp@4808c000 {
@ -143,6 +145,7 @@ mcbsp3: mcbsp@4808c000 {
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp4: mcbsp@4808e000 {
@ -158,6 +161,7 @@ mcbsp4: mcbsp@4808e000 {
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp5: mcbsp@48096000 {
@ -173,6 +177,7 @@ mcbsp5: mcbsp@48096000 {
dmas = <&sdma 21>,
<&sdma 22>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc1: mmc@4809c000 {

4
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -234,3 +234,7 @@ &vaux2 {
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
&mcbsp2 {
status = "okay";
};

4
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -211,3 +211,7 @@ &vaux2 {
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
&mcbsp2 {
status = "okay";
};

136
arch/arm/boot/dts/omap3-cm-t3517.dts Normal file
View File

@ -0,0 +1,136 @@
/*
* Support for CompuLab CM-T3517
*/
/dts-v1/;
#include "am3517.dtsi"
#include "omap3-cm-t3x.dtsi"
/ {
model = "CompuLab CM-T3517";
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";
regulator-name = "vw1271";
pinctrl-names = "default";
pinctrl-0 = <
&wl12xx_wkup_pins
&wl12xx_core_pins
>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
startup-delay-us = <20000>;
enable-active-high;
};
wl12xx_vaux2: wl12xx_vaux2 {
compatible = "regulator-fixed";
regulator-name = "vwl1271_vaux2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&omap3_pmx_wkup {
wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
>;
};
};
&omap3_pmx_core {
phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
>;
};
phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
>;
};
otg_drv_vbus: pinmux_otg_drv_vbus {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
>;
};
wl12xx_core_pins: pinmux_wl12xx_core_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
>;
};
usb_hub_pins: pinmux_usb_hub_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
>;
};
};
&hsusb1_phy {
pinctrl-names = "default";
pinctrl-0 = <&phy1_reset_pins>;
reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
};
&hsusb2_phy {
pinctrl-names = "default";
pinctrl-0 = <&phy2_reset_pins>;
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
};
&davinci_emac {
status = "okay";
};
&davinci_mdio {
status = "okay";
};
&am35x_otg_hs {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&otg_drv_vbus>;
};
&mmc1 {
vmmc-supply = <&vmmc>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&wl12xx_vmmc2>;
vmmc_aux-supply = <&wl12xx_vaux2>;
non-removable;
bus-width = <4>;
cap-power-off-card;
};

12
arch/arm/boot/dts/omap3-cm-t3530.dts Normal file
View File

@ -0,0 +1,12 @@
/*
* Support for CompuLab CM-T3530
*/
/dts-v1/;
#include "omap34xx.dtsi"
#include "omap3-cm-t3x30.dtsi"
/ {
model = "CompuLab CM-T3530";
compatible = "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
};

57
arch/arm/boot/dts/omap3-cm-t3730.dts
View File

@ -32,57 +32,26 @@ wl12xx_vaux2: wl12xx_vaux2 {
};
&omap3_pmx_core {
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
>;
};
smsc1_pins: pinmux_smsc1_pins {
pinctrl-single,pins = <
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
0x16a (PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
>;
};
wl12xx_gpio: pinmux_wl12xx_gpio {
pinctrl-single,pins = <
0xb2 (PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
0x134 (PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
>;
};
};
&mmc1 {
vmmc-supply = <&vmmc1>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
@ -92,13 +61,3 @@ &mmc2 {
bus-width = <4>;
cap-power-off-card;
};
&smsc1 {
pinctrl-names = "default";
pinctrl-0 = <&smsc1_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};

110
arch/arm/boot/dts/omap3-cm-t3x.dtsi Normal file
View File

@ -0,0 +1,110 @@
/*
* Common support for CompuLab CM-T3x CoMs
*/
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&green_led_pins>;
ledb {
label = "cm-t3x:green";
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
linux,default-trigger = "heartbeat";
};
};
/* HS USB Port 1 Power */
hsusb1_power: hsusb1_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb1_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <70000>;
};
/* HS USB Port 2 Power */
hsusb2_power: hsusb2_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <70000>;
};
/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&hsusb1_power>;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&hsusb2_power>;
};
};
&omap3_pmx_core {
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
green_led_pins: pinmux_green_led_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
bus-width = <4>;
};
&mmc3 {
status = "disabled";
};
&i2c1 {
clock-frequency = <400000>;
};
&i2c3 {
clock-frequency = <400000>;
};
&usbhshost {
port1-mode = "ehci-phy";
port2-mode = "ehci-phy";
};
&usbhsehci {
phys = <&hsusb1_phy &hsusb2_phy>;
};

74
arch/arm/boot/dts/omap3-cm-t3x30.dtsi
View File

@ -1,28 +1,16 @@
/*
* Common support for CompuLab CM-T3530 and CM-T3730
* Common support for CompuLab CM-T3x30 CoMs
*/
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
#include "omap3-cm-t3x.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
leds {
compatible = "gpio-leds";
ledb {
label = "cm-t35:green";
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
linux,default-trigger = "heartbeat";
};
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
@ -36,11 +24,40 @@ vdd33a: regulator-vdd33a {
};
};
&omap3_pmx_core {
smsc1_pins: pinmux_smsc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
>;
};
hsusb0_pins: pinmux_hsusb0_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
>;
};
};
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>;
smsc1: ethernet@5,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
pinctrl-names = "default";
pinctrl-0 = <&smsc1_pins>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
reg = <5 0 0xff>;
@ -74,8 +91,6 @@ smsc1: ethernet@5,0 {
};
&i2c1 {
clock-frequency = <400000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
@ -86,10 +101,31 @@ twl: twl@48 {
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&i2c3 {
clock-frequency = <400000>;
&mmc1 {
vmmc-supply = <&vmmc1>;
};
&twl_gpio {
ti,use-leds;
/* pullups: BIT(0) */
ti,pullups = <0x000001>;
};
&hsusb1_phy {
reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
};
&hsusb2_phy {
reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
};
&usb_otg_hs {
pinctrl-names = "default";
pinctrl-0 = <&hsusb0_pins>;
interface-type = <0>;
usb-phy = <&usb2_phy>;
phys = <&usb2_phy>;
phy-names = "usb2-phy";
mode = <3>;
power = <50>;
};

16
arch/arm/boot/dts/omap3-devkit8000.dts
View File

@ -101,20 +101,8 @@ &wdt2 {
status = "disabled";
};
&mcbsp1 {
status = "disabled";
};
&mcbsp3 {
status = "disabled";
};
&mcbsp4 {
status = "disabled";
};
&mcbsp5 {
status = "disabled";
&mcbsp2 {
status = "okay";
};
&gpmc {

51
arch/arm/boot/dts/omap3-gta04.dts
View File

@ -36,6 +36,14 @@ aux-button {
gpio-key,wakeup;
};
};
sound {
compatible = "ti,omap-twl4030";
ti,model = "gta04";
ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
};
};
&omap3_pmx_core {
@ -80,6 +88,12 @@ twl: twl@48 {
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
};
twl_audio: audio {
compatible = "ti,twl4030-audio";
codec {
};
};
};
#include "twl4030.dtsi"
@ -94,6 +108,14 @@ bmp085@77 {
reg = <0x77>;
};
/* accelerometer */
bma180@41 {
compatible = "bosch,bma180";
reg = <0x41>;
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
};
/* leds */
tca6507@45 {
compatible = "ti,tca6507";
@ -122,6 +144,22 @@ gta04_led4: green_power@4 {
reg = <0x4>;
};
};
/* compass aka magnetometer */
hmc5843@1e {
compatible = "honeywell,hmc5843";
reg = <0x1e>;
};
/* touchscreen */
tsc2007@48 {
compatible = "ti,tsc2007";
reg = <0x48>;
interrupt-parent = <&gpio6>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
ti,x-plate-ohms = <600>;
};
};
&i2c3 {
@ -146,7 +184,9 @@ &mmc1 {
};
&mmc2 {
status = "disabled";
vmmc-supply = <&vaux4>;
bus-width = <4>;
ti,non-removable;
};
&mmc3 {
@ -168,3 +208,12 @@ &uart3 {
pinctrl-0 = <&uart3_pins>;
};
&charger {
bb_uvolt = <3200000>;
bb_uamp = <150>;
};
&vaux4 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3150000>;
};

1
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -170,6 +170,7 @@ &i2c3 {
&mcbsp2 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
status = "okay";
};
&mmc1 {

459
arch/arm/boot/dts/omap3-lilly-a83x.dtsi Normal file
View File

@ -0,0 +1,459 @@
/*
* Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include "omap36xx.dtsi"
/ {
model = "INCOstartec LILLY-A83X module (DM3730)";
compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
chosen {
bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
};
memory {
device_type = "memory";
reg = <0x80000000 0x8000000>; /* 128 MB */
};
leds {
compatible = "gpio-leds";
led1 {
label = "lilly-a83x::led1";
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
};
sound {
compatible = "ti,omap-twl4030";
ti,model = "lilly-a83x";
ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
};
reg_vcc3: vcc3 {
compatible = "regulator-fixed";
regulator-name = "VCC3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_vcc3>;
};
};
&omap3_pmx_wkup {
pinctrl-names = "default";
lan9221_pins: pinmux_lan9221_pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
>;
};
tsc2048_pins: pinmux_tsc2048_pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
>;
};
mmc1cd_pins: pinmux_mmc1cd_pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
>;
};
};
&omap3_pmx_core {
pinctrl-names = "default";
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */
OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
>;
};
i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
>;
};
hsusb1_pins: pinmux_hsusb1_pins {
pinctrl-single,pins = <
/* GPIO 182 controls USB-Hub reset. But USB-Phy its
* reset can't be controlled. So we clamp this GPIO to
* high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
*/
OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
>;
};
hsusb_otg_pins: pinmux_hsusb_otg_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
spi2_pins: pinmux_spi2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */
OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */
>;
};
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusb1_2_pins
>;
hsusb1_2_pins: pinmux_hsusb1_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
>;
};
gpio1_pins: pinmux_gpio1_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */
>;
};
};
&gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pins>;
};
&gpio6 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_pins>;
};
&i2c1 {
clock-frequency = <2600000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
twl_audio: audio {
compatible = "ti,twl4030-audio";
codec {
};
};
};
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&twl {
vmmc1: regulator-vmmc1 {
regulator-always-on;
};
vdd1: regulator-vdd1 {
regulator-always-on;
};
vdd2: regulator-vdd2 {
regulator-always-on;
};
};
&i2c2 {
clock-frequency = <2600000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
};
&i2c3 {
clock-frequency = <2600000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
gpiom1: gpio@20 {
compatible = "mcp,mcp23017";
gpio-controller;
#gpio-cells = <2>;
reg = <0x20>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&uart4 {
status = "disabled";
};
&mmc1 {
cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
cd-inverted;
vmmc-supply = <&vmmc1>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
cap-sdio-irq;
cap-sd-highspeed;
cap-mmc-highspeed;
};
&mmc2 {
status = "disabled";
};
&mmc3 {
status = "disabled";
};
&mcspi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins>;
tsc2046@0 {
reg = <0>; /* CS0 */
compatible = "ti,tsc2046";
interrupt-parent = <&gpio1>;
interrupts = <8 0>; /* boot6 / gpio_8 */
spi-max-frequency = <1000000>;
pendown-gpio = <&gpio1 8 0>;
vcc-supply = <&reg_vcc3>;
pinctrl-names = "default";
pinctrl-0 = <&tsc2048_pins>;
ti,x-min = <300>;
ti,x-max = <3000>;
ti,y-min = <600>;
ti,y-max = <3600>;
ti,x-plate-ohms = <80>;
ti,pressure-max = <255>;
ti,swap-xy;
linux,wakeup;
};
};
&usbhsehci {
phys = <&hsusb1_phy>;
};
&usbhshost {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_2_pins>;
num-ports = <2>;
port1-mode = "ehci-phy";
};
&usb_otg_hs {
pinctrl-names = "default";
pinctrl-0 = <&hsusb_otg_pins>;
interface-type = <0>;
usb-phy = <&usb2_phy>;
phys = <&usb2_phy>;
phy-names = "usb2-phy";
mode = <3>;
power = <50>;
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>,
<7 0 0x15000000 0x01000000>;
nand@0,0 {
reg = <0 0 0x1000000>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
/* no elm on omap3 */
gpmc,mux-add-data = <0>;
gpmc,device-nand;
gpmc,device-width = <2>;
gpmc,wait-pin = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,burst-length= <4>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <100>;
gpmc,cs-wr-off-ns = <100>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <100>;
gpmc,adv-wr-off-ns = <100>;
gpmc,oe-on-ns = <5>;
gpmc,oe-off-ns = <75>;
gpmc,we-on-ns = <5>;
gpmc,we-off-ns = <75>;
gpmc,rd-cycle-ns = <100>;
gpmc,wr-cycle-ns = <100>;
gpmc,access-ns = <60>;
gpmc,page-burst-access-ns = <5>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-delay-ns = <50>;
gpmc,wr-data-mux-bus-ns = <75>;
gpmc,wr-access-ns = <155>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "MLO";
reg = <0 0x80000>;
};
partition@0x80000 {
label = "u-boot";
reg = <0x80000 0x1e0000>;
};
partition@0x260000 {
label = "u-boot-environment";
reg = <0x260000 0x20000>;
};
partition@0x280000 {
label = "kernel";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
label = "filesystem";
reg = <0x780000 0xf880000>;
};
};
ethernet@7,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
bank-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,cs-on-ns = <10>;
gpmc,cs-rd-off-ns = <60>;
gpmc,cs-wr-off-ns = <60>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <10>;
gpmc,adv-wr-off-ns = <10>;
gpmc,oe-on-ns = <10>;
gpmc,oe-off-ns = <60>;
gpmc,we-on-ns = <10>;
gpmc,we-off-ns = <60>;
gpmc,rd-cycle-ns = <100>;
gpmc,wr-cycle-ns = <100>;
gpmc,access-ns = <50>;
gpmc,page-burst-access-ns = <5>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <75>;
gpmc,wr-data-mux-bus-ns = <15>;
gpmc,wr-access-ns = <75>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&reg_vcc3>;
vdd33a-supply = <&reg_vcc3>;
reg-io-width = <4>;
interrupt-parent = <&gpio5>;
interrupts = <1 0x2>;
reg = <7 0 0xff>;
pinctrl-names = "default";
pinctrl-0 = <&lan9221_pins>;
phy-mode = "mii";
};
};

170
arch/arm/boot/dts/omap3-lilly-dbb056.dts Normal file
View File

@ -0,0 +1,170 @@
/*
* Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
/dts-v1/;
#include "omap3-lilly-a83x.dtsi"
/ {
model = "INCOstartec LILLY-DBB056 (DM3730)";
compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
};
&twl {
vaux2: regulator-vaux2 {
compatible = "ti,twl4030-vaux2";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
lan9117_pins: pinmux_lan9117_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* cam_fld.gpio_98 */
>;
};
gpio4_pins: pinmux_gpio4_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* cam_xclkb.gpio_111 -> sja1000 IRQ */
>;
};
gpio5_pins: pinmux_gpio5_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcbsp1_clk.gpio_156 -> enable DSS */
>;
};
lcd_pins: pinmux_lcd_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 -> wp */
OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_rts_sd.gpio_164 -> cd */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
>;
};
};
&gpio4 {
pinctrl-names = "default";
pinctrl-0 = <&gpio4_pins>;
};
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&gpio5_pins>;
};
&mmc2 {
status = "okay";
bus-width = <4>;
vmmc-supply = <&vmmc1>;
cd-gpios = <&gpio6 4 0>; /* gpio_164 */
wp-gpios = <&gpio6 3 0>; /* gpio_163 */
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
ti,dual-volt;
};
&mcspi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */
<4 0 0x20000000 0x01000000>,
<7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */
ethernet@4,0 {
compatible = "smsc,lan9117", "smsc,lan9115";
bank-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,cs-on-ns = <10>;
gpmc,cs-rd-off-ns = <65>;
gpmc,cs-wr-off-ns = <65>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <10>;
gpmc,adv-wr-off-ns = <10>;
gpmc,oe-on-ns = <10>;
gpmc,oe-off-ns = <65>;
gpmc,we-on-ns = <10>;
gpmc,we-off-ns = <65>;
gpmc,rd-cycle-ns = <100>;
gpmc,wr-cycle-ns = <100>;
gpmc,access-ns = <60>;
gpmc,page-burst-access-ns = <5>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <75>;
gpmc,wr-data-mux-bus-ns = <15>;
gpmc,wr-access-ns = <75>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&reg_vcc3>;
vdd33a-supply = <&reg_vcc3>;
reg-io-width = <4>;
interrupt-parent = <&gpio4>;
interrupts = <2 0x2>;
reg = <4 0 0xff>;
pinctrl-names = "default";
pinctrl-0 = <&lan9117_pins>;
phy-mode = "mii";
smsc,force-internal-phy;
};
};

90
arch/arm/boot/dts/omap3-n900.dts
View File

@ -74,6 +74,11 @@ proximity_sensor {
};
};
isp1704: isp1704 {
compatible = "nxp,isp1704";
nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
usb-phy = <&usb2_phy>;
};
};
&omap3_pmx_core {
@ -254,6 +259,61 @@ twl_audio: audio {
};
};
&twl_keypad {
linux,keymap = < 0x00000010 /* KEY_Q */
0x00010018 /* KEY_O */
0x00020019 /* KEY_P */
0x00030033 /* KEY_COMMA */
0x0004000e /* KEY_BACKSPACE */
0x0006001e /* KEY_A */
0x0007001f /* KEY_S */
0x01000011 /* KEY_W */
0x01010020 /* KEY_D */
0x01020021 /* KEY_F */
0x01030022 /* KEY_G */
0x01040023 /* KEY_H */
0x01050024 /* KEY_J */
0x01060025 /* KEY_K */
0x01070026 /* KEY_L */
0x02000012 /* KEY_E */
0x02010034 /* KEY_DOT */
0x02020067 /* KEY_UP */
0x0203001c /* KEY_ENTER */
0x0205002c /* KEY_Z */
0x0206002d /* KEY_X */
0x0207002e /* KEY_C */
0x02080043 /* KEY_F9 */
0x03000013 /* KEY_R */
0x0301002f /* KEY_V */
0x03020030 /* KEY_B */
0x03030031 /* KEY_N */
0x03040032 /* KEY_M */
0x03050039 /* KEY_SPACE */
0x03060039 /* KEY_SPACE */
0x03070069 /* KEY_LEFT */
0x04000014 /* KEY_T */
0x0401006c /* KEY_DOWN */
0x0402006a /* KEY_RIGHT */
0x0404001d /* KEY_LEFTCTRL */
0x04050064 /* KEY_RIGHTALT */
0x0406002a /* KEY_LEFTSHIFT */
0x04080044 /* KEY_F10 */
0x05000015 /* KEY_Y */
0x05080057 /* KEY_F11 */
0x06000016 /* KEY_U */
0x07000017 /* KEY_I */
0x07010041 /* KEY_F7 */
0x07020042 /* KEY_F8 */
>;
};
&twl_gpio {
ti,pullups = <0x0>;
ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
@ -291,6 +351,13 @@ tlv320aic3x_aux: tlv320aic3x@19 {
DVDD-supply = <&vio>;
};
tsl2563: tsl2563@29 {
compatible = "amstaos,tsl2563";
reg = <0x29>;
amstaos,cover-comp-gain = <16>;
};
lp5523: lp5523@32 {
compatible = "national,lp5523";
reg = <0x32>;
@ -356,6 +423,29 @@ bq27200: bq27200@55 {
compatible = "ti,bq27200";
reg = <0x55>;
};
tpa6130a2: tpa6130a2@60 {
compatible = "ti,tpa6130a2";
reg = <0x60>;
Vdd-supply = <&vmmc2>;
power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
};
bq24150a: bq24150a@6b {
compatible = "ti,bq24150a";
reg = <0x6b>;
ti,current-limit = <100>;
ti,weak-battery-voltage = <3400>;
ti,battery-regulation-voltage = <4200>;
ti,charge-current = <650>;
ti,termination-current = <100>;
ti,resistor-sense = <68>;
ti,usb-charger-detection = <&isp1704>;
};
};
&i2c3 {

4
arch/arm/boot/dts/omap3-overo.dtsi
View File

@ -95,3 +95,7 @@ &uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&mcbsp2 {
status = "okay";
};

29
arch/arm/boot/dts/omap3-sb-t35.dtsi
View File

@ -2,11 +2,36 @@
* Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
*/
/ {
vddvario_sb_t35: regulator-vddvario-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&omap3_pmx_core {
smsc2_pins: pinmux_smsc2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b6, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
>;
};
};
&gpmc {
ranges = <4 0 0x2d000000 0x01000000>;
smsc2: ethernet@4,0 {
compatible = "smsc,lan9221", "smsc,lan9115";
pinctrl-names = "default";
pinctrl-0 = <&smsc2_pins>;
interrupt-parent = <&gpio3>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
reg = <4 0 0xff>;
@ -32,8 +57,8 @@ smsc2: ethernet@4,0 {
gpmc,wr-access-ns = <186>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
vddvario-supply = <&vddvario_sb_t35>;
vdd33a-supply = <&vdd33a_sb_t35>;
reg-io-width = <4>;
smsc,save-mac-address;
};

43
arch/arm/boot/dts/omap3-sbc-t3517.dts Normal file
View File

@ -0,0 +1,43 @@
/*
* Suppport for CompuLab SBC-T3517 with CM-T3517
*/
#include "omap3-cm-t3517.dts"
#include "omap3-sb-t35.dtsi"
/ {
model = "CompuLab SBC-T3517 with CM-T3517";
compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&sb_t35_usb_hub_pins
&usb_hub_pins
>;
mmc1_aux_pins: pinmux_mmc1_aux_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20c0, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_clk.gpio_59 */
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_cts.gpio_144 */
>;
};
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21ec, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_98 - SB-T35 USB HUB RST */
>;
};
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <
&mmc1_pins
&mmc1_aux_pins
>;
wp-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio_59 */
cd-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio_144 */
};

36
arch/arm/boot/dts/omap3-sbc-t3530.dts Normal file
View File

@ -0,0 +1,36 @@
/*
* Suppport for CompuLab SBC-T3530 with CM-T3530
*/
#include "omap3-cm-t3530.dts"
#include "omap3-sb-t35.dtsi"
/ {
model = "CompuLab SBC-T3530 with CM-T3530";
compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&sb_t35_usb_hub_pins>;
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
>;
};
};
/*
* The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
* SB-T35 baseboard respectively.
* This setting includes both chips in SBC-T3530 board device tree.
*/
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>,
<4 0 0x2d000000 0x01000000>;
};
&mmc1 {
cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
};

25
arch/arm/boot/dts/omap3-sbc-t3730.dts
View File

@ -10,21 +10,18 @@ / {
compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&sb_t35_usb_hub_pins>;
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
>;
};
};
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>,
<4 0 0x2d000000 0x01000000>;
};
&smsc2 {
pinctrl-names = "default";
pinctrl-0 = <&smsc2_pins>;
};
&omap3_pmx_core {
smsc2_pins: pinmux_smsc2_pins {
pinctrl-single,pins = <
0x86 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
0xa2 (PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
>;
};
};

10
arch/arm/boot/dts/omap3.dtsi
View File

@ -35,6 +35,11 @@ cpu@0 {
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0x0>;
clocks = <&dpll1_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
@ -436,6 +441,7 @@ mcbsp1: mcbsp@48074000 {
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp2: mcbsp@49022000 {
@ -453,6 +459,7 @@ mcbsp2: mcbsp@49022000 {
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp3: mcbsp@49024000 {
@ -470,6 +477,7 @@ mcbsp3: mcbsp@49024000 {
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp4: mcbsp@49026000 {
@ -485,6 +493,7 @@ mcbsp4: mcbsp@49026000 {
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp5: mcbsp@48096000 {
@ -500,6 +509,7 @@ mcbsp5: mcbsp@48096000 {
dmas = <&sdma 21>,
<&sdma 22>;
dma-names = "tx", "rx";
status = "disabled";
};
sham: sham@480c3000 {

7
arch/arm/boot/dts/omap3430-sdp.dts
View File

@ -34,6 +34,10 @@ twl: twl@48 {
&mmc1 {
vmmc-supply = <&vmmc1>;
vmmc_aux-supply = <&vsim>;
/*
* S6-3 must be in ON position for 8 bit mode to function
* Else, use 4 bit mode
*/
bus-width = <8>;
};
@ -103,9 +107,8 @@ nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <1 0 0x08000000>;
ti,nand-ecc-opt = "ham1";
nand-bus-width = <8>;
ti,nand-ecc-opt = "sw";
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <36>;
gpmc,cs-wr-off-ns = <36>;

10
arch/arm/boot/dts/omap3430es1-clocks.dtsi
View File

@ -82,16 +82,16 @@ ssi_ssr_div_fck_3430es1: ssi_ssr_div_fck_3430es1 {
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
};
ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 {
ssi_ssr_fck: ssi_ssr_fck_3430es1 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
};
ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 {
ssi_sst_fck: ssi_sst_fck_3430es1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&ssi_ssr_fck_3430es1>;
clocks = <&ssi_ssr_fck>;
clock-mult = <1>;
clock-div = <2>;
};
@ -120,7 +120,7 @@ ssi_l4_ick: ssi_l4_ick {
clock-div = <1>;
};
ssi_ick_3430es1: ssi_ick_3430es1 {
ssi_ick: ssi_ick_3430es1 {
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clocks = <&ssi_l4_ick>;
@ -203,6 +203,6 @@ core_l4_clkdm: core_l4_clkdm {
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
<&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>;
<&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
};
};

10
arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
View File

@ -25,16 +25,16 @@ ssi_ssr_div_fck_3430es2: ssi_ssr_div_fck_3430es2 {
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
};
ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 {
ssi_ssr_fck: ssi_ssr_fck_3430es2 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
};
ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 {
ssi_sst_fck: ssi_sst_fck_3430es2 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&ssi_ssr_fck_3430es2>;
clocks = <&ssi_ssr_fck>;
clock-mult = <1>;
clock-div = <2>;
};
@ -55,7 +55,7 @@ ssi_l4_ick: ssi_l4_ick {
clock-div = <1>;
};
ssi_ick_3430es2: ssi_ick_3430es2 {
ssi_ick: ssi_ick_3430es2 {
#clock-cells = <0>;
compatible = "ti,omap3-ssi-interface-clock";
clocks = <&ssi_l4_ick>;
@ -193,6 +193,6 @@ core_l4_clkdm: core_l4_clkdm {
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
<&ssi_ick_3430es2>;
<&ssi_ick>;
};
};

23
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@ -109,9 +109,6 @@ wl12xx_vmmc: wl12xx_vmmc {
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6040_pins
&mcpdm_pins
&mcbsp1_pins
&dss_dpi_pins
&tfp410_pins
&dss_hdmi_pins
@ -300,6 +297,10 @@ twl: twl@48 {
twl6040: twl@4b {
compatible = "ti,twl6040";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&twl6040_pins>;
/* IRQ# = 119 */
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
interrupt-parent = <&gic>;
@ -380,16 +381,16 @@ &emif2 {
device-handle = <&elpida_ECB240ABACN>;
};
&mcbsp2 {
status = "disabled";
&mcbsp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
status = "okay";
};
&mcbsp3 {
status = "disabled";
};
&dmic {
status = "disabled";
&mcpdm {
pinctrl-names = "default";
pinctrl-0 = <&mcpdm_pins>;
status = "okay";
};
&twl_usb_comparator {

33
arch/arm/boot/dts/omap4-sdp.dts
View File

@ -158,11 +158,6 @@ wl12xx_vmmc: wl12xx_vmmc {
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6040_pins
&mcpdm_pins
&dmic_pins
&mcbsp1_pins
&mcbsp2_pins
&dss_hdmi_pins
&tpd12s015_pins
>;
@ -326,6 +321,10 @@ twl: twl@48 {
twl6040: twl@4b {
compatible = "ti,twl6040";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&twl6040_pins>;
/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
interrupt-parent = <&gic>;
@ -537,8 +536,28 @@ &uart4 {
pinctrl-0 = <&uart4_pins>;
};
&mcbsp3 {
status = "disabled";
&mcbsp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
status = "okay";
};
&mcbsp2 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
status = "okay";
};
&dmic {
pinctrl-names = "default";
pinctrl-0 = <&dmic_pins>;
status = "okay";
};
&mcpdm {
pinctrl-names = "default";
pinctrl-0 = <&mcpdm_pins>;
status = "okay";
};
&twl_usb_comparator {

19
arch/arm/boot/dts/omap4.dtsi
View File

@ -36,6 +36,11 @@ cpu@0 {
device_type = "cpu";
next-level-cache = <&L2>;
reg = <0x0>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
cpu@1 {
compatible = "arm,cortex-a9";
@ -313,6 +318,7 @@ hwspinlock: spinlock@4a0f6000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x4a0f6000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
i2c1: i2c@48070000 {
@ -478,6 +484,7 @@ mcpdm: mcpdm@40132000 {
dmas = <&sdma 65>,
<&sdma 66>;
dma-names = "up_link", "dn_link";
status = "disabled";
};
dmic: dmic@4012e000 {
@ -489,6 +496,7 @@ dmic: dmic@4012e000 {
ti,hwmods = "dmic";
dmas = <&sdma 67>;
dma-names = "up_link";
status = "disabled";
};
mcbsp1: mcbsp@40122000 {
@ -503,6 +511,7 @@ mcbsp1: mcbsp@40122000 {
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp2: mcbsp@40124000 {
@ -517,6 +526,7 @@ mcbsp2: mcbsp@40124000 {
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp3: mcbsp@40126000 {
@ -531,6 +541,7 @@ mcbsp3: mcbsp@40126000 {
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp4: mcbsp@48096000 {
@ -544,6 +555,7 @@ mcbsp4: mcbsp@48096000 {
dmas = <&sdma 31>,
<&sdma 32>;
dma-names = "tx", "rx";
status = "disabled";
};
keypad: keypad@4a31c000 {
@ -554,6 +566,13 @@ keypad: keypad@4a31c000 {
ti,hwmods = "kbd";
};
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
emif1: emif@4c000000 {
compatible = "ti,emif-4d";
reg = <0x4c000000 0x100>;

19
arch/arm/boot/dts/omap5.dtsi
View File

@ -49,6 +49,12 @@ cpu0: cpu@0 {
1000000 1060000
1500000 1250000
>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
/* cooling options */
cooling-min-level = <0>;
cooling-max-level = <2>;
@ -353,6 +359,7 @@ hwspinlock: spinlock@4a0f6000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x4a0f6000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <1>;
};
mcspi1: spi@48098000 {
@ -529,6 +536,7 @@ mcpdm: mcpdm@40132000 {
dmas = <&sdma 65>,
<&sdma 66>;
dma-names = "up_link", "dn_link";
status = "disabled";
};
dmic: dmic@4012e000 {
@ -540,6 +548,7 @@ dmic: dmic@4012e000 {
ti,hwmods = "dmic";
dmas = <&sdma 67>;
dma-names = "up_link";
status = "disabled";
};
mcbsp1: mcbsp@40122000 {
@ -554,6 +563,7 @@ mcbsp1: mcbsp@40122000 {
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp2: mcbsp@40124000 {
@ -568,6 +578,7 @@ mcbsp2: mcbsp@40124000 {
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
status = "disabled";
};
mcbsp3: mcbsp@40126000 {
@ -582,6 +593,7 @@ mcbsp3: mcbsp@40126000 {
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
status = "disabled";
};
timer1: timer@4ae18000 {
@ -683,6 +695,13 @@ wdt2: wdt@4ae14000 {
ti,hwmods = "wd_timer2";
};
dmm@4e000000 {
compatible = "ti,omap5-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
emif1: emif@4c000000 {
compatible = "ti,emif-4d5";
ti,hwmods = "emif1";

5
arch/arm/boot/dts/tps65910.dtsi
View File

@ -82,5 +82,10 @@ vmmc_reg: regulator@12 {
reg = <12>;
regulator-compatible = "vmmc";
};
vbb_reg: regulator@13 {
reg = <13>;
regulator-compatible = "vbb";
};
};
};

7
arch/arm/boot/dts/twl4030.dtsi
View File

@ -145,4 +145,11 @@ twl_pwrbutton: pwrbutton {
compatible = "ti,twl4030-pwrbutton";
interrupts = <8>;
};
twl_keypad: keypad {
compatible = "ti,twl4030-keypad";
interrupts = <1>;
keypad,num-rows = <8>;
keypad,num-columns = <8>;
};
};

31
arch/arm/mach-omap2/gpmc-nand.c
View File

@ -45,24 +45,31 @@ static struct platform_device gpmc_nand_device = {
static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
{
/* support only OMAP3 class */
if (!cpu_is_omap34xx() && !soc_is_am33xx()) {
pr_err("BCH ecc is not supported on this CPU\n");
/* platforms which support all ECC schemes */
if (soc_is_am33xx() || cpu_is_omap44xx() ||
soc_is_omap54xx() || soc_is_dra7xx())
return 1;
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
* which require H/W based ECC error detection */
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
return 0;
}
/*
* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
* and AM33xx derivates. Other chips may be added if confirmed to work.
*/
if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) &&
(!soc_is_am33xx())) {
pr_err("BCH 4-bit mode is not supported on this CPU\n");
if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
return 0;
}
return 1;
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
return 1;
else
return 0;
}
/* This function will go away once the device-tree convertion is complete */
@ -133,8 +140,10 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
dev_err(dev, "Unsupported NAND ECC scheme selected\n");
return -EINVAL;
}
err = platform_device_register(&gpmc_nand_device);
if (err < 0) {

67
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -99,7 +99,7 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
int res;
res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
"wlan rst");
"wlan pwr");
if (res)
return res;
@ -108,6 +108,23 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
return 0;
}
static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
{
int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
if (err) {
pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
hub_name, err);
return;
}
gpio_export(gpio, 0);
udelay(10);
gpio_set_value(gpio, 1);
msleep(1);
}
static void __init omap3_sbc_t3730_twl_init(void)
{
twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
@ -115,10 +132,17 @@ static void __init omap3_sbc_t3730_twl_init(void)
static void __init omap3_sbc_t3730_legacy_init(void)
{
omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136);
omap_ads7846_init(1, 57, 0, NULL);
}
static void __init omap3_sbc_t3530_legacy_init(void)
{
omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
omap_ads7846_init(1, 57, 0, NULL);
}
static void __init omap3_igep0020_legacy_init(void)
{
omap3_igep2_display_init_of();
@ -160,7 +184,7 @@ static struct emac_platform_data am35xx_emac_pdata = {
.interrupt_disable = am35xx_disable_emac_int,
};
static void __init am3517_evm_legacy_init(void)
static void __init am35xx_emac_reset(void)
{
u32 v;
@ -169,6 +193,43 @@ static void __init am3517_evm_legacy_init(void)
omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
}
static struct gpio cm_t3517_wlan_gpios[] __initdata = {
{ 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
{ 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
};
static void __init omap3_sbc_t3517_wifi_init(void)
{
int err = gpio_request_array(cm_t3517_wlan_gpios,
ARRAY_SIZE(cm_t3517_wlan_gpios));
if (err) {
pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
return;
}
gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
msleep(100);
gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
}
static void __init omap3_sbc_t3517_legacy_init(void)
{
omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
am35xx_emac_reset();
hsmmc2_internal_input_clk();
omap3_sbc_t3517_wifi_init();
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 145);
omap_ads7846_init(1, 57, 0, NULL);
}
static void __init am3517_evm_legacy_init(void)
{
am35xx_emac_reset();
}
#endif /* CONFIG_ARCH_OMAP3 */
#ifdef CONFIG_ARCH_OMAP4
@ -258,6 +319,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
*/
static struct pdata_init pdata_quirks[] __initdata = {
#ifdef CONFIG_ARCH_OMAP3
{ "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
{ "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },

1
include/dt-bindings/pinctrl/am43xx.h
View File

@ -13,6 +13,7 @@
#define MUX_MODE5 5
#define MUX_MODE6 6
#define MUX_MODE7 7
#define MUX_MODE8 8
#define PULL_DISABLE (1 << 16)
#define PULL_UP (1 << 17)