mirror of https://gitee.com/openkylin/linux.git
mips: bmips: bcm6362: populate device tree nodes
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add SPI controller. - Add HS SPI controller. - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
parent
add9562320
commit
277bb6e227
|
@ -29,16 +29,29 @@ cpu@1 {
|
|||
};
|
||||
|
||||
clocks {
|
||||
periph_clk: periph-clk {
|
||||
periph_osc: periph-osc {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <50000000>;
|
||||
clock-output-names = "periph";
|
||||
};
|
||||
|
||||
hsspi_osc: hsspi-osc {
|
||||
compatible = "fixed-clock";
|
||||
|
||||
#clock-cells = <0>;
|
||||
|
||||
clock-frequency = <400000000>;
|
||||
clock-output-names = "hsspi_osc";
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
nflash = &nflash;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
spi0 = &lsspi;
|
||||
spi1 = &hsspi;
|
||||
};
|
||||
|
||||
cpu_intc: interrupt-controller {
|
||||
|
@ -56,23 +69,22 @@ ubus {
|
|||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
clkctl: clock-controller@10000004 {
|
||||
periph_clk: clock-controller@10000004 {
|
||||
compatible = "brcm,bcm6362-clocks";
|
||||
reg = <0x10000004 0x4>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
periph_cntl: syscon@10000008 {
|
||||
pll_cntl: syscon@10000008 {
|
||||
compatible = "syscon";
|
||||
reg = <0x10000008 0x4>;
|
||||
native-endian;
|
||||
};
|
||||
|
||||
reboot: syscon-reboot@10000008 {
|
||||
compatible = "syscon-reboot";
|
||||
regmap = <&periph_cntl>;
|
||||
offset = <0x0>;
|
||||
mask = <0x1>;
|
||||
reboot {
|
||||
compatible = "syscon-reboot";
|
||||
offset = <0x0>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
periph_rst: reset-controller@10000010 {
|
||||
|
@ -93,6 +105,16 @@ periph_intc: interrupt-controller@10000020 {
|
|||
interrupts = <2>, <3>;
|
||||
};
|
||||
|
||||
wdt: watchdog@1000005c {
|
||||
compatible = "brcm,bcm7038-wdt";
|
||||
reg = <0x1000005c 0xc>;
|
||||
|
||||
clocks = <&periph_osc>;
|
||||
clock-names = "refclk";
|
||||
|
||||
timeout-sec = <30>;
|
||||
};
|
||||
|
||||
uart0: serial@10000100 {
|
||||
compatible = "brcm,bcm6345-uart";
|
||||
reg = <0x10000100 0x18>;
|
||||
|
@ -100,7 +122,7 @@ uart0: serial@10000100 {
|
|||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <3>;
|
||||
|
||||
clocks = <&periph_clk>;
|
||||
clocks = <&periph_osc>;
|
||||
clock-names = "refclk";
|
||||
|
||||
status = "disabled";
|
||||
|
@ -113,12 +135,72 @@ uart1: serial@10000120 {
|
|||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <4>;
|
||||
|
||||
clocks = <&periph_clk>;
|
||||
clocks = <&periph_osc>;
|
||||
clock-names = "refclk";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nflash: nand@10000200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "brcm,nand-bcm6368",
|
||||
"brcm,brcmnand-v2.2",
|
||||
"brcm,brcmnand";
|
||||
reg = <0x10000200 0x180>,
|
||||
<0x10000600 0x200>,
|
||||
<0x10000070 0x10>;
|
||||
reg-names = "nand",
|
||||
"nand-cache",
|
||||
"nand-int-base";
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <12>;
|
||||
|
||||
clocks = <&periph_clk BCM6362_CLK_NAND>;
|
||||
clock-names = "nand";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lsspi: spi@10000800 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "brcm,bcm6358-spi";
|
||||
reg = <0x10000800 0x70c>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <2>;
|
||||
|
||||
clocks = <&periph_clk BCM6362_CLK_SPI>;
|
||||
clock-names = "spi";
|
||||
|
||||
resets = <&periph_rst BCM6362_RST_SPI>;
|
||||
reset-names = "spi";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsspi: spi@10001000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "brcm,bcm6328-hsspi";
|
||||
reg = <0x10001000 0x600>;
|
||||
|
||||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <5>;
|
||||
|
||||
clocks = <&periph_clk BCM6362_CLK_HSSPI>,
|
||||
<&hsspi_osc>;
|
||||
clock-names = "hsspi",
|
||||
"pll";
|
||||
|
||||
resets = <&periph_rst BCM6362_RST_SPI>;
|
||||
reset-names = "hsspi";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
periph_pwr: power-controller@10001848 {
|
||||
compatible = "brcm,bcm6362-power-controller";
|
||||
reg = <0x10001848 0x4>;
|
||||
|
@ -142,6 +224,9 @@ ehci: usb@10002500 {
|
|||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <10>;
|
||||
|
||||
phys = <&usbh 0>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -154,6 +239,26 @@ ohci: usb@10002600 {
|
|||
interrupt-parent = <&periph_intc>;
|
||||
interrupts = <9>;
|
||||
|
||||
phys = <&usbh 0>;
|
||||
phy-names = "usb";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbh: usb-phy@10002700 {
|
||||
compatible = "brcm,bcm6362-usbh-phy";
|
||||
reg = <0x10002700 0x38>;
|
||||
|
||||
#phy-cells = <1>;
|
||||
|
||||
clocks = <&periph_clk BCM6362_CLK_USBH>;
|
||||
clock-names = "usbh";
|
||||
|
||||
power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
|
||||
|
||||
resets = <&periph_rst BCM6362_RST_USBH>;
|
||||
reset-names = "usbh";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue