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davinci: Keep count of channel controllers on a platform 

Some architectures have only one channel controller, but the
edma_alloc_channel api loops twice to findout the free channel
available in EDMA_CHANNEL_ANY case. A new variable has been
introduced to keep count of number of channel controllers being
used on a particular architecture.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sudhakar Rajashekhara 2010-01-06 17:28:44 +05:30 committed by Kevin Hilman
parent 0e6cb8d296
commit 2d51750806
1 changed files with 3 additions and 1 deletions
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4
arch/arm/mach-davinci/dma.c
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@ -243,6 +243,7 @@ struct edma {
}; };
static struct edma *edma_info[EDMA_MAX_CC]; static struct edma *edma_info[EDMA_MAX_CC];
static int arch_num_cc;
/* dummy param set used to (re)initialize parameter RAM slots */ /* dummy param set used to (re)initialize parameter RAM slots */
static const struct edmacc_param dummy_paramset = { static const struct edmacc_param dummy_paramset = {
@ -602,7 +603,7 @@ int edma_alloc_channel(int channel,
} }
if (channel < 0) { if (channel < 0) {
for (i = 0; i < EDMA_MAX_CC; i++) { for (i = 0; i < arch_num_cc; i++) {
channel = 0; channel = 0;
for (;;) { for (;;) {
channel = find_next_bit(edma_info[i]-> channel = find_next_bit(edma_info[i]->
@ -1467,6 +1468,7 @@ static int __init edma_probe(struct platform_device *pdev)
edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); edma_write_array2(j, EDMA_DRAE, i, 1, 0x0);
edma_write_array(j, EDMA_QRAE, i, 0x0); edma_write_array(j, EDMA_QRAE, i, 0x0);
} }
arch_num_cc++;
} }
if (tc_errs_handled) { if (tc_errs_handled) {