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arm: omap: irq: define INTC_ILR0 register 

this is currently used as a hardcoded 0x100
offset.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Felipe Balbi 2014-09-08 17:54:32 -07:00 committed by Tony Lindgren
parent 176da6c766
commit 33c7c7b7f2
1 changed files with 1 additions and 0 deletions
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1
arch/arm/mach-omap2/irq.c
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@ -41,6 +41,7 @@
#define INTC_MIR_CLEAR0 0x0088
#define INTC_MIR_SET0 0x008c
#define INTC_PENDING_IRQ0 0x0098
#define INTC_ILR0 0x0100
/* Number of IRQ state bits in each MIR register */
#define IRQ_BITS_PER_REG 32