mirror of https://gitee.com/openkylin/linux.git
[PATCH] ppc32: Update board-specific code of the CPM UART users
This has the relevant updates/additions to the BSP code so that proper platform_info struct well be passed to the CPM UART drivers. The changes covered mpc866ads, mpc885ads and mpc8272ads. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
parent
e27987cddd
commit
4427d6bf96
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@ -26,11 +26,35 @@
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#include <asm/irq.h>
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#include <asm/ppc_sys.h>
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#include <asm/ppcboot.h>
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#include <linux/fs_uart_pd.h>
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#include "pq2ads_pd.h"
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static void init_fcc1_ioports(void);
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static void init_fcc2_ioports(void);
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static void init_scc1_uart_ioports(void);
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static void init_scc4_uart_ioports(void);
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static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
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[fsid_scc1_uart] = {
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.init_ioports = init_scc1_uart_ioports,
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.fs_no = fsid_scc1_uart,
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.brg = 1,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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[fsid_scc4_uart] = {
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.init_ioports = init_scc4_uart_ioports,
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.fs_no = fsid_scc4_uart,
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.brg = 4,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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};
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static struct fs_mii_bus_info mii_bus_info = {
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.method = fsmii_bitbang,
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@ -201,6 +225,55 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
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}
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}
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static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
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int idx)
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{
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bd_t *bd = (bd_t *) __res;
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struct fs_uart_platform_info *pinfo;
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int num = ARRAY_SIZE(mpc8272_uart_pdata);
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int id = fs_uart_id_scc2fsid(idx);
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/* no need to alter anything if console */
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if ((id <= num) && (!pdev->dev.platform_data)) {
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pinfo = &mpc8272_uart_pdata[id];
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pinfo->uart_clk = bd->bi_intfreq;
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pdev->dev.platform_data = pinfo;
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}
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}
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static void init_scc1_uart_ioports(void)
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{
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cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
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/* SCC1 is only on port D */
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setbits32(&immap->im_ioport.iop_ppard,0x00000003);
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clrbits32(&immap->im_ioport.iop_psord,0x00000001);
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setbits32(&immap->im_ioport.iop_psord,0x00000002);
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clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
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setbits32(&immap->im_ioport.iop_pdird,0x00000002);
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/* Wire BRG1 to SCC1 */
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clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
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iounmap(immap);
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}
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static void init_scc4_uart_ioports(void)
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{
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cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
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setbits32(&immap->im_ioport.iop_ppard,0x00000600);
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clrbits32(&immap->im_ioport.iop_psord,0x00000600);
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clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
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setbits32(&immap->im_ioport.iop_pdird,0x00000400);
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/* Wire BRG4 to SCC4 */
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clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
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setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
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iounmap(immap);
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}
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static int mpc8272ads_platform_notify(struct device *dev)
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{
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static const struct platform_notify_dev_map dev_map[] = {
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@ -208,6 +281,10 @@ static int mpc8272ads_platform_notify(struct device *dev)
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.bus_id = "fsl-cpm-fcc",
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.rtn = mpc8272ads_fixup_enet_pdata
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},
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{
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.bus_id = "fsl-cpm-scc:uart",
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.rtn = mpc
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},
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{
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.bus_id = NULL
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}
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@ -230,7 +307,44 @@ int __init mpc8272ads_init(void)
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ppc_sys_device_enable(MPC82xx_CPM_FCC1);
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ppc_sys_device_enable(MPC82xx_CPM_FCC2);
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/* to be ready for console, let's attach pdata here */
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#ifdef CONFIG_SERIAL_CPM_SCC1
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ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
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ppc_sys_device_enable(MPC82xx_CPM_SCC1);
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#endif
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#ifdef CONFIG_SERIAL_CPM_SCC4
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ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
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ppc_sys_device_enable(MPC82xx_CPM_SCC4);
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#endif
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return 0;
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}
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/*
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To prevent confusion, console selection is gross:
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by 0 assumed SCC1 and by 1 assumed SCC4
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*/
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struct platform_device* early_uart_get_pdev(int index)
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{
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bd_t *bd = (bd_t *) __res;
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struct fs_uart_platform_info *pinfo;
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struct platform_device* pdev = NULL;
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if(index) { /*assume SCC4 here*/
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pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
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pinfo = &mpc8272<F12>_uart_pdata[1];
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} else { /*over SCC1*/
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pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
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pinfo = &mpc8272_uart_pdata[0];
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}
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pinfo->uart_clk = bd->bi_intfreq;
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pdev->dev.platform_data = pinfo;
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ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
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return NULL;
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}
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arch_initcall(mpc8272ads_init);
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@ -20,6 +20,7 @@
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#include <linux/device.h>
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#include <linux/fs_enet_pd.h>
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#include <linux/fs_uart_pd.h>
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#include <linux/mii.h>
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#include <asm/delay.h>
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@ -37,6 +38,11 @@
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extern unsigned char __res[];
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static void setup_fec1_ioports(void);
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static void setup_scc1_ioports(void);
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static void setup_smc1_ioports(void);
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static void setup_smc2_ioports(void);
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static struct fs_mii_bus_info fec_mii_bus_info = {
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.method = fsmii_fec,
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.id = 0,
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@ -79,6 +85,28 @@ static struct fs_platform_info mpc8xx_scc_pdata = {
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.phy_irq = -1,
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.bus_info = &scc_mii_bus_info,
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};
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static struct fs_uart_platform_info mpc866_uart_pdata[] = {
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[fsid_smc1_uart] = {
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.brg = 1,
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.fs_no = fsid_smc1_uart,
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.init_ioports = setup_smc1_ioports,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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[fsid_smc2_uart] = {
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.brg = 2,
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.fs_no = fsid_smc2_uart,
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.init_ioports = setup_smc2_ioports,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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};
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void __init board_init(void)
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@ -92,9 +120,12 @@ void __init board_init(void)
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printk(KERN_CRIT "Could not remap BCSR1\n");
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return;
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}
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#ifdef CONFIG_SERIAL_CPM_SMC1
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cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
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clrbits32(bcsr_io,(0x80000000 >> 7));
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cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
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cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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#else
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setbits32(bcsr_io,(0x80000000 >> 7));
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@ -108,6 +139,8 @@ void __init board_init(void)
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cp->cp_simode &= ~(0xe0000000 >> 1);
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cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
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clrbits32(bcsr_io,(0x80000000 >> 13));
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cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
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cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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#else
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clrbits32(bcsr_io,(0x80000000 >> 13));
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cp->cp_pbpar &= ~(0x00000c00);
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@ -232,6 +265,74 @@ static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
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mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
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}
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static void setup_smc1_ioports(void)
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{
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immap_t *immap = (immap_t *) IMAP_ADDR;
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unsigned *bcsr_io;
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unsigned int iobits = 0x000000c0;
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR1\n");
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return;
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}
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clrbits32(bcsr_io,BCSR1_RS232EN_1);
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iounmap(bcsr_io);
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setbits32(&immap->im_cpm.cp_pbpar, iobits);
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clrbits32(&immap->im_cpm.cp_pbdir, iobits);
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clrbits16(&immap->im_cpm.cp_pbodr, iobits);
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}
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static void setup_smc2_ioports(void)
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{
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immap_t *immap = (immap_t *) IMAP_ADDR;
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unsigned *bcsr_io;
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unsigned int iobits = 0x00000c00;
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR1\n");
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return;
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}
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clrbits32(bcsr_io,BCSR1_RS232EN_2);
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iounmap(bcsr_io);
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#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
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setbits32(&immap->im_cpm.cp_pbpar, iobits);
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clrbits32(&immap->im_cpm.cp_pbdir, iobits);
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clrbits16(&immap->im_cpm.cp_pbodr, iobits);
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#else
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setbits16(&immap->im_ioport.iop_papar, iobits);
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clrbits16(&immap->im_ioport.iop_padir, iobits);
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clrbits16(&immap->im_ioport.iop_paodr, iobits);
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#endif
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}
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static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
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int idx)
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{
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bd_t *bd = (bd_t *) __res;
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struct fs_uart_platform_info *pinfo;
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int num = ARRAY_SIZE(mpc866_uart_pdata);
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int id = fs_uart_id_smc2fsid(idx);
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/* no need to alter anything if console */
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if ((id <= num) && (!pdev->dev.platform_data)) {
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pinfo = &mpc866_uart_pdata[id];
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pinfo->uart_clk = bd->bi_intfreq;
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pdev->dev.platform_data = pinfo;
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}
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}
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static int mpc866ads_platform_notify(struct device *dev)
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{
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static const struct platform_notify_dev_map dev_map[] = {
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@ -243,6 +344,10 @@ static int mpc866ads_platform_notify(struct device *dev)
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.bus_id = "fsl-cpm-scc",
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.rtn = mpc866ads_fixup_scc_enet_pdata,
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},
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{
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.bus_id = "fsl-cpm-smc:uart",
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.rtn = mpc866ads_fixup_uart_pdata
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},
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{
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.bus_id = NULL
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}
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@ -267,7 +372,42 @@ int __init mpc866ads_init(void)
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#endif
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ppc_sys_device_enable(MPC8xx_CPM_FEC1);
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/* Since either of the uarts could be used as console, they need to ready */
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#ifdef CONFIG_SERIAL_CPM_SMC1
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ppc_sys_device_enable(MPC8xx_CPM_SMC1);
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ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
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#endif
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#ifdef CONFIG_SERIAL_CPM_SMCer
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ppc_sys_device_enable(MPC8xx_CPM_SMC2);
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ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
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#endif
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return 0;
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}
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/*
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To prevent confusion, console selection is gross:
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by 0 assumed SMC1 and by 1 assumed SMC2
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*/
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struct platform_device* early_uart_get_pdev(int index)
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{
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bd_t *bd = (bd_t *) __res;
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struct fs_uart_platform_info *pinfo;
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struct platform_device* pdev = NULL;
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if(index) { /*assume SMC2 here*/
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pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
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pinfo = &mpc866_uart_pdata[1];
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} else { /*over SMC1*/
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pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
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pinfo = &mpc866_uart_pdata[0];
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}
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pinfo->uart_clk = bd->bi_intfreq;
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pdev->dev.platform_data = pinfo;
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ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
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return NULL;
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}
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arch_initcall(mpc866ads_init);
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@ -20,6 +20,7 @@
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#include <linux/device.h>
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#include <linux/fs_enet_pd.h>
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#include <linux/fs_uart_pd.h>
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#include <linux/mii.h>
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#include <asm/delay.h>
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#include <asm/ppc_sys.h>
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extern unsigned char __res[];
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static void setup_smc1_ioports(void);
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static void setup_smc2_ioports(void);
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static void __init mpc885ads_scc_phy_init(char);
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static struct fs_uart_platform_info mpc885_uart_pdata[] = {
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[fsid_smc1_uart] = {
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.brg = 1,
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.fs_no = fsid_smc1_uart,
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.init_ioports = setup_smc1_ioports,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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[fsid_smc2_uart] = {
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.brg = 2,
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.fs_no = fsid_smc2_uart,
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.init_ioports = setup_smc2_ioports,
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.tx_num_fifo = 4,
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.tx_buf_size = 32,
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.rx_num_fifo = 4,
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.rx_buf_size = 32,
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},
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};
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static struct fs_mii_bus_info fec_mii_bus_info = {
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.method = fsmii_fec,
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.id = 0,
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@ -116,6 +140,8 @@ void __init board_init(void)
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#ifdef CONFIG_SERIAL_CPM_SMC1
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cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
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clrbits32(bcsr_io, BCSR1_RS232EN_1);
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cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
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cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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#else
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setbits32(bcsr_io,BCSR1_RS232EN_1);
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cp->cp_smc[0].smc_smcmr = 0;
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@ -126,6 +152,8 @@ void __init board_init(void)
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cp->cp_simode &= ~(0xe0000000 >> 1);
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cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
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clrbits32(bcsr_io,BCSR1_RS232EN_2);
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cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
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cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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#else
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setbits32(bcsr_io,BCSR1_RS232EN_2);
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cp->cp_smc[1].smc_smcmr = 0;
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@ -343,6 +371,70 @@ static void mpc885ads_scc_phy_init(char phy_addr)
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out_be32(&fecp->fec_mii_speed, 0);
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}
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static void setup_smc1_ioports(void)
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{
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immap_t *immap = (immap_t *) IMAP_ADDR;
|
||||
unsigned *bcsr_io;
|
||||
unsigned int iobits = 0x000000c0;
|
||||
|
||||
bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
|
||||
|
||||
if (bcsr_io == NULL) {
|
||||
printk(KERN_CRIT "Could not remap BCSR1\n");
|
||||
return;
|
||||
}
|
||||
clrbits32(bcsr_io,BCSR1_RS232EN_1);
|
||||
iounmap(bcsr_io);
|
||||
|
||||
setbits32(&immap->im_cpm.cp_pbpar, iobits);
|
||||
clrbits32(&immap->im_cpm.cp_pbdir, iobits);
|
||||
clrbits16(&immap->im_cpm.cp_pbodr, iobits);
|
||||
}
|
||||
|
||||
static void setup_smc2_ioports(void)
|
||||
{
|
||||
immap_t *immap = (immap_t *) IMAP_ADDR;
|
||||
unsigned *bcsr_io;
|
||||
unsigned int iobits = 0x00000c00;
|
||||
|
||||
bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
|
||||
|
||||
if (bcsr_io == NULL) {
|
||||
printk(KERN_CRIT "Could not remap BCSR1\n");
|
||||
return;
|
||||
}
|
||||
clrbits32(bcsr_io,BCSR1_RS232EN_2);
|
||||
iounmap(bcsr_io);
|
||||
|
||||
#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
|
||||
setbits32(&immap->im_cpm.cp_pbpar, iobits);
|
||||
clrbits32(&immap->im_cpm.cp_pbdir, iobits);
|
||||
clrbits16(&immap->im_cpm.cp_pbodr, iobits);
|
||||
#else
|
||||
setbits16(&immap->im_ioport.iop_papar, iobits);
|
||||
clrbits16(&immap->im_ioport.iop_padir, iobits);
|
||||
clrbits16(&immap->im_ioport.iop_paodr, iobits);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
|
||||
int idx)
|
||||
{
|
||||
bd_t *bd = (bd_t *) __res;
|
||||
struct fs_uart_platform_info *pinfo;
|
||||
int num = ARRAY_SIZE(mpc885_uart_pdata);
|
||||
|
||||
int id = fs_uart_id_smc2fsid(idx);
|
||||
|
||||
/* no need to alter anything if console */
|
||||
if ((id <= num) && (!pdev->dev.platform_data)) {
|
||||
pinfo = &mpc885_uart_pdata[id];
|
||||
pinfo->uart_clk = bd->bi_intfreq;
|
||||
pdev->dev.platform_data = pinfo;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static int mpc885ads_platform_notify(struct device *dev)
|
||||
{
|
||||
|
||||
|
@ -355,6 +447,10 @@ static int mpc885ads_platform_notify(struct device *dev)
|
|||
.bus_id = "fsl-cpm-scc",
|
||||
.rtn = mpc885ads_fixup_scc_enet_pdata,
|
||||
},
|
||||
{
|
||||
.bus_id = "fsl-cpm-smc:uart",
|
||||
.rtn = mpc885ads_fixup_uart_pdata
|
||||
},
|
||||
{
|
||||
.bus_id = NULL
|
||||
}
|
||||
|
@ -362,6 +458,7 @@ static int mpc885ads_platform_notify(struct device *dev)
|
|||
|
||||
platform_notify_map(dev_map,dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init mpc885ads_init(void)
|
||||
|
@ -383,7 +480,41 @@ int __init mpc885ads_init(void)
|
|||
ppc_sys_device_enable(MPC8xx_CPM_FEC2);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC1
|
||||
ppc_sys_device_enable(MPC8xx_CPM_SMC1);
|
||||
ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC2
|
||||
ppc_sys_device_enable(MPC8xx_CPM_SMC2);
|
||||
ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(mpc885ads_init);
|
||||
|
||||
/*
|
||||
To prevent confusion, console selection is gross:
|
||||
by 0 assumed SMC1 and by 1 assumed SMC2
|
||||
*/
|
||||
struct platform_device* early_uart_get_pdev(int index)
|
||||
{
|
||||
bd_t *bd = (bd_t *) __res;
|
||||
struct fs_uart_platform_info *pinfo;
|
||||
|
||||
struct platform_device* pdev = NULL;
|
||||
if(index) { /*assume SMC2 here*/
|
||||
pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
|
||||
pinfo = &mpc885_uart_pdata[1];
|
||||
} else { /*over SMC1*/
|
||||
pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
|
||||
pinfo = &mpc885_uart_pdata[0];
|
||||
}
|
||||
|
||||
pinfo->uart_clk = bd->bi_intfreq;
|
||||
pdev->dev.platform_data = pinfo;
|
||||
ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -14,11 +14,40 @@
|
|||
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mpc8260.h>
|
||||
#include <asm/cpm2.h>
|
||||
#include <asm/immap_cpm2.h>
|
||||
|
||||
void __init
|
||||
m82xx_board_setup(void)
|
||||
{
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
|
||||
|
||||
/* Enable the 2nd UART port */
|
||||
*(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2;
|
||||
clrbits32(bcsr, BCSR1_RS232_EN2);
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC1
|
||||
clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC2
|
||||
clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC3
|
||||
clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC4
|
||||
clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
iounmap(bcsr);
|
||||
iounmap(immap);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue