mvebu dt64 for 4.9 (part 2)

- enable MSI for PCIe on Armada 7K/8K
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlfZZyIACgkQCwYYjhRyO9WV9wCgplO/RTXtSazA02kkUsDSPezd
 tVkAnREnwZSo9CzGdQnEztgOpihvgBMH
 =2st8
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu into next/dt64

Pull "mvebu dt64 for 4.9 (part 2)" from Gregory CLEMENT:

- enable MSI for PCIe on Armada 7K/8K

* tag 'mvebu-dt64-4.9-2' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
This commit is contained in:
Arnd Bergmann 2016-09-19 22:29:45 +02:00
commit 473326a8d0
2 changed files with 6 additions and 0 deletions

View File

@ -176,6 +176,7 @@ cpm_pcie0: pcie@f2600000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -201,6 +202,7 @@ cpm_pcie1: pcie@f2620000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -227,6 +229,7 @@ cpm_pcie2: pcie@f2640000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =

View File

@ -176,6 +176,7 @@ cps_pcie0: pcie@f4600000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -201,6 +202,7 @@ cps_pcie1: pcie@f4620000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -227,6 +229,7 @@ cps_pcie2: pcie@f4640000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =