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drm/i915: add PIXCLK_GATE register
Pixel clock gating control for Lynx point. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4128,4 +4128,10 @@
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#define SBI_RESPONSE_SUCCESS (0x0<<1)
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#define SBI_BUSY (0x1<<0)
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#define SBI_READY (0x0<<0)
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/* LPT PIXCLK_GATE */
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#define PIXCLK_GATE 0xC6020
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#define PIXCLK_GATE_UNGATE 1<<0
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#define PIXCLK_GATE_GATE 0<<0
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#endif /* _I915_REG_H_ */
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