mirror of https://gitee.com/openkylin/linux.git
drm/i915/icl: Wa_1406838659
Disable CGPSF unit clock gating to prevent an issue. v2: Rebased on top of the WA refactoring v3: Added References (Mika) v4: - Rebased - C, not lisp (Chris) - Remove unintentional whitespaces (Mika) - Fixed in C0 (Mika) References: HSDES#1406838659 Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-13-git-send-email-oscar.mateo@intel.com
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@ -3848,6 +3848,9 @@ enum {
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#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
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#define VFUNIT_CLKGATE_DIS (1 << 20)
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#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
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#define CGPSF_CLKGATE_DIS (1 << 3)
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/*
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* Display engine regs
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*/
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@ -755,6 +755,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
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I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER,
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I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) |
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GEN11_I2M_WRITE_DISABLE);
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/* Wa_1406838659:icl (pre-prod) */
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if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
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I915_WRITE(INF_UNIT_LEVEL_CLKGATE,
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I915_READ(INF_UNIT_LEVEL_CLKGATE) |
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CGPSF_CLKGATE_DIS);
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}
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void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
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