mirror of https://gitee.com/openkylin/linux.git
MIPS: merge __ioremap_mode into ioremap_prot
There is no reason to have two ioremap with flags interfaces. Merge the historic mips __ioremap_mode into ioremap_prot which is a generic kernel interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -156,9 +156,17 @@ static inline void *isa_bus_to_virt(unsigned long address)
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extern void __iomem * __ioremap(phys_addr_t offset, phys_addr_t size, unsigned long flags);
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extern void __iomem * __ioremap(phys_addr_t offset, phys_addr_t size, unsigned long flags);
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extern void __iounmap(const volatile void __iomem *addr);
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extern void __iounmap(const volatile void __iomem *addr);
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static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long size,
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/*
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unsigned long flags)
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* ioremap_prot - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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* ioremap_prot gives the caller control over cache coherency attributes (CCA)
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*/
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static inline void __iomem *ioremap_prot(phys_addr_t offset,
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unsigned long size, unsigned long prot_val)
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{
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{
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unsigned long flags = prot_val & _CACHE_MASK;
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void __iomem *addr = plat_ioremap(offset, size, flags);
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void __iomem *addr = plat_ioremap(offset, size, flags);
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if (addr)
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if (addr)
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@ -202,18 +210,6 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
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#undef __IS_LOW512
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#undef __IS_LOW512
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}
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}
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/*
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* ioremap_prot - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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* ioremap_prot gives the caller control over cache coherency attributes (CCA)
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*/
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static inline void __iomem *ioremap_prot(phys_addr_t offset,
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unsigned long size, unsigned long prot_val) {
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return __ioremap_mode(offset, size, prot_val & _CACHE_MASK);
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}
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/*
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/*
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* ioremap - map bus memory into CPU space
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* ioremap - map bus memory into CPU space
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* @offset: bus address of the memory
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* @offset: bus address of the memory
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@ -226,7 +222,7 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset,
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* address.
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* address.
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*/
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*/
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#define ioremap(offset, size) \
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#define ioremap(offset, size) \
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__ioremap_mode((offset), (size), _CACHE_UNCACHED)
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ioremap_prot((offset), (size), _CACHE_UNCACHED)
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#define ioremap_uc ioremap
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#define ioremap_uc ioremap
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/*
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/*
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@ -245,7 +241,7 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset,
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* memory-like regions on I/O busses.
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* memory-like regions on I/O busses.
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*/
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*/
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#define ioremap_cache(offset, size) \
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#define ioremap_cache(offset, size) \
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__ioremap_mode((offset), (size), _page_cachable_default)
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ioremap_prot((offset), (size), _page_cachable_default)
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/*
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/*
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* ioremap_wc - map bus memory into CPU space
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* ioremap_wc - map bus memory into CPU space
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@ -266,7 +262,7 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset,
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* _CACHE_UNCACHED option (see cpu_probe() method).
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* _CACHE_UNCACHED option (see cpu_probe() method).
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*/
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*/
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#define ioremap_wc(offset, size) \
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#define ioremap_wc(offset, size) \
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__ioremap_mode((offset), (size), boot_cpu_data.writecombine)
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ioremap_prot((offset), (size), boot_cpu_data.writecombine)
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static inline void iounmap(const volatile void __iomem *addr)
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static inline void iounmap(const volatile void __iomem *addr)
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{
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{
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