openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

64bit dts changes with some adjustments to the pcie controller, 

usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
 a phandle to the rk3399 tsadc and converting boards to use the
 recently introduced pin constants.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBUMUQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgeszCAC0VNLtUhe6ksHGJzvgP1diZLPghPsKticu
 tmpxFVJrZTYFmxacvO3w2rXNvwtWsay812m+wmpbCYe2rpE1WwRYEhDIVbQ0hIuD
 I7fiG6wKaGVEu+5XmVi+6tGouGKSZA0zBlcOja4kFeBPsyDDL0SISu1iopfD/o0z
 u/2EfcBRQFLUotLKLY8t//I+RJ4IsDMQ4zh1AJ1NDfUVCqthE7sJzoa8eJuHaKjj
 YPKdfJlUIZAXJiXuDrjrkkbUQT0GuYha0CtWE2nUn4clfrIWivvgJCXFfEnKtM9+
 OguqMChemOXL7SanHGKqM4RHL6Qq0F3Y162UODDX2AC3QYxxv8XK
 =i0J0
 -----END PGP SIGNATURE-----

Merge tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

64bit dts changes with some adjustments to the pcie controller,
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.

* tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
  arm64: dts: rockchip: add aspm-no-l0s for rk3399
  arm64: dts: rockchip: add max-link-speed for rk3399
  arm64: dts: rockchip: use pin constants to describe gpios
  arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
  arm64: dts: rockchip: add rk3399 eDP HPD pinctrl
  arm64: dts: rockchip: add rk3399 thermal_zones phandle

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-01-29 14:42:21 -08:00
parent 560741d7d9 8cbb59af7e
commit dc6328feeb
7 changed files with 66 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
View File

@ -90,7 +90,7 @@ backlight: backlight {
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <128>;
enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
@ -101,7 +101,7 @@ emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
keys: gpio-keys {
@ -111,7 +111,7 @@ keys: gpio-keys {
power {
wakeup-source;
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@ -121,7 +121,7 @@ power {
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@ -166,7 +166,7 @@ &gmac {
phy-supply = <&vcc_lan>;
phy-mode = "rmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 12 0>;
snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
pinctrl-names = "default";

10
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
View File

@ -66,7 +66,7 @@ ext_gmac: gmac-clk {
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@ -77,7 +77,7 @@ keys: gpio-keys {
pinctrl-0 = <&pwr_key>;
power {
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
@ -88,13 +88,13 @@ leds: gpio-leds {
compatible = "gpio-leds";
blue {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "geekbox:blue:led";
default-state = "on";
};
red {
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
label = "geekbox:red:led";
default-state = "off";
};
@ -146,7 +146,7 @@ rk808: pmic@1b {
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
interrupt-parent = <&gpio0>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
rockchip,system-power-controller;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;

14
arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
View File

@ -61,7 +61,7 @@ emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
ext_gmac: external-gmac-clock {
@ -78,7 +78,7 @@ keys: gpio-keys {
power {
wakeup-source;
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@ -88,7 +88,7 @@ leds: gpio-leds {
compatible = "gpio-leds";
red {
gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
label = "orion:red:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
@ -96,7 +96,7 @@ red {
};
blue {
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
label = "orion:blue:led";
pinctrl-names = "default";
pinctrl-0 = <&stby_pwren>;
@ -117,7 +117,7 @@ vcc_18: vcc18-regulator {
/* supplies both host and otg */
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 4 GPIO_ACTIVE_LOW>;
gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@ -149,7 +149,7 @@ vcc_lan: vcc-lan-regulator {
vcc_sd: vcc-sd-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sd";
gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_io>;
@ -217,7 +217,7 @@ &gmac {
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 12 0>;
snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
tx_delay = <0x30>;

10
arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
View File

@ -63,7 +63,7 @@ keys: gpio-keys {
pinctrl-0 = <&pwr_key>;
power {
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
wakeup-source;
@ -105,7 +105,7 @@ rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <&gpio0>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
rockchip,system-power-controller;
@ -236,7 +236,7 @@ accelerometer@18 {
compatible = "bosch,bma250";
reg = <0x18>;
interrupt-parent = <&gpio2>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
};
};
@ -247,8 +247,8 @@ gsl1680: touchscreen@40 {
compatible = "silead,gsl1680";
reg = <0x40>;
interrupt-parent = <&gpio3>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
power-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
interrupts = <RK_PD4 IRQ_TYPE_EDGE_FALLING>;
power-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
silead,max-fingers = <5>;

16
arch/arm64/boot/dts/rockchip/rk3368-r88.dts
View File

@ -61,7 +61,7 @@ emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
};
keys: gpio-keys {
@ -71,7 +71,7 @@ keys: gpio-keys {
power {
wakeup-source;
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
};
@ -81,7 +81,7 @@ leds: gpio-leds {
compatible = "gpio-leds";
work {
gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
label = "r88:green:led";
pinctrl-names = "default";
pinctrl-0 = <&led_ctl>;
@ -90,7 +90,7 @@ work {
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_int>;
};
@ -104,10 +104,10 @@ sdio_pwrseq: sdio-pwrseq {
reset-gpios =
/* BT_RST_N */
<&gpio3 5 GPIO_ACTIVE_LOW>,
<&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
/* WL_REG_ON */
<&gpio3 4 GPIO_ACTIVE_LOW>;
<&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
};
vcc_18: vcc18-regulator {
@ -124,7 +124,7 @@ vcc_18: vcc18-regulator {
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
@ -199,7 +199,7 @@ &gmac {
phy-supply = <&vcc_lan>;
phy-mode = "rmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 12 0>;
snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
pinctrl-names = "default";

8
arch/arm64/boot/dts/rockchip/rk3399-evb.dts
View File

@ -85,7 +85,7 @@ backlight: backlight {
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
pwms = <&pwm0 0 25000 0>;
};
@ -128,7 +128,7 @@ vcc5v0_sys: vcc5v0-sys {
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
regulator-name = "vcc5v0_host";
@ -163,7 +163,7 @@ &gmac {
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x28>;
@ -196,7 +196,7 @@ &pcie_phy {
};
&pcie0 {
ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn>;

41
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -283,6 +283,7 @@ pcie0: pcie@f8000000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
aspm-no-l0s;
bus-range = <0x0 0x1>;
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
@ -297,6 +298,7 @@ pcie0: pcie@f8000000 {
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
max-link-speed = <1>;
msi-map = <0x0 &its 0x0 0x1000>;
phys = <&pcie_phy>;
phy-names = "pcie-phy";
@ -321,8 +323,10 @@ usb_host0_ehci: usb@fe380000 {
compatible = "generic-ehci";
reg = <0x0 0xfe380000 0x0 0x20000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
clock-names = "hclk_host0", "hclk_host0_arb";
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
<&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>;
phy-names = "usb";
status = "disabled";
@ -332,8 +336,12 @@ usb_host0_ohci: usb@fe3a0000 {
compatible = "generic-ohci";
reg = <0x0 0xfe3a0000 0x0 0x20000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
clock-names = "hclk_host0", "hclk_host0_arb";
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
<&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>;
phy-names = "usb";
status = "disabled";
};
@ -341,8 +349,10 @@ usb_host1_ehci: usb@fe3c0000 {
compatible = "generic-ehci";
reg = <0x0 0xfe3c0000 0x0 0x20000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
clock-names = "hclk_host1", "hclk_host1_arb";
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
<&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>;
phy-names = "usb";
status = "disabled";
@ -352,8 +362,12 @@ usb_host1_ohci: usb@fe3e0000 {
compatible = "generic-ohci";
reg = <0x0 0xfe3e0000 0x0 0x20000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
clock-names = "hclk_host1", "hclk_host1_arb";
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
<&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>;
phy-names = "usb";
status = "disabled";
};
@ -607,7 +621,7 @@ spi5: spi@ff200000 {
status = "disabled";
};
thermal-zones {
thermal_zones: thermal-zones {
cpu_thermal: cpu {
polling-delay-passive = <100>;
polling-delay = <1000>;
@ -1077,6 +1091,7 @@ wafer_info: wafer-info@1c {
pmucru: pmu-clock-controller@ff750000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
rockchip,grf = <&pmugrf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&pmucru PLL_PPLL>;
@ -1086,6 +1101,7 @@ pmucru: pmu-clock-controller@ff750000 {
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
@ -1436,6 +1452,13 @@ clk_32k: clk-32k {
};
};
edp {
edp_hpd: edp-hpd {
rockchip,pins =
<4 23 RK_FUNC_2 &pcfg_pull_none>;
};
};
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins =