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ARM: AM33XX: Add aes0 crypto clock data 

Add clock data for for the SHA0 crypto module
on the am33xx SoC.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Mark A. Greer 2012-12-21 09:28:13 -07:00 committed by Paul Walmsley
parent 53335acc44
commit ff2acd7d5d
1 changed files with 5 additions and 0 deletions
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5
arch/arm/mach-omap2/cclock33xx_data.c
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@ -417,6 +417,10 @@ static struct clk sha0_fck;
DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL); DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL);
DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null); DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null);
static struct clk aes0_fck;
DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);
DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);
/* /*
* Modules clock nodes * Modules clock nodes
* *
@ -883,6 +887,7 @@ static struct omap_clk am33xx_clks[] = {
CLK(NULL, "smartreflex0_fck", &smartreflex0_fck), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck),
CLK(NULL, "smartreflex1_fck", &smartreflex1_fck), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck),
CLK(NULL, "sha0_fck", &sha0_fck), CLK(NULL, "sha0_fck", &sha0_fck),
CLK(NULL, "aes0_fck", &aes0_fck),
CLK(NULL, "timer1_fck", &timer1_fck), CLK(NULL, "timer1_fck", &timer1_fck),
CLK(NULL, "timer2_fck", &timer2_fck), CLK(NULL, "timer2_fck", &timer2_fck),
CLK(NULL, "timer3_fck", &timer3_fck), CLK(NULL, "timer3_fck", &timer3_fck),