Commit Graph

5454 Commits

Author SHA1 Message Date
Linus Torvalds ca2a88f56a MTD pull for 3.8
- Various cleanups especially in NAND tests
  - Add support for NAND flash on BCMA bus
  - DT support for sh_flctl and denali NAND drivers
  - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
  - Fix JFFS2 locking bug in ENOMEM failure path
  - New SPI flash chips, as usual
  - Support writing in 'reliable mode' for DiskOnChip G4
  - Debugfs support in nandsim
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iEYEABECAAYFAlDSAa4ACgkQdwG7hYl686MMcACeNYa//ghPtccb5L+IRXsqaFDL
 Yi4AoLWOaOjN8qM4KUF/bfMEkwNGAePz
 =DaAQ
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
2012-12-19 12:47:41 -08:00
Linus Torvalds c2714334b9 ARM: arm-soc: Updates for Marvell mvebu/kirkwood
This is a branch with updates for Marvell's mvebu/kirkwood platforms. They
 came in late-ish, and were heavily interdependent such that it didn't
 make sense to split them up across the cross-platform topic branches. So
 here they are (for the second release in a row) in a branch on their own.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQy5i9AAoJEIwa5zzehBx3ZskP/2wxjbwEaNdnR+7j8595bTaa
 GYq8qJ4lUCOKmSqp3bQkg/Plm2D88p78BO5qTm2io527gl10HemzCiGaejclujIw
 sDFZPAE8K0Z8p0gQcBNlRZNuI3J1N6IKRqYH5SIJ2vWmBMfO7nKRR9nmTiDpm5bx
 IcuKX2u/mhyXWN+F0EcHqcupH1K+mdzyGdIQk80Tyqni+UTN+pd0efLM6WL4SFJM
 5fj64dDFpVDA8t+O2Avz8p+lx07vkSy2wIXWt7Ik9BVtsyZQecn+9lpl8FvcrSK/
 MgL3QO4kqDpJDs88M7DJURU1/EdsWZc32M63avctaWnGWItQAbOJYBDmZTlng08x
 ZGrKOgf/I6le7wEpnzdag9ymI/rAL8I0755FkfXxf1R7/X40b+t8/61J/ddOKTDs
 1sTVt+eKyyIMWle4V4zENa03goVBApCIEXcmnuFisFNbBY6azV31inJEp/3PvpgE
 GeMBfxBDkvn+03LkRFcZlhTeDsNTdctD+sfgrNPaQf5bZGIvEz87vgfNTIiaU3GA
 Vd5aiainVDQgmpoFfRG6391gdFlF2l9d67LoG4ClCjn4WL+UxcTRuzBW/liORpUO
 E7CwMHtPq6eoGKywiKMFRzY2QRIKZRkxrC2PCJ/1V9mbIGwgaD/3BQ2/czwrnc8q
 1gnxWx8E5SKEGcDJXD+6
 =7luC
 -----END PGP SIGNATURE-----

Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
 "This is a branch with updates for Marvell's mvebu/kirkwood platforms.
  They came in late-ish, and were heavily interdependent such that it
  didn't make sense to split them up across the cross-platform topic
  branches.  So here they are (for the second release in a row) in a
  branch on their own."

* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
  arm: l2x0: add aurora related properties to OF binding
  arm: mvebu: add Aurora L2 Cache Controller to the DT
  arm: mvebu: add L2 cache support
  dma: mv_xor: fix error handling path
  dma: mv_xor: fix error checking of irq_of_parse_and_map()
  dma: mv_xor: use request_irq() instead of devm_request_irq()
  dma: mv_xor: clear the window override control registers
  arm: mvebu: fix address decoding armada_cfg_base() function
  ARM: mvebu: update defconfig with I2C and RTC support
  ARM: mvebu: Add SATA support for OpenBlocks AX3-4
  ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C controllers in Armada 370/XP
  arm: mvebu: Add hardware I/O Coherency support
  arm: plat-orion: Add coherency attribute when setup mbus target
  arm: dma mapping: Export a dma ops function arm_dma_set_mask
  arm: mvebu: Add SMP support for Armada XP
  arm: mm: Add support for PJ4B cpu and init routines
  arm: mvebu: Add IPI support via doorbells
  arm: mvebu: Add initial support for power managmement service unit
  ...
2012-12-14 14:54:26 -08:00
Linus Torvalds 0beb58783f ARM: arm-soc: Device-tree updates, take 2
This branch contains device-tree updates for the SPEAr platform.
 They had dependencies on earlier branches from this merge window,
 which is why they were broken out in a separate branch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQy5h1AAoJEIwa5zzehBx3TukP/ijMApMtSf5NuGfjeHz0eh18
 JdWVa+89Bgrf1ggVWrnrdfMjHVjsQlu/pwGQF9BY3QmmVlyQIjcxEUMmZ2tw69rw
 wMu17S40Hv746XHB7zkg8HDMzYL7btwxUeo8hX4NUQZSaL82VVB/RndZyIkWQ11q
 FqUG1CS4tunw75sedbJI0NukV9rHF29XYTfAKOqpuBbHC+fNAZDSZIoHNQSJmdQi
 lUc8uw0WD9cZBJN+yt4qKUv6B07Tkc8yPCKiDj+onwEddWahHsLEO+q2e15Llb6x
 qThG2tgtC4WqqrGyxjZHgIwy/uis6v0jerN9CbUTOUeJP3XosC9xg4novWvH6vrK
 K3iQnC5Pl7FGIxIjJoLbttbkVTz9SqLuFa31cAdjTPODC2D7trPKqFoJMQA2DjU3
 XqTJc/Q6Xbgee1qGWjdulDTFBK6zsqbdSC/uB/Ro6FRsOToypdB4AVQo4gl9I5g3
 dUC6ZghgOlbff0pFazSsfMDQOmzyBq4694Xnosq7C/KkLL1HyRe8qqEg/gBfPcQZ
 NKXzoIrGIR1pTs9VN00ScBMWtbJWd9OkVMc3aGUQZA+gIUE2ExNfzls0n+1pAhAb
 god1Aq0s1ZWqGSeguENRGMN/lUYYN8TCeOlTIY3eKPxw9ybwSxOdCyH2iLlXOYHj
 l1J6msYWvhULWpLQST7r
 =iK4W
 -----END PGP SIGNATURE-----

Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree updates, take 2, from Olof Johansson:
 "This branch contains device-tree updates for the SPEAr platform.  They
  had dependencies on earlier branches from this merge window, which is
  why they were broken out in a separate branch."

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
  ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
  ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
  ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
  ARM: SPEAr1310: Fix AUXDATA for compact flash controller
  ARM: SPEAr13xx: Remove fields not required for ssp controller
  ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
  ARM: SPEAr: DT: Update device nodes
  ARM: SPEAr: DT: add uart state to fix warning
  ARM: SPEAr: DT: Modify DT bindings for STMMAC
  ARM: SPEAr: DT: Fix existing DT support
  ARM: SPEAr: DT: Update partition info for MTD devices
  ARM: SPEAr: DT: Update pinctrl list
  ARM: SPEAr13xx: DT: Add spics gpio controller nodes
2012-12-14 14:42:53 -08:00
Linus Torvalds b8edf848e9 ARM: arm-soc: multiplatform conversion patches
Here are more patches in the progression towards multiplatform, sparse
 irq conversions in particular.
 
 Tegra has a handful of cleanups and general groundwork, but is
 not quite there yet on full enablement.
 
 Platforms that are enabled through this branch are VT8500 and Zynq. note
 that i.MX was converted in one of the earlier cleanup branches as
 well (before we started a separate topic for multiplatform). And both
 new platforms for this merge window, sunxi and bcm, were merged with
 multiplatform support enabled.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQySb/AAoJEIwa5zzehBx3Wo4P/0GrpUhB/qwuhgy43MA2I1Dv
 tnyuFvsfW9uRExcw2IwT39GFls98QUM9TwQxPqOTHVf+u0LkYMZ9aDeWJOdj3RvG
 H70Ypj4gZDrzZAFr2TUf8NnYGHd6G2EcMn3261Hjfd7YrswCjsMPvgRns7VOyHCa
 deif3KcLu3+HzxvuzqlVlTuSAagCQbfqqnTQduMRdJPHT3X3sXwl7ABW+qfOoeYC
 rjqIbjdh5dB1d/f7igtgBbXjSTnVz/Mr1+wk4rp9Xr1Wv0IXvIaSKjK2Df8ZuNAk
 aQ6mMy/oDVxlDSrYv0F7lB40/rsZcPqz8+fgYJ2FnvCpIM7z7NeTWD2kQJ2UaQ/s
 VunShloRxF8It6104EVWZDfEA9NvVBcCALSze0NukqiHZRZYGUzxRNQDrncaksC9
 Lm+Z16cUWogsZq7VDCgXYQJeakPQfBDnsx7siMvAbOgvtpSClxuwhdC/czJiix7h
 BcpA+l5xSviUhHvzHhDt9iJxHjbUmo1xLDvaZSgj2OjAj257JcwaNBCk5BjZTCwe
 xZmQu1FjwaGtjLiG6QY0WJRsq1hiFRIb/MaWar/WpfqADFqARoambGFUjOl+P4Mu
 DIM5Z0AS04H+pLuP1QOz/yXxOPEP6Ri36to6XrgzfL/XGet5LW2P59xXxhcWC/OL
 /3IAcQrsAqh4aGMOstW1
 =UJlh
 -----END PGP SIGNATURE-----

Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform conversion patches from Olof Johansson:
 "Here are more patches in the progression towards multiplatform, sparse
  irq conversions in particular.

  Tegra has a handful of cleanups and general groundwork, but is not
  quite there yet on full enablement.

  Platforms that are enabled through this branch are VT8500 and Zynq.
  Note that i.MX was converted in one of the earlier cleanup branches as
  well (before we started a separate topic for multiplatform).  And both
  new platforms for this merge window, sunxi and bcm, were merged with
  multiplatform support enabled."

Fix up conflicts mostly as per Olof.

* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: tegra: move debug-macro.S to include/debug
  ARM: tegra: don't include iomap.h from debug-macro.S
  ARM: tegra: decouple uncompress.h and debug-macro.S
  ARM: tegra: simplify DEBUG_LL UART selection options
  ARM: tegra: select SPARSE_IRQ
  ARM: tegra: enhance timer.c to get IO address from device tree
  ARM: tegra: enhance timer.c to get IRQ info from device tree
  ARM: timer: fix checkpatch warnings
  ARM: tegra: add TWD to device tree
  ARM: tegra: define DT bindings for and instantiate RTC
  ARM: tegra: define DT bindings for and instantiate timer
  clocksource/mtu-nomadik: use apb_pclk
  clk: ux500: Register mtu apb_pclocks
  ARM: plat-nomadik: convert platforms to SPARSE_IRQ
  mfd/db8500-prcmu: use the irq_domain_add_simple()
  mfd/ab8500-core: use irq_domain_add_simple()
  ...
2012-12-13 10:57:16 -08:00
Linus Torvalds db5b0ae007 ARM: arm-soc: device tree conversions and enablement
Continued device tree conversion and enablement across a number of
 platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
 smaller series as well.
 
 ux500 has seen continued conversion for platforms. Several platforms have
 seen pinctrl-via-devicetree conversions for simpler multiplatform. Tegra
 is adding data for new devices/drivers, and Exynos has a bunch of new
 bindings and devices added as well.
 
 So, pretty much the same progression in the right direction as the last
 few releases.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQySW7AAoJEIwa5zzehBx39xcP/jzEQOTOJdK4zJd1OjgrQoX/
 WnhbGJT941RNjRjvDG6HmZzhpsRoE4q/zkjFEKoKELdikRW0hYoR+zPCGuB7XtN5
 aF1ZQrTx4gHf4KE7doIB8slaWeOq8aG2TLFhylyy+cuaIpRK0NG0pAR0ZqWaoga9
 tZFciqzplLeo50vZ+y+lVVsR40j/w29EjwPXhCV30//gGOYLyp/VDu5PRtrBdgh8
 EgpcT2EWJwMCN/Upcao/q2JbQktPHPpSwnpaUAALYB20uD7k5jo7wtYE/+L9nn6B
 bxcCDTMVmqzNTF+y0P16hDcs5jMLVjpI0xBiyZ1G6gShpggsSZCHY5ynjAtQ19se
 r+2WrNfOR23k6arJuOUAQSEnLdx0T5SlW6CJeFEofKv4uoebxAbKUiNO4ShWskhd
 nNptX1+L3hj3zpjGcEHmL6bd+nGtyMeoG9Yekcv1oZxdVcpKhFxh0s5PEJBEeXcN
 M7aAWlWJkplV22Olqhpc/3INCweq6E+zBrBxZaUBW/JCzGrqBUGC0BULDPAkmC4J
 CKL6IqIB73jGQ4OY14IaMU20GJrIGxZ7wzXOp4aw3OUpRlxsgurfyFQeIjUvVoZL
 PJ8DRoAVwreVHvKfgZZVKpSAY7dwcWbxpWsYlrH3zWIC5vRJ0UFwsD0TpLJWd6Vi
 XA8gQcJRWKGS8E5mRY39
 =Rk9v
 -----END PGP SIGNATURE-----

Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree conversions and enablement from Olof Johansson:
 "Continued device tree conversion and enablement across a number of
  platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
  smaller series as well.

  ux500 has seen continued conversion for platforms.  Several platforms
  have seen pinctrl-via-devicetree conversions for simpler
  multiplatform.  Tegra is adding data for new devices/drivers, and
  Exynos has a bunch of new bindings and devices added as well.

  So, pretty much the same progression in the right direction as the
  last few releases."

Fix up conflicts as per Olof.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (185 commits)
  ARM: ux500: Rename dbx500 cpufreq code to be more generic
  ARM: dts: add missing ux500 device trees
  ARM: ux500: Stop registering the PCM driver from platform code
  ARM: ux500: Move board specific GPIO info out to subordinate DTS files
  ARM: ux500: Disable the MMCI gpio-regulator by default
  ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
  ARM: Kirkwood: Add support LED of OpenBlocks A6
  ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
  ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
  ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
  ARM: kirkwood: Add support DT of second I2C bus
  ARM: kirkwood: Convert mplcec4 board to pinctrl
  ARM: Kirkwood: Convert km_kirkwood to pinctrl
  ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
  ARM: Kirkwood: Convert IX2-200 to pinctrl.
  ARM: Kirkwood: Convert lsxl boards to pinctrl.
  ARM: Kirkwood: Convert ib62x0 to pinctrl.
  ARM: Kirkwood: Convert GoFlex Net to pinctrl.
  ARM: Kirkwood: Convert dreamplug to pinctrl.
  ARM: Kirkwood: Convert dockstar to pinctrl.
  ...
2012-12-13 10:39:26 -08:00
Linus Torvalds d027db132b ARM: arm-soc: SoC updates for 3.8
This contains the bulk of new SoC development for this merge window.
 
 Two new platforms have been added, the sunxi platforms (Allwinner A1x
 SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
 series of ARMv7 platforms from them, where the hope is that we can
 keep the platform code generic enough to have them all share one mach
 directory. The new Broadcom platform is contributed by Christian Daudt.
 
 Highbank has grown support for Calxeda's next generation of hardware,
 ECX-2000.
 
 clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also
 taken on maintainership of the platform.
 
 Beyond this there has been a bunch of work from a number of people on
 converting more platforms to IRQ domains, pinctrl conversion, cleanup
 and general feature enablement across most of the active platforms.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQyLCjAAoJEIwa5zzehBx3AdQP/R+L3+EQMjiEWt/p7g/ql5Em
 0SnP92CcGzrjgLTg9z1FeOazfOsGnkZAYUlDRkqfKobH3VqkhYFFtt1/0x0KMahm
 xcowHgMBOyimFdWT9vLK3J8U6DLui5XrEG9LGH2VL+lqmfjIyP/OOF3mVc0/+pV9
 WTLAsYswdBRSeiNuF43kqlfrOwF6xsPLgiNMlc82w6BzHqoHu6dOif5M9MqWaApS
 V74DPmwLD371Tyit6aHqt3JOqpgiPSHlmxkzomK+5idcW3Pa7HnzzFYmx85dk/eN
 J2siqIkoOu7tEfjIbNZTL2MYoX4tUUKv4qZZ3IOl3YSWaV3P5ilMApF01XVrkk8E
 DWOMhzte9hC7L90W+/kCPLF1VyeAhCem2KQWUitO71fKur3r+3ZaUokNVvWzkJIL
 7aduxAJOV2hfLgEqbjbjF3o4S8p63OV3kzivFJM1And15zDJo4+qqOh67+bPo4jj
 +R4du+SqzXriw4i3tDLGVpdjDffk4D41tbLzgkWAtvGyoP45yeYfHAzAh0pDFPRv
 ASfZVmZ5PhwAUAkIMnpC2sjgmxMYff3SYqmDgnsqXES7rbDH/hG+teymtHFTyUQp
 m+f60DNotSMcMvkLdvruLSB4aeTiwbfOqPn/g+aXYUlPuNMq1fVWgN7EJKWkamK4
 nRwaJmLwx1/ojcVbpy2G
 =YMKB
 -----END PGP SIGNATURE-----

Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates from Olof Johansson:
 "This contains the bulk of new SoC development for this merge window.

  Two new platforms have been added, the sunxi platforms (Allwinner A1x
  SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
  series of ARMv7 platforms from them, where the hope is that we can
  keep the platform code generic enough to have them all share one mach
  directory.  The new Broadcom platform is contributed by Christian
  Daudt.

  Highbank has grown support for Calxeda's next generation of hardware,
  ECX-2000.

  clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
  also taken on maintainership of the platform.

  Beyond this there has been a bunch of work from a number of people on
  converting more platforms to IRQ domains, pinctrl conversion, cleanup
  and general feature enablement across most of the active platforms."

Fix up trivial conflicts as per Olof.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
  mfd: vexpress-sysreg: Remove LEDs code
  irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
  clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
  irq: versatile: delete dangling variable
  ARM: sunxi: add missing include for mdelay()
  ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
  ARM: dts: add node for PL330 MDMA1 controller for exynos4
  ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
  ARM: EXYNOS: add UART3 to DEBUG_LL ports
  ARM: S3C24XX: Add clkdev entry for camif-upll clock
  ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
  ARM: sunxi: Add missing sun4i.dtsi file
  pinctrl: samsung: Do not initialise statics to 0
  ARM i.MX6: remove gate_mask from pllv3
  ARM i.MX6: Fix ethernet PLL clocks
  ARM i.MX6: rename PLLs according to datasheet
  ARM i.MX6: Add pwm support
  ARM i.MX51: Add pwm support
  ARM i.MX53: Add pwm support
  ARM: mx5: Replace clk_register_clkdev with clock DT lookup
  ...
2012-12-12 12:05:15 -08:00
Linus Torvalds d01e4afdbb ARM: arm-soc: Cleanups on various subarchitectures
Cleanup patches for various ARM platforms and some of their associated
 drivers. There's also a branch in here that enables Freescale i.MX to be
 part of the multiplatform support -- the first "big" SoC that is moved
 over (more multiplatform work comes in a separate branch later during
 the merge window).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQx2p9AAoJEIwa5zzehBx3aPUQAIjV3VDf/ACkA4KUQu0BFg5U
 57OIkl6RCZvfKhYgq5+6OJ2AK6VkGh9PqTmXkDS7Nj3QMS/uWcb3U419aPJsd3Z/
 vNGpTl+J/YcAcFrKMqTyNv98TAiAOJlpm70CqmRbkhpMfoJb7//1JKqGTJPBO+tj
 8ZEwNGC0WbRNOSQTY/TTAhbZE1sqXwKy9mDLGmcwqKBY8H1TFHyPB6yWYFSxMHxS
 JAegbYhYO9FawOOLoi9ovT+2vUR9vDu0xxV4zUK9f5DqKcCb/wYuN0QkusjnEutm
 RfIt7iXHHzi35YPxtlrGgSz9EIYXKAafSzkgf3Ydpjci5DH/vbVexm/CT+V+SwOT
 SvucYJMALI/aOEFJWN/50L6B9zipSrWb51tK7WFXz/sUCrMQrXH3Mu99mjHZXSoL
 1cylsvs3DFQC7vHFLSjRpX6eJdfE+Hb0LZ878eXSbDVCOnU8odAQrofugqfmeVDk
 eN0+BWmchJgvljOiKVUQMC3PCquCaAAO1lm/HU7bWPlVigTuHSW0uisDyCYAtlt1
 dGxnbbhoFJvSH7CMOoMO7hIFnoNJEe6+uVUuwA/+iJouMXMJLoY6Da4L72h1Mp81
 o4Hr6Kxly/SMtURZ/6pCycx5ahb5TaahstYAoe7Qp1dMj5U2m6fUVfKkG7tUx1CW
 MIuvN3qJeW2qKWKmZRVM
 =zfPd
 -----END PGP SIGNATURE-----

Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
 "Cleanup patches for various ARM platforms and some of their associated
  drivers.  There's also a branch in here that enables Freescale i.MX to
  be part of the multiplatform support -- the first "big" SoC that is
  moved over (more multiplatform work comes in a separate branch later
  during the merge window)."

Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
  ARM: omap: fix typo on timer cleanup
  ARM: EXYNOS: Remove unused regs-mem.h file
  ARM: EXYNOS: Remove unused non-dt support for dwmci controller
  ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
  ARM: OMAP3: cm-t3517: use GPTIMER for system clock
  ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
  ARM: SAMSUNG: use devm_ functions for ADC driver
  ARM: EXYNOS: no duplicate mask/unmask in eint0_15
  ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
  ARM: EXYNOS: Remove i2c0 resource information and setting of device names
  ARM: Kirkwood: checkpatch cleanups
  ARM: Kirkwood: Fix sparse warnings.
  ARM: Kirkwood: Remove unused includes
  ARM: kirkwood: cleanup lsxl board includes
  ARM: integrator: use BUG_ON where possible
  ARM: integrator: push down SC dependencies
  ARM: integrator: delete static UART1 mapping
  ARM: integrator: delete SC mapping on the CP
  ARM: integrator: remove static CP syscon mapping
  ARM: integrator: remove static AP syscon mapping
  ...
2012-12-12 11:51:39 -08:00
Linus Torvalds cff2f741b8 Driver core updates for 3.8-rc1
Here's the large driver core updates for 3.8-rc1.
 
 The biggest thing here is the various __dev* marking removals.  This is
 going to be a pain for the merge with different subsystem trees, I know,
 but all of the patches included here have been ACKed by their various
 subsystem maintainers, as they wanted them to go through here.
 
 If this is too much of a pain, I can pull all of them out of this tree
 and just send you one with the other fixes/updates and then, after
 3.8-rc1 is out, do the rest of the removals to ensure we catch them all,
 it's up to you.  The merges should all be trivial, and Stephen has been
 doing them all in linux-next for a few weeks now quite easily.
 
 Other than the __dev* marking removals, there's nothing major here, some
 firmware loading updates and other minor things in the driver core.
 
 All of these have (much to Stephen's annoyance), been in linux-next for
 a while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iEYEABECAAYFAlDHkPkACgkQMUfUDdst+ykaWgCfW7AM30cv0nzoVO08ax6KjlG1
 KVYAn3z/KYazvp4B6LMvrW9y0G34Wmad
 =yvVr
 -----END PGP SIGNATURE-----

Merge tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg Kroah-Hartman:
 "Here's the large driver core updates for 3.8-rc1.

  The biggest thing here is the various __dev* marking removals.  This
  is going to be a pain for the merge with different subsystem trees, I
  know, but all of the patches included here have been ACKed by their
  various subsystem maintainers, as they wanted them to go through here.

  If this is too much of a pain, I can pull all of them out of this tree
  and just send you one with the other fixes/updates and then, after
  3.8-rc1 is out, do the rest of the removals to ensure we catch them
  all, it's up to you.  The merges should all be trivial, and Stephen
  has been doing them all in linux-next for a few weeks now quite
  easily.

  Other than the __dev* marking removals, there's nothing major here,
  some firmware loading updates and other minor things in the driver
  core.

  All of these have (much to Stephen's annoyance), been in linux-next
  for a while.

  Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"

Fixed up trivial conflicts in drivers/gpio/gpio-{em,stmpe}.c due to gpio
update.

* tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (93 commits)
  modpost.c: Stop checking __dev* section mismatches
  init.h: Remove __dev* sections from the kernel
  acpi: remove use of __devinit
  PCI: Remove __dev* markings
  PCI: Always build setup-bus when PCI is enabled
  PCI: Move pci_uevent into pci-driver.c
  PCI: Remove CONFIG_HOTPLUG ifdefs
  unicore32/PCI: Remove CONFIG_HOTPLUG ifdefs
  sh/PCI: Remove CONFIG_HOTPLUG ifdefs
  powerpc/PCI: Remove CONFIG_HOTPLUG ifdefs
  mips/PCI: Remove CONFIG_HOTPLUG ifdefs
  microblaze/PCI: Remove CONFIG_HOTPLUG ifdefs
  dma: remove use of __devinit
  dma: remove use of __devexit_p
  firewire: remove use of __devinitdata
  firewire: remove use of __devinit
  leds: remove use of __devexit
  leds: remove use of __devinit
  leds: remove use of __devexit_p
  mmc: remove use of __devexit
  ...
2012-12-11 13:13:55 -08:00
Mike Turquette 7c045a55c9 clk: introduce optional disable_unused callback
Some gate clocks have special needs which must be handled during the
disable-unused clocks sequence.  These needs might be driven by software
due to the fact that we're disabling a clock outside of the normal
clk_disable path and a clk's enable_count will not be accurate.  On the
other hand a specific hardware programming sequence might need to be
followed for this corner case.

This change is needed for the upcoming OMAP port to the common clock
framework.  Specifically, it is undesirable to treat the disable-unused
path identically to the normal clk_disable path since other software
layers are involved.  In this case OMAP's clockdomain code throws WARNs
and bails early due to the clock's enable_count being set to zero.  A
custom callback mitigates this problem nicely.

Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-12-10 22:35:02 -08:00
Linus Walleij 2630b17b6e clk: ux500: fix bit error
This fixes a bit error in the U8500 clock implementation: the
unused p2_pclk12 registered at bit 12 in periphereral group 6
was defined as using bit 11 rather than bit 12.

When walking over and disabling the unused clocks in the tree
at late init time, p2_pclk12 was disabled, by effectively
clearing the but for p2_pclk11 instead of bit 12 as it should
have, thus disabling gpio block 6 and 7.

Reported-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Philippe Begnic <philippe.begnic@st.com>
Cc: stable@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-12-04 10:33:53 -08:00
Olof Johansson 823c9faefc Merge branch 'next/cam-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim:
Just adding camif gpio setup and clkdev.

* 'next/cam-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C24XX: Add clkdev entry for camif-upll clock
  ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
  + Linux 3.7-rc6

Conflicts due to the 3.7-rc6 sync: arch/arm/mach-highbank/system.c
include/linux/clk-provider.h, resolved as in other branches.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-30 09:27:57 -08:00
Bill Pemberton 1fc7ad5d39 clk: remove use of __devexit
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:32:53 -08:00
Bill Pemberton 018ae93fbc clk: remove use of __devinit
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:31:53 -08:00
Bill Pemberton f9cfa63051 clk: remove use of __devexit_p
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.

Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-28 11:31:53 -08:00
Martin Fuzzey 1f61e5f143 clk: clock multiplexers may register out of order
When a clock, C is initialised any orphan clocks listing C as
a possible parent are reparented to it regardless of the
parent requested by the orphan's get_parent() operation.

This means that multiplexers registered before their parents
are reparented to the first parent subsequently declared,
regardless of the selection made by the hardware registers.

For example:
	static const char *sel[] = { "srcA", "srcB", "dummy", "srcC" };

	child = clk_register_mux(NULL, "child",  sel, ARRAY_SIZE(sel), ...);
	clk_register_fixed(NULL, "dummy", ...);
	clk_register_fixed(NULL, "srcA", ...);
	clk_register_fixed(NULL, "srcB", ...);
	clk_register_fixed(NULL, "srcC", ...);

Causes child's parent to always be "dummy".

To fix this, when an orphanned clock has a get_parent() operation,
only reparent to the clock indicated by get_parent().

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improve $SUBJECT]
2012-11-26 11:14:45 -08:00
Ulf Hansson 45228ef322 clk: ux500: Initial support for abx500 clock driver
The abx500 clock driver is a platform driver which will be initialized
during arch init. The platform device shall be added from the ab-core
driver as a mfd child device to maintain correct boot sequence.

Depending on what ab version we use, different clock definitions will
be added.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-26 08:14:12 -08:00
Vipul Kumar Samar 07e812a0ae ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
This patch moves some global macro definitions to the files where they are used.
Its a step towards removing spear.h completely later on.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 16:55:30 +05:30
Olof Johansson 0dfeada909 orion dt for v3.8
- ehci-orion dt binding
  - gpio-poweroff
  - use dt regulators
  - move mpp to DT/pinctrl
 
 Depends on:
 
  - orion/boards
 
     - merge conflicts
        - keep all 'select's in Kconfig
        - remove all #includes in board-*.c
 
  - pinctrl/devel up to:
 
     - 06763c7 pinctrl: mvebu: move to its own directory
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQEcBAABAgAGBQJQsEfdAAoJEAi3KVZQDZAeBd8IAIAkBGIJyUJSmQJEWkZ/9ezq
 UOLec1t/TnLhAQ1Sk8g4C41wmHKYNqmZSVaAXC+QP6Yw+Gdhlw+V6YBjOYDzA7Y4
 k8ljw3SFbvS+AIx0qK26j6Tf6En2H5lMXsdlKoarCV+G+MxAHsQO7jL6y7BFwTlX
 QnwJFz+NRzMFxaPiCS+43oZuxIIzkHe8wKMb0y7nSiNQYUUv8TdKvyK+ekFuszOp
 v6uo/MI1p1/xdUxDbEKxOwmUjAy7x+t0LUFi1dsWuiDHdrG+BVT4NkJuFaD8Ui13
 VoUD1ogyWHQZV2hq0dfj+9Hed5NEgl6toAzGN9LPLmsuVUXCnB2CdBprhuDv5F8=
 =yaX1
 -----END PGP SIGNATURE-----

Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/dt

From Jason Cooper:
orion dt for v3.8

 - ehci-orion dt binding
 - gpio-poweroff
 - use dt regulators
 - move mpp to DT/pinctrl

Depends on:

 - orion/boards

    - merge conflicts
       - keep all 'select's in Kconfig
       - remove all #includes in board-*.c

 - pinctrl/devel up to:

    - 06763c7 pinctrl: mvebu: move to its own directory

* tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits)
  ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
  ARM: Kirkwood: Add support LED of OpenBlocks A6
  ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
  ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
  ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
  ARM: kirkwood: Add support DT of second I2C bus
  ARM: kirkwood: Convert mplcec4 board to pinctrl
  ARM: Kirkwood: Convert km_kirkwood to pinctrl
  ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
  ARM: Kirkwood: Convert IX2-200 to pinctrl.
  ARM: Kirkwood: Convert lsxl boards to pinctrl.
  ARM: Kirkwood: Convert ib62x0 to pinctrl.
  ARM: Kirkwood: Convert GoFlex Net to pinctrl.
  ARM: Kirkwood: Convert dreamplug to pinctrl.
  ARM: Kirkwood: Convert dockstar to pinctrl.
  ARM: Kirkwood: Convert dnskw to pinctrl
  ARM: Kirkwood: Convert iConnect to pinctrl.
  ARM: Kirkwood: Convert TS219 to pinctrl.
  ARM: Kirkwood: Add DTSI files for pinctrl
  ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-26 01:09:53 -08:00
Olof Johansson 0f9cb211ba Linux 3.7-rc7
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.18 (GNU/Linux)
 
 iQEcBAABAgAGBQJQss0FAAoJEHm+PkMAQRiG6cEH/An3PYsWBBy27tzoLyVfJKF1
 3m3vR8HS2tnHg6erxms+738jos59vrWXV0Ygnvw0DHbGR0HNb4rkwce/KXu/jgOD
 MRYNYhlhMFJTEUFrSrcwKITrAV3kVPWXxPXgAR6Gzpr6NPKKM9TBzEv0ze56TFYz
 asOxqeBcPSS7aFZlkoNsy1wG4l0Quo5ke8VZIxo9Me5qlqubAoZ6pING4wAGXqeE
 tf81CevSdpe0nqr8/dlYyCvLjrurgpJQczxRCBI3mP6kLWGfUCVzZmcu86PfT9b+
 35zNJwDneIoN+D9bVDHy6mrq9uQdmhWnQuhv1joTPn6RDn1nyBRBd+A5qLxSov4=
 =CPoy
 -----END PGP SIGNATURE-----

Merge tag 'v3.7-rc7' into next/cleanup

Merging in mainline back to next/cleanup since it has collected a few
conflicts between fixes going upstream and some of the cleanup patches.
Git doesn't auto-resolve some of them, and they're mostly noise so let's
take care of it locally.

Conflicts are in:
	arch/arm/mach-omap2/omap_hwmod_44xx_data.c
	arch/arm/plat-omap/i2c.c
	drivers/video/omap2/dss/dss.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-25 21:34:34 -08:00
Olof Johansson 3f54db784a Merge branch 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze into next/multiplatform
From Michal Simek:

This branch depends on arm-soc devel/debug_ll_init branch because
we needed Rob's "ARM: implement debug_ll_io_init()"
(sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86)
patch.

This branch also depends on zynq/dt branch because of previous major
zynq changes.
zynq/cleanup branch is subset of zynq/dt.

* 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze:
  ARM: zynq: Remove all unused mach headers
  ARM: zynq: add support for ARCH_MULTIPLATFORM
  ARM: zynq: make use of debug_ll_io_init()
  ARM: zynq: remove TTC early mapping
  ARM: zynq: add clk binding support to the ttc
  ARM: zynq: use zynq clk bindings
  clk: Add support for fundamental zynq clks
  ARM: zynq: dts: split up device tree
  ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
  ARM: zynq: dts: add description of the second uart
  ARM: zynq: move arm-specific sys_timer out of ttc
  zynq: move static peripheral mappings
  zynq: remove use of CLKDEV_LOOKUP
  zynq: use pl310 device tree bindings
  zynq: use GIC device tree bindings

Add/add conflict in arch/arm/Kconfig.debug.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21 11:49:45 -08:00
Vipul Kumar Samar b70e6d009a CLK: SPEAr: Remove unused dummy apb_pclk
Dummy clocks were added for ARM platforms, so that clk_get() for interface clk
doesn't fail for amba devices from amba_probe(). Because there is no amba device
for SPEAr that doesn't have a valid clock with dev_id for SPEAr, we don't need
these dummy clocks. Hence, remove them.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:46:12 -08:00
Deepak Sikri 1b2d4ad585 CLK: SPEAr: Correct index scanning done for clock synths
The patch corrects the case when the rate table is being scanned for a
given frequency, and the search frequency is beyond the maximum
frequency indexed in the table.

By default, the system should be set at max frequency present in the
rate table. This patch correctly returns the corresponding index value.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:46:06 -08:00
Deepak Sikri ef0fd0a207 CLK: SPEAr: Update clock rate table
This patch updates the existing rate tables with new frequencies.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:59 -08:00
Vipul Kumar Samar cd4b519aa5 CLK: SPEAr: Add missing clocks
This patch adds missing clocks: twd and macb.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:52 -08:00
Vipul Kumar Samar 1249979242 CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks
Flag CLK_SET_RATE_PARENT is required for a clock, where we want to
propagate clk_set_rate to its parent. This patch adds this to multiple clocks.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:45 -08:00
Shiraz Hashim 463f9e209c CLK: SPEAr13xx: fix parent names of multiple clocks
This patch fixes parent names of multiple clocks.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:36 -08:00
Shiraz Hashim e0b9c2109b CLK: SPEAr13xx: Fix mux clock names
This patch updates mux clock names of multiple clocks. It updates _clk with
_mclk to make it more readable.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:30 -08:00
Rajeev Kumar df2449aba4 CLK: SPEAr: Fix dev_id & con_id for multiple clocks
dev_id & con_id names of multiple clocks are incorrect. This patch fixes these
names with the names that come via DT.

Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:45:19 -08:00
Linus Walleij 70ee657714 clk: move IM-PD1 clocks to drivers/clk
The ARM IM-PD1 add-on module has a few clock of its own, let's
move also these down to the drivers/clk/versatile driver dir
and get rid of any remaining oldschool Integrator clocks.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:44 -08:00
Linus Walleij 7a9ad671ac clk: make ICST driver handle the VCO registers
It turns out that all platforms using the ICST VCO are really
just touching two registers, and in the same way as well: one
register with the VCO configuration as such, and one lock register
that makes it possible to write to the VCO.

Factor this register read/write into the ICST driver so we can
reuse it in the IM-PD1 driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:20 -08:00
Linus Walleij 401301ccdf clk: add GPLv2 headers to the Versatile clock files
The GPLv2 headers were missing and the subsystem maintainer likes
them so put them in. I am the copyright holder, so explicitly
licensing these under the GPLv2.

Reported-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-21 11:02:00 -08:00
Olof Johansson 17bffc7843 Merge branch 'depends/clk' into next/soc
From Mike Turquette:
* depends/clk:
  clk: Common clocks implementation for Versatile Express
  clk: Versatile Express clock generators ("osc") driver
  CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock
  clk: fix return value check in sirfsoc_of_clk_init()
  clk: fix return value check in of_fixed_clk_setup()
  clk: ux500: Update sdmmc clock to 100MHz for u8500
  clk: ux500: Support prcmu ape opp voltage clock
  mfd: dbx500: Export prmcu_request_ape_opp_100_voltage
  clk: Don't return negative numbers for unsigned values with !clk
  clk: Fix documentation typos
  clk: Document .is_enabled op
  clk: SPEAr: Vco-pll: Fix compilation warning
2012-11-21 02:13:11 -08:00
Gregory CLEMENT c4c34d6084 clk: mvebu: armada 370/XP add clock gating control provider for DT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 14:44:00 +01:00
Sebastian Hesselbarth f97d0d7aa8 clk: mvebu: add clock gating control provider for DT
This driver allows to provide DT clocks for clock gates found on
Marvell Dove and Kirkwood SoCs. The clock gates are referenced by
the phandle index of the corresponding bit in the clock gating control
register to ease lookup in the datasheet.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2012-11-20 14:43:24 +01:00
Gregory CLEMENT ab8ba01b3f clk: mvebu: add armada-370-xp CPU specific clocks
Add Armada 370/XP specific CPU clocks

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:35:42 +01:00
Sebastian Hesselbarth 97fa4cf442 clk: mvebu: add mvebu core clocks.
This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:34:08 +01:00
Maxime Ripard 404525d5a7 clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@ti.com>
2012-11-16 21:46:39 +01:00
Fabio Estevam f58945392a clk: mxs: Use a better name for the USB PHY clock
Use a better name for the USB PHY clock.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-16 09:28:19 -08:00
Axel Lin 90d4971d3d clk: spear: Add stub functions for spear3[0|1|2]0_clk_init()
This fixes compile error if one of SPEAr3xx implementations is not selected.

  CC      drivers/clk/spear/spear3xx_clock.o
drivers/clk/spear/spear3xx_clock.c: In function 'spear3xx_clk_init':
drivers/clk/spear/spear3xx_clock.c:599:3: error: implicit declaration of function 'spear300_clk_init' [-Werror=implicit-function-declaration]
drivers/clk/spear/spear3xx_clock.c:601:3: error: implicit declaration of function 'spear310_clk_init' [-Werror=implicit-function-declaration]
drivers/clk/spear/spear3xx_clock.c:603:3: error: implicit declaration of function 'spear320_clk_init' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[3]: *** [drivers/clk/spear/spear3xx_clock.o] Error 1
make[2]: *** [drivers/clk/spear] Error 2
make[1]: *** [drivers/clk] Error 2
make: *** [drivers] Error 2

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15 11:04:35 -08:00
Wei Yongjun ddc07ef949 CLK: clk-twl6040: fix return value check in twl6040_clk_probe()
In case of error, the function clk_register() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15 11:04:34 -08:00
Ulf Hansson 5678596c76 clk: ux500: Register nomadik keypad clock lookups for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15 11:04:34 -08:00
Ulf Hansson 44d6453a87 clk: ux500: Register rng clock lookups for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-15 11:04:32 -08:00
Ulf Hansson db5eb2daf7 clk: ux500: Register mtu apb_pclocks
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2012-11-15 14:51:29 +01:00
Linus Walleij 41863f730f ARM: nomadik: switch over to using the FSMC driver
The Nomadik NAND driver is really just a subset of the existing
FSMC driver, so let's switch over to using that driver instead,
since it handles more variants of this chip. The callbacks for
setting up the chip is doing stuff now handled by the FSMC
driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:47 +02:00
Josh Cartwright 0f586fbf6f ARM: zynq: use zynq clk bindings
Make the Zynq platform use the newly created zynq clk bindings.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14 16:10:32 +01:00
Josh Cartwright 45aa2c27ad clk: Add support for fundamental zynq clks
Provide simplified models for the necessary clocks on the zynq-7000
platform.  Currently, the PLLs, the CPU clock network, and the basic
peripheral clock networks (for SDIO, SMC, SPI, QSPI, UART) are modelled.

OF bindings are also provided and documented.

Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14 16:07:55 +01:00
Ulf Hansson 3d93067803 clk: ux500: Register slimbus clock lookups for u8500
At the same time the prcc bit for the kclk is corrected to
bit 8 instead of 3.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-12 10:20:23 -08:00
Ulf Hansson d4915cf5f6 clk: ux500: Update rtc clock lookup for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-12 10:20:22 -08:00
Ulf Hansson 15e66cd8d0 clk: ux500: Register msp clock lookups for u8500
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-12 10:20:22 -08:00
Ulf Hansson 08b1f1c7b9 clk: ux500: Register ssp clock lookups for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-12 10:20:22 -08:00
Ulf Hansson 4cf2d3b1b6 clk: ux500: Register i2c clock lookups for u8500
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-12 10:20:22 -08:00
Ulf Hansson 4a0ae7befc clk: ux500: Register slimbus clock lookups for u8500
At the same time the prcc bit for the kclk is corrected to
bit 8 instead of 3.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:05:33 -08:00
Ulf Hansson 86497f5455 clk: ux500: Update rtc clock lookup for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:05:23 -08:00
Ulf Hansson b89f8b5ec8 clk: ux500: Register msp clock lookups for u8500
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:05:15 -08:00
Ulf Hansson eb1d7eae04 clk: ux500: Register ssp clock lookups for u8500
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:05:05 -08:00
Ulf Hansson 1c73491a57 clk: ux500: Register i2c clock lookups for u8500
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:04:10 -08:00
Tony Prisk 973e1d1de0 CLK: vt8500: Fix SDMMC clk special cases
This patch adds some additional handling for the SDMMC special case
in round_rate and set_rate which results in invalid divisor messages
at boot time.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 17:03:55 -08:00
Wei Yongjun 0de9f23a28 clk: fix return value check in bcm2835_init_clocks()
In case of error, the function clk_register_fixed_rate() returns
ERR_PTR() and never returns NULL. The NULL test in the return value
check should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 16:49:15 -08:00
Ulf Hansson d6e99fa4f4 clk: ux500: Add armss clk and fixup smp_twd clk for u8500
The new armss clk is a prcmu_scalable_rate clk which represents
the ARMSS clk. This then makes it possible to convert the smp_twd
clk to a fixed factor clock type, using a fixed divider of 2 and
with the armss clk as parent.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 16:47:07 -08:00
Ulf Hansson a816d250e8 clk: ux500: Support for prcmu_scalable_rate clock
The prcmu_scalable_rate clock can change rate but is not gateable.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-11-09 16:47:06 -08:00
Linus Walleij b7a5bcd5cd clk/ux500: explicitly include register header
The ux500 clock driver file named u8500_clk.c does not compile
if it loose implicit dependencies to <mach/db8500-regs.h>
(I have no clue what files will include this) which manifests
itself as I'm experimenting with SPARSE_IRQ so make the
dependency explicit.

Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 09:55:31 +01:00
Stephen Boyd 9be9d482bc clk: wm831x: Use devm_clk_register() to simplify code
Move this driver to use devm_clk_register() to simplify some
error paths and reduce lines of code.

Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:12:55 -07:00
Stephen Boyd 46c8773a58 clk: Add devm_clk_{register,unregister}()
Some clock drivers can be simplified if devres takes care of
unregistering any registered clocks along error paths. Introduce
devm_clk_register() so that clock drivers get unregistration for
free along with simplified error paths.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:12:46 -07:00
Stephen Boyd 980f58a45e clk: wm831x: Fix clk_register() error code checking
clk_register() returns an ERR_PTR upon failure, not NULL. Fix
these error paths.

Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:12:33 -07:00
Pawel Moll bcd6f569e8 clk: Common clocks implementation for Versatile Express
This patch adds a DT and non-DT based implementation of
the common clock infrastructure for Versatile Express
platform. It registers (statically or using DT) all
required fixed clocks, initialises motherboard's SP810
cell (that provides clocks for SP804 timers) and
explicitly registers VE "osc" driver, to make the
clock generators available early.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:08:03 -07:00
Pawel Moll ed27ff1db8 clk: Versatile Express clock generators ("osc") driver
This driver provides a common clock framework hardware driver
for Versatile Express clock generators (a.k.a "osc") controlled
via the config bus.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:07:51 -07:00
Peter Ujfalusi f9f8c0438d CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock
On OMAP4+ platforms the functional clock for the McPDM IP is suplied by
the twl6040 codec (bit clock on the PDM bus).
This common clock driver for twl6040 will register the mcpdm_fclk clock to
be used by the McPDM driver to make sure that the needed clocks are
available when needed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:07:42 -07:00
Wei Yongjun 2968f85185 clk: fix return value check in sirfsoc_of_clk_init()
In case of error, the function clk_register() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:07:32 -07:00
Wei Yongjun cdfed3b21f clk: fix return value check in of_fixed_clk_setup()
In case of error, the function clk_register_fixed_rate() returns
ERR_PTR() not NULL pointer. The NULL test in the return value
check should be replaced with IS_ERR().

dpatch engine is used to auto generated this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:06:19 -07:00
Ulf Hansson 2f896ac0be clk: ux500: Update sdmmc clock to 100MHz for u8500
For u8500 and using 100MHz as the frequency also requires the ape opp 100
voltage, thus use the prcmu_opp_volt_scalable clock type.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:06:07 -07:00
Ulf Hansson b0ea0fc753 clk: ux500: Support prcmu ape opp voltage clock
Some scalable prcmu clocks needs to be handled in conjuction with the
ape opp 100 voltage. A new prcmu clock type clk_prcmu_opp_volt_scalable
is implemented to handle this.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:05:53 -07:00
Stephen Boyd 2ac6b1f50a clk: Don't return negative numbers for unsigned values with !clk
Some of the helper functions return negative error codes if
passed a NULL clock. This can lead to confusing behavior when the
expected return value is unsigned. Fix up these accessors so that
they return unsigned values (or bool in the case of is_enabled).
This way we can't interpret NULL clocks as having valid and
interesting values.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:05:03 -07:00
Viresh Kumar 7d4998f71b clk: SPEAr: Vco-pll: Fix compilation warning
Currently we are getting following warning for SPEAr clk-vco-pll.

"warning: i is used uninitialized in this function."

This is because we are getting value of i by passing its pointer to another
routine.

The variables here are really not used uninitialized.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-10-29 11:04:34 -07:00
Domenico Andreoli 686ea5851e ARM: bcm2835: Fix typo in the error message
Fix typo in message reported when unable to lookup the uart1 clock.

Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-10-25 20:28:17 -06:00
Linus Torvalds 7fe0b14b72 spi: Updates for v3.7
No framework work here, only a bunch of driver updates of varying sizes:
 
 - Factoring out of the core hardware support from the MXS MMC driver by
   Marek Vasut to allow the hardware to also be used for SPI.
 - Lots of error handling cleanups from Guenter Roeck
 - Removal of the existing Tegra driver which is quite comprehensively
   broken as detailed in the changelog for the removal.
 - DT suppport for the PL022 and GPIO drivers.
 - pinctrl support for OMAP and PL022.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQarn8AAoJEOoSHmUN5Tg49U4QAKeAPTxlKBSwHuJUpvKsCFF7
 rfN9wsViOigcItsk065C1g20wViw6t8pSFkNmRzmbsIdSofqCYZlJapgWM5j2cXp
 BXs8z7za0JmK62ftS6C3IydacJPRDY/zd0fnSqXnhQOG7Z3YxDYJrM3Ugc97ZE6+
 dg9NUn6rw9ZSwHEwpl08H8tLYqNkd8A+wayPYKr0GSWX7EAqS8cJEWjS0DtvDAm1
 LxMx4BQHCorR6ydUZJrfhG6fLsubhIuMnXI4Ajhv/Ictl1qHH1Zx3mIAB+BNVV/B
 RlaQxPycr0eSikZ9UPMNST2o8vCRvamSfguPfBHMzRdRBp8M3TOKkNM2PmEGzCJW
 pgpDsMNAkEfktGqQfMTBJJMbAPLux1W5mPjfcjt7vOS+q6lkFPtecGdKbynnmLX6
 Vf6nImwp1vyNIvcCip0YZId+j/LrQimuDfMQOH99mwxbkNqMMA401bsxEt8ELmut
 Qt1XEFoS6Xxj8n2BhTS/lMgEzz8zOuH9uOJI0hpNtctOfue6vqPm76GaefVC1i/B
 jpMpUwexwsFc6IhekVFG0MAkolMhFmhlTwk9N24yfgArH8D1pa3emBFN762BQUHE
 Ba7pghcwZADm8rT5SFNoxblcyekT/hCSRSiQ55MHUpqdH77/eVA1Lah4PaHiOqxz
 b0mu9Ae98K077vGP3Z6r
 =ld23
 -----END PGP SIGNATURE-----

Merge tag 'spi-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc

Pull spi updates from Mark Brown:
 "No framework work here, only a bunch of driver updates of varying
  sizes:

   - Factoring out of the core hardware support from the MXS MMC driver
     by Marek Vasut to allow the hardware to also be used for SPI.
   - Lots of error handling cleanups from Guenter Roeck
   - Removal of the existing Tegra driver which is quite comprehensively
     broken as detailed in the changelog for the removal.
   - DT suppport for the PL022 and GPIO drivers.
   - pinctrl support for OMAP and PL022."

Pulling from Mark Brown as Grant Likely is still busy moving.

* tag 'spi-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc: (53 commits)
  spi: remove completely broken Tegra driver
  spi/imx: set the inactive state of the clock according to the clock polarity
  spi/pl022: get/put resources on suspend/resume
  spi/pl022: use more managed resources
  spi/pl022: Devicetree support w/o platform data
  spi/s3c64xx: Don't free controller_data on non-dt platforms
  spi: omap2-mcspi: add pinctrl support
  spi/pl022: adopt pinctrl support
  spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  spi/gpio: Fix stub for spi_gpio_probe_dt()
  spi/mxs: Make the SPI block clock speed configurable via DT
  spi: spi-sh-hspi: drop frees of devm_ alloc'd data
  spi/pl022: Fix chipselects pointer computation
  spi: spi-tle62x0: Use module_spi_driver macro
  mxs/spi: Rework the mxs_ssp_timeout to be more readable
  mxs/spi: Decrement the DMA/PIO border
  mxs/spi: Increment the transfer length only if transfer succeeded
  mxs/spi: Fix issues when doing long continuous transfer
  spi: spi-gpio: Add DT bindings
  spi: spi-gpio: store chipselect information in private structure
  ...
2012-10-02 17:26:42 -07:00
Linus Torvalds 84be4ae2c0 ARM: soc: soc-specific updates, take 2
This branch converts the MXS Freescale platform to use irqdomains and
 sparse IRQ, in preparation for DT probing and multiplatform kernels.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaiKwAAoJEIwa5zzehBx32FQP/0wZ5YZ4XMsCZRlXkzixc+/K
 uJa8+1vj4M861/4Q5/QXxbW/lOamxM5djvbG8/zLyl05RmQ5zV8UggDFIRSy9Yrr
 UlCwQK2co30HGlNK9NsbSiMadEaDVw9KitW4hssaqIPVDKR0KAOY0P4lDHDDFxUr
 /ES6Hl9GL5pGnAKrnxgU/amdHNTWkeW3YD30l00+v+EJd+65nXecN+iSZWleiZyC
 tV9cxwBgSZIwYAy7rJoNyOaZyEO8xPpewUGFgGFLUYEUggan9MKtMH7FQZstQ/YY
 hVSsqc05FYecdviuaoGJmmzWddihMBo2hNLUZTt5b+VDdw/mOGl0WV9aAiYOSlOY
 z/npwgWA8TP74MvtTuoy6BRQgNL7a2B4/h35ZeQ37bQG6AuQmcFvSxg4oiuyWQJL
 OL40FGANx7e2KK2gVEzpA7CVA69v/lh8CGD/xYdxsO+/o/F48j2cdPdtsQrCh3Gq
 MUV4e89avp1UVt5t5186snGmP990y/5rxOfbF+z7n1iU4zt2Dc2+k0H65UAiNpeG
 xHwJP20pRmroBRQiuwQABasSUNO6HL98/ZDQvFRdDj/xBQQt1/uGetDKLGk+i+tW
 T6HQIHT70iy7Xds0ANbd1K1uurUoYD33pB2KwgHjib9C0fy0ChEYs5NGemkUew22
 1iB6u0nTSrPnMXVg0M0e
 =wVa3
 -----END PGP SIGNATURE-----

Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc-specific updates, take 2 from Olof Johansson:
 "This branch converts the MXS Freescale platform to use irqdomains and
  sparse IRQ, in preparation for DT probing and multiplatform kernels."

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: mxs: remove mach/irqs.h
  ARM: mxs: select SPARSE_IRQ
  ARM: mxs: adopt irq_domain support for icoll driver
  ARM: mxs: select MULTI_IRQ_HANDLER
  ARM: mxs: retrieve timer irq from device tree
  gpio/mxs: adopt irq_domain support for mxs gpio driver
2012-10-01 18:35:58 -07:00
Linus Torvalds 2a2bf85f05 ARM: soc: device tree updates
Device tree conversion and enablement branch. Mostly a bunch of new
 bindings and setup for various platforms, but the Via/Winchip VT8500
 platform is also converted over from being 100% legacy to now use
 device tree for probing. More of that will come for 3.8.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaiKNAAoJEIwa5zzehBx329AP/1TwJk1dTHaAA7vDxyz2mq1E
 F0MBL9p32R1SczrFGjbmb9ouVW5tTjbK1zted5zBrGBXDIX9Kdz3Dmm7x6b2/JvZ
 8yMrdiBNpF3r8au6IaMuMlOq5yAaN+F4SxbC2rE0a9y3YmMZ6ug5dgoZ4O8orAC4
 il3eq1sb+rTTPCf7C5cGlKzdRQi2KYdAycpa7ChQCYSamxJjdM7cXR7pohVv9vhd
 9sF+h1I0ArxcVYn/mUOoCin8MyIWXlBQvbUnF+3aYO8CO9erhKH/owPngVBWGKZH
 +X6dk0ChUJfjzaWr2HPZIYUqLUnIoO8TsRhQVmLp1rPrSzSXMG3iDq0M4WEwL4Xo
 bMbAZ1KWYg53HRqbIOEQk5q9Mg7HUgtbJuOE7WLgBO5ubdKFFWLmDUJ+WVcoWzSW
 qyWaWpECSptlQjFyqZJd9MjizIDhuYjog2EWaSWXETQ+1XRmCSsqx8AX6n1MVdhP
 6jDLnYHYiJoOtGiaDpYxsXgMXdOVsrTegecNduqH/XhdEL1iwy3fwgK1DjoclYoj
 iFbn0/Tw3N5SvJlG4xitl12DQ7MeCCbfzJGRKenVh9/O4U+qrTbFRmsNaaZw5dA1
 bt+iEZ3aU8YBaKj02LexunAevpZJ2rfGNX2tBjQrIzzZK6CZibPWg42qfKJfdn7w
 etXVVApw5jQjAImY64kh
 =q7ZY
 -----END PGP SIGNATURE-----

Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc device tree updates from Olof Johansson:
 "Device tree conversion and enablement branch.  Mostly a bunch of new
  bindings and setup for various platforms, but the Via/Winchip VT8500
  platform is also converted over from being 100% legacy to now use
  device tree for probing.  More of that will come for 3.8."

Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
  arm: vt8500: Fixup for missing gpio.h
  ARM: LPC32xx: LED fix in PHY3250 DTS file
  ARM: dt: mmp-dma: add binding file
  arm: vt8500: Update arch-vt8500 to devicetree support.
  arm: vt8500: gpio: Devicetree support for arch-vt8500
  arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
  arm: vt8500: clk: Add Common Clock Framework support
  video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
  serial: vt8500: Add devicetree support for vt8500-serial
  rtc: vt8500: Add devicetree support for vt8500-rtc
  arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
  ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
  ARM: tegra: Add Avionic Design Medcom-Wide support
  ARM: tegra: Add Avionic Design Plutux support
  ARM: tegra: Add Avionic Design Tamonten support
  ARM: tegra: dts: Add pwm label
  ARM: ux500: Fix SSP register address format
  ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
  ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
  ARM: ux500: Add all encompassing sound node to the HREF Device Tree
  ...
2012-10-01 18:28:06 -07:00
Linus Torvalds 11801e9de2 ARM: soc: soc-specific updates
Most notable here is probably the addition of basic support for the
 BCM2835, an SoC used in some of the Roku 2 players as well as the
 much-hyped Raspberry Pi, cleaned up and contributed by Stephen
 Warren. It's still early days on mainline support, with just the
 basics working. But it has to start somewhere!
 
 Beyond that there's some conversions of clock infrastructure on tegra
 to common clock, misc updates for several other platforms, and OMAP
 now has its own bus (under drivers/bus) to manage its devices through.
 
 This branch adds two new directories outside of arch/arm:
 drivers/irqchip for new irq controllers, and drivers/bus for the above
 OMAP bus. It's expected that some of the other platforms will migrate
 parts of their platforms to those directories over time as well.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaO2SAAoJEIwa5zzehBx3TBIQAJYc+vpAqiv8MLQ1XV3cLiIP
 X57fxM9u1A+uXpXsiCTGR+ga8W4a5tlfGMXDBnl/K2bnFs2x11b9NkFLDJ7mdkih
 J4c/iOWT/mT5suLnnybyg6ZGaxGkAKou2AumiSmkazmq5hGG67hkpAOqFEfDK0J2
 Au7/6VN6GZXgiwt8nYaAB/qR5NVcww4m/6GQ2looaWgRLT/wgC3W2ZKvw6zEdl2J
 OxOpwf2ujG/75zLQaxTeZ5rKnGtAXH4v0KhY9CWQacQPi4L2MVCrvUrDB4j0as4H
 Wmsu7g6fZA9Vlf1aW/mlDY1ftozfbDaKORoYVS+CsWhm1oiQI5t+sAWRTkbbS85t
 pobgKfFdvNsl9kS1zRdEddK2tyotwtXh2jz+P/s1l95hfqZ8IdVBJNMlcrHRINOI
 2iQXFfGRhCCqMcfFiGXJ43tYja/aCsaIc4M5TrEma57czZT5jK8HSLh0ZUmFYDoe
 /TfUegVhFASmkNTk7dVZgZ2UoQVkv4lWs+xuf8YgX3UalWgl/YIRRFl4NnylGlEc
 jjrX3MjXATqXzLPEZaf8dRZHIpB6FYmZq1QqaoefcUQ46gBOueThElZP3sNWR8a2
 MOtknauLfLwQbrcH5CmqKpIpXTB4LKgbf/omH2jQlxBhQ5t7PXHVD1NFsbZbwM8J
 RVCZb4PwqEwOt/wibTrk
 =BCp4
 -----END PGP SIGNATURE-----

Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc-specific updates from Olof Johansson:
 "Most notable here is probably the addition of basic support for the
  BCM2835, an SoC used in some of the Roku 2 players as well as the
  much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren.
  It's still early days on mainline support, with just the basics
  working.  But it has to start somewhere!

  Beyond that there's some conversions of clock infrastructure on tegra
  to common clock, misc updates for several other platforms, and OMAP
  now has its own bus (under drivers/bus) to manage its devices through.

  This branch adds two new directories outside of arch/arm:
  drivers/irqchip for new irq controllers, and drivers/bus for the above
  OMAP bus.  It's expected that some of the other platforms will migrate
  parts of their platforms to those directories over time as well."

Fix up trivial conflicts with the clk infrastructure changes.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (62 commits)
  ARM: shmobile: add new __iomem annotation for new code
  ARM: LPC32xx: Support GPI 28
  ARM: LPC32xx: Platform update for devicetree completion of spi-pl022
  ARM: LPC32xx: Board cleanup
  irqchip: fill in empty Kconfig
  ARM: SAMSUNG: Add check for NULL in clock interface
  ARM: EXYNOS: Put PCM, Slimbus, Spdif clocks to off state
  ARM: EXYNOS: Add bus clock for FIMD
  ARM: SAMSUNG: Fix HDMI related warnings
  ARM: S3C24XX: Add .get_rate callback for "camif-upll" clock
  ARM: EXYNOS: Fix incorrect help text
  ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers
  ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data move
  MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture
  ARM: bcm2835: instantiate console UART
  ARM: bcm2835: add stub clock driver
  ARM: bcm2835: add system timer
  ARM: bcm2835: add interrupt controller driver
  ARM: add infra-structure for BCM2835 and Raspberry Pi
  ARM: tegra20: add CPU hotplug support
  ...
2012-10-01 18:24:44 -07:00
Linus Torvalds 2c0c86d5b6 The common clk framework changes for 3.7 are dominated by ARM platform
ports to the framework along with one MIPS port, one MFD port, one minor
 framework enhancement and one helper function for platforms expressing
 their clock data through device tree.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQadDCAAoJEDqPOy9afJhJCvcQAMVvkmom7aROkXfn6V3pxlUq
 dAtwpzvmikzdrE/4wMAus38o04Lygk6vEdXIJZyood1WTxBNbl+C9SJPg0ZmN8P+
 0I2Vx6u7ZoHggeG44s3ziDTVBC/+MolDlXlgJrqG7SHyLRGzHF4W6BDLvSUHzMcq
 zoFFAQPSx2TKfSkHHNj3PKdWX/vFOSZL5tkMU5QMNCC3kYyd9j+StaiIRAN0V7Nz
 kHy2tdkEA323E6fTwHlFOwBi/CjddIdVLZQr1DVIjwdmKfuf45hglZYULNbvPwOF
 AB8hyVFMozA44GKi+92u3NZ0TIrirctVDiK6k3UcD2tcgRNjrFHwQpe4ogg6/S58
 U+AXM62fsWhA6vykBgNadbeGhsIvfI8HJdRqjULxfqLkQsqNCAGjINJJbTC9Mev/
 zGfi3vjAUbbC0nAOmDloD93x8JI+P75IQC4GJD6FuHgoW7rDlKs+z9FXzJh/0W5T
 fQCnjLaPMnPv1VYWToGy0aCBGLpDhbTJNPqVA4SZBJQ5u2XXXLr8BjpavcG6ns5j
 zmXWVJo6Y+X7rU5+0RH3VGhnUylFEvQZyEa1O3rnNoNfy4Q9ymA/G27iZC5OPklw
 mSH4N+ndX6hT+KM+gDL9t6gyhkIhyhUSoQCRpWKAFqihYR2ckRPFUcK6OvqsA7JH
 vQMNdm2fW4zYSTsvT3mP
 =7v8L
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux

Pull clk framework update from Michael Turquette:
 "The common clk framework changes for 3.7 are dominated by ARM platform
  ports to the framework along with one MIPS port, one MFD port, one
  minor framework enhancement and one helper function for platforms
  expressing their clock data through device tree."

* tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux:
  clk: add of_clk_src_onecell_get() support
  clk: ux500: Define smp_twd clock for u8500
  mfd: dbx500: Provide a more accurate smp_twd clock
  clk: ux500: Support for prmcu_rate clock
  clk: Provide option for clk_get_rate to issue hw for new rate
  clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
  ARM: ux500: Switch to use common clock framework
  clk: ux500: Clock definitions for u8500
  clk: ux500: First version of clock definitions for ux500
  clk: ux500: Adapt PRCMU and PRCC clocks for common clk
  clk: versatile: make config option boolean
  clk: add Loongson1B clock support
  arm: mmp: make all SOCs use common clock by default
  clk: mmp: add clock definition for mmp2
  clk: mmp: add clock definition for pxa910
  clk: mmp: add clock definition for pxa168
  clk: mmp: add mmp specific clocks
  clk: convert ARM RealView to common clk
  clk: prima2: move from arch/arm/mach to drivers/clk
  ARM: PRIMA2: convert to common clk and finish full clk tree
2012-10-01 12:09:04 -07:00
Mark Brown f4b81dd83e Merge branches 'spi-drivers' and 'spi-mxs' into spi-next 2012-09-28 14:05:29 +01:00
Olof Johansson db404e72bb Update arch-vt8500 and drivers to device tree and
remove existing non-dt code.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJQXBatAAoJEAKiPfwuf9N/VZoIAI7PKNwakjM/KDiVzytwqZ+U
 h9kkjYW4ra8MH+jpjFQqvSyIJ3U+t016xqW3ZbqRuZBDgH0I7Gax7QoAZ/ljPlpG
 RAKl2l9WVPiBSwCESTpvR5lafBLklk6fL0Z267qIxDGld6YBiWHvTKIh1zDmeCWW
 hgDeWtcb1M61VlPrj9nPnCze66h2dUk+QSxaCodv7co5kzb0Q4S7U64BCs0hGe01
 kkdoUwnBjdeK0cUhDAJAP1vRyk04N16+H7yp4npmKhv/blKVc3MIRjg1iBV78ncd
 Kke/G1B9TJRpNTXdySYnsDQpaCWNSAryKXKkdxP0gh6MW8CMKYc1mdKYcEP3Tk8=
 =xG1+
 -----END PGP SIGNATURE-----

Merge tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code into next/dt

From Tony Prisk:

Update arch-vt8500 and drivers to device tree and
remove existing non-dt code.

* tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code:
  arm: vt8500: Update arch-vt8500 to devicetree support.
  arm: vt8500: gpio: Devicetree support for arch-vt8500
  arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
  arm: vt8500: clk: Add Common Clock Framework support
  video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
  serial: vt8500: Add devicetree support for vt8500-serial
  rtc: vt8500: Add devicetree support for vt8500-rtc
  arm: vt8500: Add device tree files for VIA/Wondermedia SoC's

Resolved add/change conflict in drivers/clk/Makefile.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-23 21:51:39 -07:00
Tony Prisk 85814d69e6 arm: vt8500: clk: Add Common Clock Framework support
This patch adds common clock framework support for arch-vt8500.
Support for PLL and device clocks on VT8500, WM8505 and WM8650
are included.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Mike Turquette <mturquette@linaro.org>
2012-09-21 19:23:57 +12:00
Simon Arlott 75fabc3f64 ARM: bcm2835: add stub clock driver
This patch adds a minimal stub clock driver for the BCM2835. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
  rather than using static data to represent the clocks.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
2012-09-19 19:08:53 -06:00
Mark Brown 20332ff376 ARM: 7537/1: clk: Fix release in devm_clk_put()
Surprisingly devres_destroy() doesn't call the destructor for the
resource it is destroying, use the newly added devres_release() instead
to fix this.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-09-19 21:51:27 +01:00
Lars-Peter Clausen 8ef997b67f ARM: 7534/1: clk: Make the managed clk functions generically available
The managed clk functions are currently only available when the generic clk
lookup framework is build. But the managed clk functions are merely wrappers
around clk_get and clk_put and do not depend on any specifics of the generic
lookup functions and there are still quite a few custom implementations of the
clk API. So make the managed functions available whenever the clk API is
implemented.

The patch also removes the custom implementation of devm_clk_get for the
coldfire platform.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-09-15 21:55:27 +01:00
Olof Johansson 83ae0ffa50 mxs-clk-dt-lookup
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
 The series depends on pull request mxs-dt-3.7 and Mike's clk branch
 below.
 
 git://git.linaro.org/people/mturquette/linux.git clk-3.7
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJQTvyZAAoJEFBXWFqHsHzO3kEIAKsT3i7vdriXVAityIMiC1el
 pVDR2qVq0q7+MhCIO/wXWbjJBHK+vEiMY2sKWCD4jVfLCa751mwENAdf1h1/+NNZ
 +W6uzRaMt3w4FGryn4/xXt4eVgZNNZba9NxE73tVSanK9oJilPwBLCCkwbZLFbjk
 SughytSMml1uO8Z3mEG0DDmrCnwb1KsILasVLazTGA1gpQ02c+6ASPa8s0App6/2
 DLkIOn6D3022LzQiIungxUc4wLBojylex/GCAPubyhX3pXyjlzUElp4G3AFex8KM
 tMnuXBfpi1dLkgYPn+rkM8m48dCY821LxFT9OA3AfpzqVpRWU6Kcq60vNzUDnt0=
 =scyJ
 -----END PGP SIGNATURE-----

Merge tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt

It replaces clk_register_clkdev in mxs clock driver with DT lookup.

* tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
  clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
  clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
2012-09-12 23:04:12 -07:00
Shawn Guo 53f9443da6 clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
It really becomes a maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.

Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx23 client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11 14:45:46 +08:00
Shawn Guo b598b9f311 clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
It really becomes a maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.

Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx28 client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11 14:45:46 +08:00
Shawn Guo 494bfec999 clk: add of_clk_src_onecell_get() support
For those SoCs that have hundreds of clock outputs, their clock
DT bindings could reasonably define #clock-cells as 1 and require
the client device specify the index of the clock it consumes in the
cell of its "clocks" phandle.

Add a generic of_clk_src_onecell_get() function for this purpose.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-07 18:30:19 -07:00
Ulf Hansson 09b9b2b204 clk: ux500: Define smp_twd clock for u8500
The smp_twd clock is based upon a prcmu_rate clock type
for the PRCMU_ARMSS clock.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 18:00:42 -07:00
Ulf Hansson 70b1fce2ec clk: ux500: Support for prmcu_rate clock
The prmcu_rate clock is not gateable and has a rate which
only can be fetched.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 17:57:08 -07:00
Ulf Hansson a093bde2b4 clk: Provide option for clk_get_rate to issue hw for new rate
By using CLK_GET_RATE_NOCACHE flag, we tell the clk_get_rate API to
issue the hw for an updated clock rate. This can be used for a clock
which rate may be updated without a client necessary modifying it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 17:56:22 -07:00
Jonghwa Lee 73118e6188 clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
This patch supports max77686 mfd's clock driver using common clock frame work.
max77686 has 3 clock ouputs which all are generated from crystal oscillator and
SOC can enable/disable them via I2C bus. All clocks are fixed-rate clock sources
so that it doesn't supply interface for changing clock rate.
Driver uses regmap API to communicate with internal register.

Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 16:55:38 -07:00
Ulf Hansson ebc96db763 ARM: ux500: Switch to use common clock framework
Remove machine specific clock implementation and switch to use
new common clock framework.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 15:58:20 -07:00
Ulf Hansson 0e6dcde728 clk: ux500: Clock definitions for u8500
First version of clock definitions of PRCMU and PRCC clocks
for the u8500 platform.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 15:58:12 -07:00
Ulf Hansson bce5afd8d9 clk: ux500: First version of clock definitions for ux500
In this first version of the clock definitions, the structure for
ux500 are set. Support for u8500, u9540 and u8540 are prepared.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 15:58:04 -07:00
Ulf Hansson 3b01f87be2 clk: ux500: Adapt PRCMU and PRCC clocks for common clk
First version of common clock implementation of PRCMU clocks
and PRCC clocks for ux500 platforms.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-06 15:57:47 -07:00
Linus Walleij 672575e1de clk: versatile: make config option boolean
There is no choice to have the RealView clocks as module for sure,
so turn this config option into a boolean.

Reported-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-09-04 15:28:42 -07:00
Shawn Guo eeca6e6040 ARM: mxs: retrieve timer irq from device tree
Rather than using the static timer irq definition, we should retrieve
timer irq from device tree for better.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-03 09:31:50 +08:00
Kelvin Cheung 5175cb5894 clk: add Loongson1B clock support
This adds clock support to Loongson1B SoC using the common clock
infrastructure.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-31 11:05:18 -07:00
Chao Xie 4c5bca3419 clk: mmp: add clock definition for mmp2
Initialize the clocks for mmp2

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-28 14:15:42 -07:00
Chao Xie 84a62e6ed7 clk: mmp: add clock definition for pxa910
Initialize the clocks for pxa910

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-28 14:15:28 -07:00
Chao Xie e1b53b3d0f clk: mmp: add clock definition for pxa168
Initialize the clocks for pxa168

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-28 14:15:03 -07:00
Chao Xie 6b63f02318 clk: mmp: add mmp specific clocks
add mmp specific clocks including apbc cloks, apmu clocks,
and pll2, fraction clocks

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-28 14:14:14 -07:00
Linus Walleij f9a6aa4303 clk: convert ARM RealView to common clk
This converts the ARM RealView machine over to using the common
clock. The approach is similar to the one used for the Integrator,
and we're reusing the ICST wrapper code.

We have to put the clock intialization in the timer init function
for the clocks to be available when initializing the timer,
keeping them in early_init() is too early for the common clk.

Since we now have to go down and compile drivers/clk/versatile
a CONFIG_COMMON_CLK_VERSATILE symbol has been added so the proper
code gets compiled into the kernel for either machine. A leftover
CLK_VERSATILE in the Integrator Kconfig was fixed up to use
the new symbol as well.

Tested on ARM RealView PB1176.

Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-24 17:42:10 -07:00
Barry Song bc0e489eb0 clk: prima2: move from arch/arm/mach to drivers/clk
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-24 12:10:04 -07:00
Marek Vasut 1308239858 mmc: spi: Pull out the SSP clock configuration function
Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Chris Ball <cjb@laptop.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-08-17 22:53:00 +01:00
Fengguang Wu e47c6a3408 clk: validate pointer in __clk_disable()
clk_get() returns -ENOENT on error and some careless caller might
dereference it without error checking:

In mxc_rnga_remove():

        struct clk *clk = clk_get(&pdev->dev, "rng");

	// ...

        clk_disable(clk);

Since it's insane to audit the lots of existing and future clk users,
let's add a check in the callee to avoid kernel panic and warn about
any buggy user.

Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: viresh kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-30 17:25:13 -07:00
Viresh Kumar 01da40bf87 clk: remove redundant depends on from drivers/Kconfig
menu "Common Clock Framework" has "depends on COMMON_CLK" and so configs
defined within menu don't require these "depends on COMMON_CLK again".

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jeff Garzik <jgarzik@redhat.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Bhupesh Sharma <bhupesh.sharma@st.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: viresh kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-30 17:25:12 -07:00
Linus Torvalds 9161c3b796 The common clk framework changes for 3.6 include a small number of core
framework improvments, platform ports and new DT bindings.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQDyNXAAoJEDqPOy9afJhJYT8QAMXV2AcB/nF3iOesjj7dZlCB
 qjEDd+fbISQMsvBrj9r4+rSktNWS451I46Yob4lfgfd7aVGD7iA8EK7kd11aSIx7
 fjEfYuCoIBqdl0RJqXrKnXuoO/lKoX7kHdwdYj0BOZRDHoJs4CTpQaEhsTG2Ahp8
 Sn7LmqMFe+hfIIL8gCn9/R0dUa8kGjFlNMN9y4hW01oPYRBNW0m6C9Af3SJlrJ0d
 Besk6c5Q6GHpuwJvir4kw9cghOXIzdJRFO4t9XkVBCWqQTSDhbIObOL9svLljJn/
 OS4HKbvEpT1pY0P63qqzTv6o6VA3zGK+nt/oqa1T7EuZXktBS+G/eRNjAPEQx1BL
 bkLoM2zeSZ4zc/rWGrTk/rLGRSlzcHn1O+fy2P9RwtzhkIzN1FhxWd96FAWpFXsD
 VglwsB/WHQnZpi5VoQTtfqhBne6wo7BdNYpqrvYthG1OjsLgvqdK34HPESzvI+C1
 k9BpLBLkUmfejJeu9Ox28hOlq92WVAqrZPOBSdcM3nyTenYG9JWM+OUytKs+Ph7a
 j8eSopG/Obe63BCTq5lpBJ6gOgjNK7DrmDZPwEDjSe+w/pE08/41uyNgEmzExxs8
 1RQusSJAh6pJblixFYosrXtDsrU2HneJhR5aOFHKrHfqrXZ2bPoG/ut7wBr1opZF
 YJFNnvJ5zTbmku4HiEz8
 =V8ad
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux

Pull common clk framework changes from Michael Turquette:
 "This includes a small number of core framework improvments, platform
  ports and new DT bindings."

Fix up trivial conflicts in drivers/clk/Makefile

* tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (21 commits)
  clk: fix compile for OF && !COMMON_CLK
  clk: fix clk_get on of_clk_get_by_name return check
  clk: mxs: clk_register_clkdev mx28 usb clocks
  clk: add highbank clock support
  dt: add clock binding doc to primecell bindings
  clk: add DT fixed-clock binding support
  clk: add DT clock binding support
  ARM: integrator: convert to common clock
  clk: add versatile ICST307 driver
  ARM: integrator: put symbolic bus names on devices
  ARM: u300: convert to common clock
  clk: cache parent clocks only for muxes
  clk: wm831x: Add initial WM831x clock driver
  clk: Constify struct clk_init_data
  clk: Add CLK_IS_BASIC flag to identify basic clocks
  clk: Add support for rate table based dividers
  clk: Add support for power of two type dividers
  clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
  clk: mxs: add clkdev lookup for pwm
  clk: mxs: Fix the GPMI clock name
  ...
2012-07-24 16:40:57 -07:00
Linus Torvalds f01b9b73f5 arm-soc: new SoC support
This adds support for three new SoC types:
 * The mvebu platform includes Marvell's Armada XP and Armada 370 chips,
   made by the mvebu business unit inside of Marvell. Since the same
   group also made the older but similar platforms we call "orion5x",
   "kirkwood", "mv78xx0" and "dove", we plan to move all of them into
   the mach-mvebu directory in the future.
 * socfpga is Altera's platform based on Cortex-A9 cores and a lot of
   FPGA space. This is similar to the Xilinx zynq platform we already
   support. The code is particularly clean, which is helped by the fact
   that the hardware doesn't do much besides the parts that are
   expected to get added in the FPGA.
 * The OMAP subarchitecture gains support for the latest generation,
   the OMAP5 based on the new Cortex-A15 core. Support is rather
   rudimentary for now, but will be extended in the future.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIVAwUAUA2deGCrR//JCVInAQJLxg/8DHL6usaciRX0rDzxAkv2h0cezjgR/ect
 OfHdxhge7R50NEbf4Jayyly8fIvADJB5nIgk1jhYzAOroVAGxiZQxhyGn3p+Cpbm
 4weu78Uk5habgGA3DmV/R8rKhd1iFtr1DSHbogU43UjPj9Zz5WOREGNJehvxOr/2
 hUfymdqxNg4ivCWyA3w4IKhxA/Hrs351n3J3sY3wjLRPn/uZIlvyx4Q8InteAJZp
 96u5F9y34CxB9SkXAX0P+Bdb0L1fWhZ1J6E8wjOMp/t3LaSXvvWVgCl6MxTcERpf
 jeeABKPTQx99zkH3MdPRQfgBMwsez4L4dXh3qcJaEoqF//UXpE9cTTdjqYu6NRsJ
 znO8Ns8a2X4zX6KF4ySQf2jtLzH4aF21nq6NTJyYyfDWZixqRSKawbSsYqc1vtmi
 ReQ00feJrO60/A4Ks25asUfubqm/SXZ6BfHSgS/ZaOjgJaW9X42CUKnuIywXPTrY
 cAGDh4v1ZrWdXiQIu7oKgESSQNi4GrAEDYqVYs/PmSk2UiuzHcSuPMYxsCmLk8mH
 By7CLByXGOjzD9678LX2VHvKhK2l7Wd+Vkp/pGk4N4fK581JBfyBWfE0T5rpOU28
 +fIFVAV6U0I1OW879b5LmC/kjtmHPxePP6XUcHE152ef1CiT6zm5IE+C2Ukso71V
 +WKxBRBOxII=
 =MwdJ
 -----END PGP SIGNATURE-----

Merge tag 'newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull support for three new arm SoC types from Arnd Bergmann:

 - The mvebu platform includes Marvell's Armada XP and Armada 370 chips,
   made by the mvebu business unit inside of Marvell.  Since the same
   group also made the older but similar platforms we call "orion5x",
   "kirkwood", "mv78xx0" and "dove", we plan to move all of them into
   the mach-mvebu directory in the future.

 - socfpga is Altera's platform based on Cortex-A9 cores and a lot of
   FPGA space.  This is similar to the Xilinx zynq platform we already
   support.  The code is particularly clean, which is helped by the fact
   that the hardware doesn't do much besides the parts that are expected
   to get added in the FPGA.

 - The OMAP subarchitecture gains support for the latest generation, the
   OMAP5 based on the new Cortex-A15 core.  Support is rather
   rudimentary for now, but will be extended in the future.

* tag 'newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (25 commits)
  ARM: socfpga: initial support for Altera's SOCFPGA platform
  arm: mvebu: generate DTBs for supported SoCs
  ARM: mvebu: MPIC: read number of interrupts from control register
  arm: mach-mvebu: add entry to MAINTAINERS
  arm: mach-mvebu: add compilation/configuration change
  arm: mach-mvebu: add defconfig
  arm: mach-mvebu: add documentation for new device tree bindings
  arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
  arm: mach-mvebu: add source files
  arm: mach-mvebu: add header
  clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
  ARM: Kconfig update to support additional GPIOs in OMAP5
  ARM: OMAP5: Add the build support
  arm/dts: OMAP5: Add omap5 dts files
  ARM: OMAP5: board-generic: Add device tree support
  ARM: omap2+: board-generic: clean up the irq data from board file
  ARM: OMAP5: Add SMP support
  ARM: OMAP5: Add the WakeupGen IP updates
  ARM: OMAP5: l3: Add l3 error handler support for omap5
  ARM: OMAP5: gpmc: Update gpmc_init()
  ...

Conflicts:
	Documentation/devicetree/bindings/arm/omap/omap.txt
	arch/arm/mach-omap2/Makefile
	drivers/clocksource/Kconfig
	drivers/clocksource/Makefile
2012-07-23 16:31:31 -07:00
Linus Torvalds 5e512d0785 arm-soc: soc-specific updates
This is stuff that does not fit well into another category and in
 particular is not related to a particular board. The largest part
 in here is extending the am33xx support in the omap platform.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIVAwUAUA2daGCrR//JCVInAQLnfhAAz7VVS7vgk5uVFpRpLjRda4BEh3clb4xc
 e+sewWFHCgc3cMFC+/+b+jVa/AMKaZO6q6JxqiJFwPI5/m+LfSo0SWtR+e7qo1kc
 sMFFbUWXIh6WmcScKx17+UCrE9VUTmSMIDKpfqvdSuELoqTAHxWWAXh2Ju/P/wuP
 zd0Zd7BdYxpJtFeUqCVwJdoRVYYzz5Uh6/XVBJ17xGLLawRPEh2kARHuhR2zTh+3
 tIrx8VbU5LEWxnGRfft73bA56w+sD1EDOlmXSnkzh7NuCx8BU/IlAUVdUcVITbdb
 w1Wn/pyiIX9ESUAzo5E5SWD2eqxGZ22P6gy4uLdpBS/IAi8Db4CMOcl35bSBCuWB
 tgW/C2dM9ne60mM5mdMjGSEwCBnVxPRGFOdEDmazTePC8ztBBTf92zmpRK5myRHy
 8QL/dUhZ7MSxTAQqfKLLY4h+3N82pfJfNfnv/VVf074sw2wBftKW2BK4+OME48nD
 3cVvyzZGi0S4PEGmp2t+6J8DwoW8aGTl+giXruHPFEtDmJ68+GwtNM+PWTBkOft/
 DIukzRmm865tzzSYYAvqpPJ1E/xNt9bz/LSLb7lpNkQ39ovr89SalkZA2Mf1wBsb
 FtoJacQC5t+4JZecJBn7wudiQZ+sRcKhwk0DB816ZuWEsV2XPWGD/LSinoOkr1Jt
 YGITeGyZe9w=
 =Qclg
 -----END PGP SIGNATURE-----

Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm soc-specific updates from Arnd Bergmann:
 "This is stuff that does not fit well into another category and in
  particular is not related to a particular board.  The largest part in
  here is extending the am33xx support in the omap platform."

Fix up trivial conflicts in arch/arm/mach-{imx/mach-mx35_3ds.c, tegra/Makefile}

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: LPC32xx: Add PWM support
  ARM: LPC32xx: Add PWM clock
  ARM: LPC32xx: Set system serial based on cpu unique id
  ARM: vexpress: Config option for early printk console
  ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
  ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
  ARM: vexpress: Add fixed regulator for SMSC
  ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
  ARM: vexpress: Initial common clock support
  ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API
  ARM: EXYNOS: Add missing static storage class specifier in pmu.c file
  ARM: EXYNOS: Make combiner_init function static
  ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
  ARM: versatile: Make plat-versatile clock optional
  ARM: vexpress: Check master site in daughterboard's sysctl operations
  ARM: vexpress: remove automatic errata workaround selection
  ARM: LPC32xx: Adjust to pl08x DMA interface changes
  ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
  ARM: imx: fix mx51 ehci setup errors
  ARM: imx: make ehci power/oc polarities configurable
  ...
2012-07-23 16:08:40 -07:00
Rob Herring 137f8a7213 clk: fix compile for OF && !COMMON_CLK
With commit 766e6a4ec6 (clk: add DT clock binding support),
compiling with OF && !COMMON_CLK is broken.

Reported-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Reported-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-19 14:07:56 -07:00
Shawn Guo 9f1612d351 clk: fix clk_get on of_clk_get_by_name return check
The commit 766e6a4 (clk: add DT clock binding support) plugs device
tree clk lookup of_clk_get_by_name into clk_get, and fall on non-DT
lookup clk_get_sys if DT lookup fails.

The return check on of_clk_get_by_name takes (clk != NULL) as a
successful DT lookup.  But it's not the case.  For any system that
does not define clk lookup in device tree, ERR_PTR(-ENOENT) will be
returned, and consequently, all the client drivers calling clk_get
in their probe functions will fail to probe with error code -ENOENT
returned.

Fix the issue by checking of_clk_get_by_name return with !IS_ERR(clk),
and update of_clk_get and of_clk_get_by_name for !CONFIG_OF build
correspondingly.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-19 14:07:45 -07:00
Dinh Nguyen 66314223aa ARM: socfpga: initial support for Altera's SOCFPGA platform
Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-19 10:39:00 +02:00
Vipul Kumar Samar d4f513ff12 Clk: SPEAr1340: Update sys clock parent array
sys_clk has multiple parents and selection of parent depends on sys_clk_ctrl
register bit no. 23:25, with following possibilities

   0XX: pll1_clk
   10X: sys_synth_clk
   110: pll2_clk
   111: pll3_clk

Out of several possibilities (h/w wise) to select same clock parent for
sys_clk, current clock implementation was considering just one value.

When bootloader programmed different (valid) value to select a clock
parent then Linux breaks.

Here, we try to include all possibilities which can lead to same
clock selection thus making Linux independent of bootloader selection
values.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-07-18 10:04:53 +05:30
Vipul Kumar Samar d9ba8db215 clk: SPEAr1340: Fix clk enable register for uart1 and i2c1.
This patch is to fix typing mistake of clk enable register of i2c1 and
uart1.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-07-18 10:04:48 +05:30
Vipul Kumar Samar a8f4bf0eb4 Clk:spear6xx:Fix: Rename clk ids within predefined limit
The max limit of con_id is 16 and dev_id is 20. As of now for spear6xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    pll3_48m -> pll3_

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-07-18 10:04:42 +05:30
Vipul Kumar Samar 5cfc545f50 Clk:spear3xx:Fix: Rename clk ids within predefined limit
The max limit of con_id is 16 and dev_id is 20. As of now for spear3xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    ras_pll3_48m -> ras_pll3_
    pll3_48m -> pll3_

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-07-18 10:04:39 +05:30
Vipul Kumar Samar e28f1aa110 clk:spear1310:Fix: Rename clk ids within predefined limit
The max limit of con_id is 16 and dev_id is 20. As of now for spear1310, many
clk ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    gmac_phy -> phy_
    gmii_125m_pad -> gmii_pad

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-07-18 10:04:36 +05:30
Vipul Kumar Samar 5cb6a9bcca clk:spear1340:Fix: Rename clk ids within predefined limit
The max limit of con_id is 16 and dev_id is 20. As of now for spear1340, many
clk ids are exceeding this predefined limit.

This patch rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    gmac_phy -> phy_
    gmii_125m_pad_ -> gmii_pad

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-07-18 10:04:33 +05:30
Mike Turquette c782c384d2 Merge branch 'clk/mxs-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6 into clk-next 2012-07-12 09:48:19 -07:00
Richard Zhao 79ddff903e clk: mxs: clk_register_clkdev mx28 usb clocks
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Tested-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-07-12 13:13:33 +08:00
Rob Herring 8d4d9f5208 clk: add highbank clock support
This adds real clock support to Calxeda Highbank SOC using the common
clock infrastructure.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
[mturquette@linaro.org: fixed up invalid writes to const struct member]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 17:58:47 -07:00
Grant Likely 015ba40246 clk: add DT fixed-clock binding support
Add support for DT "fixed-clock" binding to the common fixed rate clock
support.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[Rob Herring] Rework and move into common clock infrastructure
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 17:58:46 -07:00
Grant Likely 766e6a4ec6 clk: add DT clock binding support
Based on work 1st by Ben Herrenschmidt and Jeremy Kerr, then by Grant
Likely, this patch adds support to clk_get to allow drivers to retrieve
clock data from the device tree.

Platforms scan for clocks in DT with of_clk_init and a match table, and
the register a provider through of_clk_add_provider. The provider's
clk_src_get function will be called when a device references the
provider's OF node for a clock reference.

v6 (Rob Herring):
    - Return error values instead of NULL to match clock framework
      expectations

v5 (Rob Herring):
    - Move from drivers/of into common clock subsystem
    - Squashed "dt/clock: add a simple provider get function" and
      "dt/clock: add function to get parent clock name"
    - Rebase to 3.4-rc1
    - Drop CONFIG_OF_CLOCK and just use CONFIG_OF
    - Add missing EXPORT_SYMBOL to various functions
    - s/clock-output-name/clock-output-names/
    - Define that fixed-clock binding is a single output

v4 (Rob Herring):
    - Rework for common clk subsystem
    - Add of_clk_get_parent_name function

v3: - Clarified documentation

v2: - fixed errant ';' causing compile error
    - Editorial fixes from Shawn Guo
    - merged in adding lookup to clkdev
    - changed property names to match established convention. After
      working with the binding a bit it really made more sense to follow the
      lead of 'reg', 'gpios' and 'interrupts' by making the input simply
      'clocks' & 'clock-names' instead of 'clock-input-*', and to only use
      clock-output* for the producer nodes. (Sorry Shawn, this will mean
      you need to change some code, but it should be trivial)
    - Add ability to inherit clocks from parent nodes by using an empty
      'clock-ranges' property.  Useful for busses.  I could use some feedback
      on the new property name, 'clock-ranges' doesn't feel right to me.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 17:58:45 -07:00
Linus Walleij a613163dff ARM: integrator: convert to common clock
This converts the Integrator platform to use common clock
and the ICST driver. Since from this point not all ARM
reference platforms use the clock, we define
CONFIG_PLAT_VERSATILE_CLOCK and select it for all platforms
except the Integrator.

Open issue: I could not use the .init_early() field of the
machine descriptor to initialize the clocks, but had to
move them to .init_irq(), so presumably .init_early() is
so early that common clock is not up, and .init_machine()
is too late since it's needed for the clockevent/clocksource
initialization. Any suggestions on how to solve this is
very welcome.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[mturquette@linaro.org: use 'select' instead of versatile Kconfig]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 17:58:45 -07:00
Linus Walleij 91b87a4795 clk: add versatile ICST307 driver
The ICST307 VCO clock has a shared driver in the ARM
architecture. This patch provides a wrapper into the common
clock framework so we can use the implementation in the
ARM architecture without duplicating the code until all
ARM platforms using this VCO are moved over. At that point
we can merge the driver from the ARM platform into the
generic file altogether.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mike Turquette <mturquette@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[mturquette@linaro.org: removed versatile Kconfig]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 17:58:44 -07:00
Mike Turquette cb479129ef Merge branch 'clk/mxs-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6 into clk-3.6 2012-07-11 17:57:49 -07:00
Linus Walleij 50667d6308 ARM: u300: convert to common clock
This converts the U300 clock implementation over to use the common
struct clk and moves the implementation down into drivers/clk.
Since VCO isn't used in tree it was removed, it's not hard to
put it back in if need be.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[mturquette@linaro.org: trivial Makefile conflict]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:45 -07:00
Rajendra Nayak 9ca1c5a4bf clk: cache parent clocks only for muxes
caching parent clocks makes sense only when a clock has more
than one parent (mux clocks).
Avoid doing this for every other clock.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[mturquette@linaro.org: removed extra parentheses]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:45 -07:00
Mark Brown f05259a6ff clk: wm831x: Add initial WM831x clock driver
The WM831x and WM832x series of PMICs contain a flexible clocking
subsystem intended to provide always on and system core clocks.  It
features:

- A 32.768kHz crystal oscillator which can optionally be used to pass
  through an externally generated clock.
- A FLL which can be clocked from either the 32.768kHz oscillator or
  the CLKIN pin.
- A CLKOUT pin which can bring out either the oscillator or the FLL
  output.
- The 32.768kHz clock can also optionally be brought out on the GPIO
  pins of the device.

This driver fully supports the 32.768kHz oscillator and CLKOUT.  The FLL
is supported only in AUTO mode, the full flexibility of the FLL cannot
currently be used.

Due to a lack of access to systems where the core SoC has been converted
to use the generic clock API this driver has been compile tested only.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:44 -07:00
Rajendra Nayak f7d8caadfd clk: Add CLK_IS_BASIC flag to identify basic clocks
Most platforms end up using a mix of basic clock types and
some which use clk_hw_foo struct for filling in custom platform
information when the clocks don't fit into basic types supported.

In platform code, its useful to know if a clock is using a basic
type or clk_hw_foo, which helps platforms know if they can
safely use to_clk_hw_foo to derive the clk_hw_foo pointer from
clk_hw.

Mark all basic clocks with a CLK_IS_BASIC flag.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:43 -07:00
Rajendra Nayak 357c3f0a6c clk: Add support for rate table based dividers
Some divider clks do not have any obvious relationship
between the divider and the value programmed in the
register. For instance, say a value of 1 could signify divide
by 6 and a value of 2 could signify divide by 4 etc.
Also there are dividers where not all values possible
based on the bitfield width are valid. For instance
a 3 bit wide bitfield can be used to program a value
from 0 to 7. However its possible that only 0 to 4
are valid values.

All these cases need the platform code to pass a simple
table of divider/value tuple, so the framework knows
the exact value to be written based on the divider
calculation and can also do better error checking.

This patch adds support for such rate table based
dividers and as part of the support adds a new
registration function 'clk_register_divider_table()'
and a new macro for static definition
'DEFINE_CLK_DIVIDER_TABLE'.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:42 -07:00
Rajendra Nayak 6d9252bd9a clk: Add support for power of two type dividers
Quite often dividers and the value programmed in the
register have a relation of 'power of two', something like
value	div
0	1
1	2
2	4
3	8...

Add support for such dividers as part of clk-divider.

The clk-divider flag 'CLK_DIVIDER_POWER_OF_TWO' should be used
to define such clocks.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-07-11 15:36:42 -07:00
Arnd Bergmann 0dc1951043 Linux 3.5-rc6
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.18 (GNU/Linux)
 
 iQEcBAABAgAGBQJP+NMmAAoJEHm+PkMAQRiGPxEH/18YQN8FAzEIjcC10ytA3RC3
 KzPv31jXgJGZDy1UqmpKtJ7GDwb92AhqZxVnJimMa+6d1uA8NsZQq5EMOPPiX8Qi
 8P4AEaw5kSMmR/6zxsxguCGdbDLU3xZ1nJZkHyMgjo2UJbMU0jBPneb/79heWPhe
 0HOkLzN5VA6Yx3Nt70sWQ1zsuj0Ji5jCGO0iNTCBmTiv4J9ZlOx3xJQn4aK6JscO
 /3QRTM43GG0j6zToEOCTHrn8ajOq6rHQQkG0bPVR723nFrSGLoaCT6QVBXYug+AZ
 9Xay7zVNvrq2oH5x5jADG2t2vyaG+nEJpSrVjXznzxgDnK7tWjYqiuG5zqKhAq8=
 =IMfr
 -----END PGP SIGNATURE-----

Merge tag 'v3.5-rc6' into next/soc

Linux 3.5-rc6

Dependency for imx/soc changes
2012-07-11 12:50:20 +02:00
Lauri Hintsala 64e2bc4130 clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
the frequency fix for ref_io1 to get SSP2 and SSP3 to work.

Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-07-05 09:36:44 +08:00
Rajendra Nayak 863b13271f clk: fix parent validation in __clk_set_parent()
The below commit introduced a bug in __clk_set_parent()
which could cause it to *skip* the parent validation
which makes sure the parent passed to the api is a valid
one.

    commit 7975059db5
    Author: Rajendra Nayak <rnayak@ti.com>
    Date:   Wed Jun 6 14:41:31 2012 +0530

        clk: Allow late cache allocation for clk->parents

This was identified by the following compiler warning..

    drivers/clk/clk.c: In function '__clk_set_parent':
    drivers/clk/clk.c:1083:5: warning: 'i' may be used uninitialized in this function [-Wuninitialized]

.. as reported by Marc Kleine-Budde.

There were various options discussed on how to fix this, one
being initing 'i' to clk->num_parents, but the below approach
was found to be more appropriate as it also makes the 'parent
validation' code simpler to read.

Reported-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
2012-07-03 12:05:14 -07:00
Shawn Guo 275d58025f clk: mxs: add clkdev lookup for pwm
Add pwm clock lookup for imx23 and imx28 booting from device tree.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-06-27 21:04:29 +08:00
Fabio Estevam 8c6facab8e clk: mxs: Fix the GPMI clock name
The correct name for the GPMI clock is 'gpmi-nand'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-06-27 21:04:28 +08:00
Huang Shijie bcf6c3d46f clk: mxs: rename the gpmi clock for imx28
rename the clock name from `8000c000.gpmi` to `8000c000.gpmi-nand`.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-06-27 21:04:27 +08:00
Marc Kleine-Budde d03ac61daa clk: mxs: fix clock lookup after freeing init memory
The struct clk_lookup are marked as __initdata, resulting in being
removed from memory after the kernel finished booting. However this
leads to a NULL pointer de-ref if loading a module which uses clk_get.

This patch removes the __initdata from the struct clk_lookup.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-06-25 16:51:48 -07:00
Shawn Guo d6dc55c185 clk: mxs: fix ref_io clock definition
The definition of clocks ref_io0 and ref_io1 were inverted.  It causes
a mmc regression on some boards right away.  Fix the regression by
correcting the ref_io clock definition.

Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-06-25 16:51:48 -07:00
Pawel Moll bf47b4fd8f clk: Check parent for NULL in clk_change_rate
clk_change_rate() is accessing parent's rate without checking
if the parent exists at all. In case of root clocks this will
cause NULL pointer dereference.

This patch follows what clk_calc_new_rates() does in such
situation.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
2012-06-25 16:51:48 -07:00
Rajendra Nayak 7975059db5 clk: Allow late cache allocation for clk->parents
Parent clocks for muxes are cached in clk->parents to
avoid frequent lookups, however the cache allocation happens
only during clock registeration and later clk_set_parent()
assumes a cache space available and allocated.

This is not entirely true for platforms which do early clock
registerations wherein the cache allocation using kzalloc
could fail during clock registeration.

Allow cache allocation to happen later as part of clk_set_parent()
to help such cases and avoid crashes assuming a cache being
available.

While here also replace existing kmalloc() with kzalloc()
in the file.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
2012-06-25 16:51:47 -07:00
Stefan Roese 3a35fc3a13 clk: SPEAr600: Fix ethernet clock name for DT based probing
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-06-25 16:51:47 -07:00
Viresh Kumar 10d8935f46 Viresh has moved
viresh.kumar@st.com email-id doesn't exist anymore as I have left the
company.  Replace ST's id with viresh.linux@gmail.com.

It also updates .mailmap file to fix address for 'git shortlog'

Signed-off-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-06-20 14:39:36 -07:00
Linus Walleij 4a31bd28e8 ARM: nomadik: convert to generic clock
Remove more custom stuff by simply converting the Nomadik machine
to use generic clocks and move the driver to drivers/clk.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Mike Turquette <mturquette@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-10 18:41:40 +02:00
Linus Torvalds 30b842889e arm-soc: soc specific changes, part 2
This adds support for the spear13xx platform, which has first been under
 review a long time ago and finally been completed after generic spear
 work has gone into the clock, dt and pinctrl branches.
 
 Also a number of updates for the samsung socs are part of this branch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJPuezDAAoJEIwa5zzehBx3mooP/iTHd1wRjr2MzKNx4+LpLWgl
 aAXH002xe9Lvu7m75BRvEYWWdRLkyEy9ARM4s2wJCnxU41KmbF65ED1erxK8xaSe
 Ako34vzH+HiUCM2DLzIP6FXyJMM7OcfrdGaY/GxOv+U+MzGUHeu3Q+8b0B/yfBnm
 M3HdDrpyZHKZP9UM3wVQ4/ilDck6vEjYSV2jC11IaHiDMRD2nSpfRKh8H3+gv65S
 gtj9EZpWM8CZg/fCe5lsm3PZnBnqHHW3WVafVnDQfGWeJYqZxMB5QKLU6qf/ntpx
 LU2WjXoGaMmGBVZWynrwNEY6GVp3fZrDV30/q8Htf0/fBpEjUncrLHXtw0DxkpnK
 UuyoRgn7zxOc3kDzohFNIexp1K3q+PNzXklR9hg7OSVji+9bPd2LIOEnpBeghBGj
 WzZIebz5dIdddHlnOl4fRdmxZva2UTuI4bFAJ0izi10Mup7A9lrENnFHG/iVA0rQ
 QlqJZoyeDCvbXQqZCgHirYRPhIxXdQj4G5IivfRxQ7Jgjy76Kt9uDp1egwezF/3a
 2jVtcK42XokVv3Dhsvq9UNFn9GWdVImZ7eh70XLv+q834zAVxSzjWLtlS8I1Q5WO
 7BGIJaICtugNwgYr44Dif6nsoVUmMnSwU5hVw1pApKZspN6EhMhMdp2hw8JPHFUs
 mrZdHi1NAWuYSbObc3UB
 =W2Ri
 -----END PGP SIGNATURE-----

Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
 "This adds support for the spear13xx platform, which has first been
  under review a long time ago and finally been completed after generic
  spear work has gone into the clock, dt and pinctrl branches.

  Also a number of updates for the samsung socs are part of this branch."

Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997d6 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c983 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.

So the conflict diff looks like hell, but it's actually a fairly simple
change.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: fix building with CONFIG_OF disabled
  ARM: EXYNOS: Add AUXDATA for i2c controllers
  ARM: dts: Update device tree source files for EXYNOS5250
  ARM: EXYNOS: Add device tree support for interrupt combiner
  ARM: EXYNOS: Add irq_domain support for interrupt combiner
  ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
  ARM: EXYNOS: update irqs for EXYNOS5250 SoC
  ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
  ARM: EXYNOS: add GPC4 bank instance
  ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
  ARM: EXYNOS: Modify the GIC physical address for static io-mapping
  ARM: EXYNOS: Add watchdog timer clock instance
  pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
  SPEAr: Update MAINTAINERS and Documentation
  SPEAr13xx: Add defconfig
  SPEAr13xx: Add compilation support
  SPEAr13xx: Add dts and dtsi files
  pinctrl: Add SPEAr13xx pinctrl drivers
  pinctrl: SPEAr: Create macro for declaring GPIO PINS
  SPEAr13xx: Add common clock framework support
  ...
2012-05-26 13:05:55 -07:00
Linus Torvalds 84a442b9a1 arm-soc: device tree conversions, part 2
These continue the device tree work from part 1, this set is for the
 tegra, mxs and imx platforms, all of which have dependencies on clock
 or pinctrl changes submitted earlier.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJPuex7AAoJEIwa5zzehBx3xsQP/jkyt74MvuKUi8pi2zkeMIgn
 4XieyqcA0KZjJzfB22q3GIZjNIf/mEIGE4E/3bneVMPh/E2zaiohaXFExBmjNjml
 hhzWeZlFGPBjrZsfpIXJIIUhwSI7gX2rjYh4npJmdNhZmy8Y89XnpNJhN1kOwMuV
 oN23hPWoSVGbyDMQ0fmHx9GyOL8m7yap+joG13aljDa2OKpQg+pYvdwft+k1K9di
 8yPF+qA043UUR7dSsjmTbiCcjZy2eySdCmfOAkEG4inSgxNoM7GBs3MuwZo/veCD
 v5WssJqWDbLXtqKn5Uo2bvGWiEcf0xtwOAqhSpbaup3dQFJSWMEenBTtA9UlxFhk
 6gdY62O+7k6N0thkxXyLNGkgaGzexZAsK7dM6XSDB+PqD+OSNJS7dvmxZM8tuaRn
 rvCM1XWcNeN/dpnLbgwCR12efkwWtJoqqUZUUp/tFFaTo8HriqeAIYk7obnR8s9n
 S5x9LeueQGNgaxXJzVdh481YKG/1lqjG/a06HbVgYS4XQvtdA+4khalOefJv10tm
 Nkg8+4/8pMthWJfhhlfPUgWFXOXFF2AGPG4su2XwKuFXypO8599lzi7gUQaEZu2U
 7caqoWP69KsKvK5iAAmA4DQ2rcsgHd44NXx/8Jjes9ma8knlYjrf42dBH6AZMQBG
 69I9sJ1cyqusBwx72NPN
 =WeDQ
 -----END PGP SIGNATURE-----

Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc device tree conversions (part 2) from Olof Johansson:
 "These continue the device tree work from part 1, this set is for the
  tegra, mxs and imx platforms, all of which have dependencies on clock
  or pinctrl changes submitted earlier."

Fix up trivial conflicts due to nearby changes in
drivers/{gpio/gpio,i2c/busses/i2c}-mxs.c

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: dt: tegra: invert status=disable vs status=okay
  ARM: dt: tegra: consistent basic property ordering
  ARM: dt: tegra: sort nodes based on bus order
  ARM: dt: tegra: remove duplicate device_type property
  ARM: dt: tegra: consistenly use lower-case for hex constants
  ARM: dt: tegra: format regs properties consistently
  ARM: dt: tegra: gpio comment cleanup
  ARM: dt: tegra: remove unnecessary unit addresses
  ARM: dt: tegra: whitespace cleanup
  ARM: dt: tegra cardhu: fix typo in SDHCI node name
  ARM: dt: tegra: cardhu: register core regulator tps62361
  ARM: dt: tegra30.dtsi: Add SMMU node
  ARM: dt: tegra20.dtsi: Add GART node
  ARM: dt: tegra30.dtsi: Add Memory Controller(MC) nodes
  ARM: dt: tegra20.dtsi: Add Memory Controller(MC) nodes
  ARM: dt: tegra: Add device tree support for AHB
  ARM: dts: enable audio support for imx28-evk
  ARM: dts: enable i2c device for imx28-evk
  i2c: mxs: add device tree probe support
  ARM: dts: enable mmc for imx28-evk
  ...
2012-05-26 12:57:47 -07:00
Arnd Bergmann 3c0dec5f58 Merge branch 'clk-next' of git://git.linaro.org/people/mturquette/linux into next/clock
* 'clk-next' of git://git.linaro.org/people/mturquette/linux:
  clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
  clk: Provide dummy clk_unregister()
  ARM: Kirkwood: Replace clock gating
  ARM: Orion: Audio: Add clk/clkdev support
  ARM: Orion: PCIE: Add support for clk
  ARM: Orion: XOR: Add support for clk
  ARM: Orion: CESA: Add support for clk
  ARM: Orion: SDIO: Add support for clk.
  ARM: Orion: NAND: Add support for clk, if there is one.
  ARM: Orion: EHCI: Add support for enabling clocks
  ARM: Orion: SATA: Add per channel clk/clkdev support.
  ARM: Orion: UART: Get the clock rate via clk_get_rate().
  ARM: Orion: WDT: Add clk/clkdev support
  ARM: Orion: Eth: Add clk/clkdev support.
  ARM: Orion: SPI: Add clk/clkdev support.
  ARM: Orion: Add clocks using the generic clk infrastructure.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-16 16:35:25 +02:00
Saravana Kannan 7e0fa1b5fa clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
The clk_set_rate() code shouldn't check the clock's enable count when
validating CLK_SET_RATE_GATE flag since the enable count could change after
the validation. Similar to clk_set_parent(), it should instead check the
prepare count. The prepare count should go to zero only when the end user
expects the clock to not be enabled in the future. Since the code already
grabs the prepare count before validation, it's not possible for prepare
count to change after validation and by association not possible for a well
behaving end user to enable the clock while the set rate is in progress.

Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Reviewed-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-05-15 22:42:10 -07:00
Mark Brown 1df5c939f6 clk: Provide dummy clk_unregister()
While there's no actual implementation behind it having the call to use
in drivers makes them feel neater from a driver author point of view. An
actual implementation can wait for someone who needs to use the function
in a real system.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[mturquette@linaro.org: void return type instead of int -EINVAL]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-05-15 12:02:39 -07:00
Viresh Kumar 0b928af1f4 SPEAr13xx: Add common clock framework support
This patch adds SPEAr1310 and SPEAr1340's clock framework support. It is based
on earlier support for SPEAr3xx family.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@ti.com>
2012-05-14 17:34:05 +02:00
Shawn Guo ef9b4d3996 mmc: mxs-mmc: get rid of the use of cpu_is_xxx
The register HW_SSP_VERSION is broken for ssp version detection,
as the address of the register is different between imx23 and imx28.
Let's use platform_device_id to detect the device, so that the use
of cpu_is_xxx can be removed.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Chris Ball <cjb@laptop.org>
2012-05-13 08:05:31 +08:00
Arnd Bergmann eae0185a96 Merge branch 'spear/clock' into next/clock
Viresh Kumar <viresh.kumar@st.com> writes:

 This is rebased over a (merge of Mike's/clk-next & SPEAr's DT) + Russell's
 patch: CLKDEV: provide helpers for common clock framework rebased over them.

* spear/clock:
  SPEAr: Switch to common clock framework
  SPEAr: Call clk_prepare() before calling clk_enable
  SPEAr: clk: Add General Purpose Timer Synthesizer clock
  SPEAr: clk: Add Fractional Synthesizer clock
  SPEAr: clk: Add Auxiliary Synthesizer clock
  SPEAr: clk: Add VCO-PLL Synthesizer clock

Conflicts:
	drivers/clk/Makefile

[Arnd: rebased again without the spear/dt branch]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-13 00:11:06 +02:00
Viresh Kumar 5df33a62c4 SPEAr: Switch to common clock framework
SPEAr SoCs used its own clock framework since now. From now on they will move to
use common clock framework.

This patch updates existing SPEAr machine support to adapt for common clock
framework.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-05-12 21:44:12 +02:00
Viresh Kumar a45896bd3a SPEAr: clk: Add General Purpose Timer Synthesizer clock
All SPEAr SoC's contain GPT Synthesizers. Their Fout is derived from
following equations:

Fout= Fin/((2 ^ (N+1)) * (M+1))

This patch adds in support for this type of clock.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
2012-05-12 21:19:27 +02:00
Viresh Kumar 270b9f421e SPEAr: clk: Add Fractional Synthesizer clock
All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from
following equations:

Fout = Fin / (2 * div) (division factor)
div is 17 bits:-
     0-13 (fractional part)
     14-16 (integer part)
     div is (16-14 bits).(13-0 bits) (in binary)

     Fout = Fin/(2 * div)
     Fout = ((Fin / 10000)/(2 * div)) * 10000
     Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000
     Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000

div << 14 is simply 17 bit value written at register.

This patch adds in support for this type of clock.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
2012-05-12 21:19:27 +02:00
Viresh Kumar 5335a639ec SPEAr: clk: Add Auxiliary Synthesizer clock
All SPEAr SoC's contain Auxiliary Synthesizers. Their Fout is derived based on
values of eq, x and y.

Fout from synthesizer can be given from two equations:
Fout1 = (Fin * X/Y)/2		EQ1
Fout2 = Fin * X/Y		EQ2

This patch adds in support for this type of clock.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
2012-05-12 21:19:26 +02:00
Viresh Kumar 55b8fd4f42 SPEAr: clk: Add VCO-PLL Synthesizer clock
All SPEAr SoC's contain PLLs. Their Fout is derived based on following equations

- In normal mode
  vco = (2 * M[15:8] * Fin)/N

- In Dithered mode
  vco = (2 * M[15:0] * Fin)/(256 * N)

pll_rate = vco/2^p

vco and pll are very closely bound to each other,
"vco needs to program: mode, m & n" and "pll needs to program p",
both share common enable/disable logic and registers.

This patch adds in support for this type of clock.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
2012-05-12 21:19:23 +02:00
Shawn Guo 8c92013643 dma: mxs-dma: make platform_device_id more generic
Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support
other SoCs like imx6q and reform the platform_device_id for the
better further dt support.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Huang Shijie <b32955@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
2012-05-12 13:32:17 +08:00
Shawn Guo 2954ff395b ARM: mxs: add initial device tree support for imx23-evk board
It adds initial device tree support for imx23-evk board, and only
serial console is enabled.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-05-12 13:32:17 +08:00
Dong Aisheng bc3a59c1b7 ARM: mxs: add initial device tree support for imx28-evk board
This patch includes basic dt support which can boot via nfs rootfs.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-05-12 13:32:16 +08:00
Arnd Bergmann 93c6d8927f Merge branch 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/clock
Shawn Guo <shawn.guo@linaro.org> writes:

  mxs common clk porting for v3.5.  It depends on the following two branches.

  [1] git://git.linaro.org/people/mturquette/linux.git clk-next
  [2] http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm.git clkdev

  As the mxs device tree conversion will constantly touch clock files,
  to save the conflicts, the updated mxs/dt branch coming later will
  based on this pull-request.

* 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mxs: remove now unused timer_clk argument from mxs_timer_init
  ARM: mxs: remove old clock support
  ARM: mxs: switch to common clk framework
  ARM: mxs: change the lookup name for fec phy clock
  ARM: mxs: request clock for timer
  clk: mxs: add clock support for imx28
  clk: mxs: add clock support for imx23
  clk: mxs: add mxs specific clocks

Includes an update to Linux 3.4-rc6

Conflicts:
	drivers/clk/Makefile

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-11 17:15:31 +02:00
Arnd Bergmann e12ff34402 Merge branch 'depends/rmk/clkdev' into next/clock
* depends/rmk/clkdev:
  CLKDEV: provide helpers for common clock framework
  ARM: 7392/1: CLKDEV: Optimize clk_find()
  ARM: 7376/1: clkdev: Implement managed clk_get()
2012-05-11 17:13:00 +02:00
Sascha Hauer f0948f59db clk: add a fixed factor clock
Having fixed factors/dividers in hardware is a common pattern, so
add a basic clock type doing this. It basically describes a fixed
factor clock using a nominator and a denominator.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
[mturquette@linaro.org: constify parent_names in static init macro]
[mturquette@linaro.org: copy/paste bug from mux in static init macro]
[mturquette@linaro.org: fix error handling in clk_register_fixed_factor]
[mturquette@linaro.org: improve division accuracy; thanks to Saravana]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-05-08 14:13:25 -07:00
Mike Turquette 31df9db995 clk: mux: assign init data
The original conversion to struct clk_hw_init failed to add the pointer
assignment in clk_register_mux.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-08 14:13:07 -07:00
Mike Turquette d269b974e3 clk: remove COMMON_CLK_DISABLE_UNUSED
Exposing this option generates confusion and incorrect behavior for
single-image builds across platforms.  Enable this behavior permanently.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Saravana Kannan <skannan@codeaurora.org>
2012-05-08 14:12:42 -07:00
Mike Turquette 63f5c3b2b1 clk: prevent spurious parent rate propagation
Patch 'clk: always pass parent_rate into .round_rate' made a subtle
change to the semantics of .round_rate.  It is now expected for the
parent's rate to always be passed in, simplifying the implemenation of
various .round_rate callback definitions.

However the patch also introduced a bug in clk_calc_new_rates whereby a
clock without the CLK_SET_RATE_PARENT flag set could still propagate a
rate change up to a parent clock if the the .round_rate callback
modified the &best_parent_rate value in any way.

This patch fixes the issue at the framework level (in
clk_calc_new_rates) by specifically handling the case where the
CLK_SET_RATE_PARENT flag is not set.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-08 14:11:53 -07:00
Shawn Guo 50260924af ARM: mxs: remove now unused timer_clk argument from mxs_timer_init
With old mxs clock support removed, the timer_clk argument of
mxs_timer_init is unused now, so remove it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-09 00:02:43 +08:00
Shawn Guo 2664681fa4 ARM: mxs: switch to common clk framework
It switches mxs clock support to common clk framework based drivers.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-09 00:02:41 +08:00
Shawn Guo 7d81397cd9 clk: mxs: add clock support for imx28
Add imx28 clock support based on common clk framework.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-09 00:02:38 +08:00
Shawn Guo ff261b7f64 clk: mxs: add clock support for imx23
Add imx23 clock support based on common clk framework.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-09 00:02:36 +08:00
Shawn Guo 23b5e15a29 clk: mxs: add mxs specific clocks
Add mxs specific clocks, pll, reference clock (PFD), integer divider
and fractional divider.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-09 00:02:35 +08:00
Russell King e9d7f40654 CLKDEV: provide helpers for common clock framework
The common clock framework allocates clocks dynamically.  Provide a
set of helpers to streamline the clkdev registration of the clock
lookups to avoid repetitive code sequences.

Reviewed-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-02 09:30:32 +01:00
Viresh Kumar 0e1c030175 clk: clk_set_rate() must fail if CLK_SET_RATE_GATE is set and clk is enabled
This is well documented but isn't implemented. clk_set_rate() must check if
flags have CLK_SET_RATE_GATE bit set and is enabled too.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-05-01 18:13:38 -07:00
Saravana Kannan 0197b3ea0f clk: Use a separate struct for holding init data.
Create a struct clk_init_data to hold all data that needs to be passed from
the platfrom specific driver to the common clock framework during clock
registration. Add a pointer to this struct inside clk_hw.

This has several advantages:
* Completely hides struct clk from many clock platform drivers and static
  clock initialization code that don't care for static initialization of
  the struct clks.
* For platforms that want to do complete static initialization, it removed
  the need to directly mess with the struct clk's fields while still
  allowing to statically allocate struct clk. This keeps the code more
  future proof even if they include clk-private.h.
* Simplifies the generic clk_register() function and allows adding optional
  fields in the future without modifying the function signature.
* Simplifies the static initialization of clocks on all platforms by
  removing the need for forward delcarations or convoluted macros.

Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[mturquette@linaro.org: kept DEFINE_CLK_* macros and __clk_init]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
2012-05-01 18:13:20 -07:00
Rob Herring 01033be174 clk: select CLKDEV_LOOKUP for COMMON_CLK
Using the common clock infrastructure without the common clkdev code makes
little sense, so select CLKDEV_LOOKUP for COMMON_CLK.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2012-04-24 16:37:41 -07:00
Viresh Kumar 1b2f99037a clk: Don't set clk->new_rate twice
if (!clk->ops->round_rate && (clk->flags & CLK_SET_RATE_PARENT)) is true, then
we don't need to set clk->new_rate here, as we will call clk_calc_subtree()
afterwards and it also sets clk->new_rate.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:41 -07:00
Viresh Kumar fbc42aab54 clk: clk-gate: Create clk_gate_endisable()
This patch tries to remove duplicate code for clk_gate clocks. This creates
another routine clk_gate_endisable() which will take care of enable/disable
clock with knowledge of CLK_GATE_SET_TO_DISABLE flag.

It works on following logic:

For enabling clock, enable = 1
	set2dis = 1	-> clear bit	-> set = 0
	set2dis = 0	-> set bit	-> set = 1

For disabling clock, enable = 0
	set2dis = 1	-> set bit	-> set = 1
	set2dis = 0	-> clear bit	-> set = 0

So, result is always: enable xor set2dis.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:40 -07:00
Shawn Guo f4d8af2e5a clk: propagate round_rate for CLK_SET_RATE_PARENT case
Need to propagate round_rate call for the clk that has no .round_rate
operation but with flag CLK_SET_RATE_PARENT set.

For example, clk_mux is a clk with no .round_rate operation.  However,
it could likely be in a clk_set_rate propagation path, saying it has
parent clk who has .round_rate and .set_rate operations.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:40 -07:00
Shawn Guo 1c0035d710 clk: pass parent_rate into .set_rate
For most of .set_rate implementation, parent_rate will be used, so just
like passing parent_rate into .recalc_rate, let's pass parent_rate into
.set_rate too.

It also updates the kernel doc for .set_rate ops.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:40 -07:00
Shawn Guo 81536e072b clk: always pass parent_rate into .round_rate
The parent_rate will likely be used by most .round_rate implementation
no matter whether flag CLK_SET_RATE_PARENT is set or not, so let's
always pass parent_rate into .round_rate.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:39 -07:00
Mike Turquette 27d545915f clk: basic: improve parent_names & return errors
This patch is the basic clk version of 'clk: core: copy parent_names &
return error codes'.

The registration functions are changed to allow the core code to copy
the array of strings and allow platforms to declare those arrays as
__initdata.

This patch also converts all of the basic clk registration functions to
return error codes which better aligns them with the existing clk.h api.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:39 -07:00
Mike Turquette d1302a36a7 clk: core: copy parent_names & return error codes
This patch cleans up clk_register and solves a few bugs by teaching
clk_register and __clk_init to return error codes (instead of just NULL)
to better align with the existing clk.h api.

Along with that change this patch also introduces a new behavior whereby
clk_register copies the parent_names array, thus allowing platforms to
declare their parent_names arrays as __initdata.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:39 -07:00
Mark Brown d305fb78f3 clk: Constify parent name arrays
Drivers should be able to declare their arrays of parent names as const
so the APIs need to accept const arguments.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[mturquette@linaro.org: constified gate]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:39 -07:00
Rajendra Nayak 34e44fe874 clk: Make clk_get_rate() return 0 on error
Most users of clk_get_rate() actually assume a non zero
return value as a valid rate returned. Returing -EINVAL
might confuse such users, so make it instead return zero
on error.

Besides the return value of clk_get_rate seems to be
'unsigned long'.

Signed-off-by: Rajendra nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:39 -07:00
Shawn Guo 822c250e15 clk: add "const" for clk_ops of basic clks
The clk_ops of basic clks should have "const" to match the definition
in "struct clk" and clk_register prototype.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:38 -07:00
Shawn Guo c0d2530c03 clk: remove unnecessary EXPORT_SYMBOL_GPL
It makes no sense to have EXPORT_SYMBOL_GPL on static functions.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:38 -07:00
Shawn Guo 10363b5838 clk: use kzalloc in clk_register_mux
Change clk_register_mux to use kzalloc, just like what all other basic
clk registration functions do.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:38 -07:00
Mike Turquette d4d7e3ddc7 clk: core: enforce clk_ops consistency
Documentation/clk.txt has some handsome ASCII art outlining which
clk_ops are mandatory for a given clock, given the capability of the
hardware.  Enforce those mandates with sanity checks in __clk_init.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:38 -07:00
Mike Turquette 7452b2191c clk: core: clk_calc_new_rates handles NULL parents
It is possible to call clk_set_rate on a clock with a NULL parent.  One
such example is an adjustable-rate root clock.  Ensure that
clk_calc_new_rates does not dereference parent without checking first
and also handle the corner cases gracefully.

Reported-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:37 -07:00
Mike Turquette 70d347e6cd clk: core: remove dead code paths
Some static inline dummy functions were left over from before the clock
core was consolidated from several C files down to one.  Remove them.

Reported-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:37 -07:00
Mike Turquette 5654dc94f8 clk: core: correct clk_set_rate kerneldoc
Remove old and misleading documentation from the previous clk_set_rate
implementaion.

Reported-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-04-24 16:37:37 -07:00
viresh kumar 67b508715a ARM: 7392/1: CLKDEV: Optimize clk_find()
clk_find must return as soon as it gets the correct clock. Currently it check
all clocks until it found a lookup with both dev_id and con_id matching.

If only one of them is passed, then we don't actually need to wait for both of
them to match. We can quit as soon as the requested id (dev_id or con_id)
matches.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-19 19:34:26 +01:00
Mark Brown a8a97db984 ARM: 7376/1: clkdev: Implement managed clk_get()
Allow clk API users to simplify their cleanup paths by providing a
managed version of clk_get() and clk_put().

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-19 19:34:18 +01:00
Arnd Bergmann 8fb61e3350 clk: make CONFIG_COMMON_CLK invisible
All platforms that use the common clk infrastructure should select
COMMON_CLK from platform code, and on all other platforms, it must
not be enabled, so there is no point making the option visible to
users, and when it is visible, we break randconfig builds.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-19 09:37:11 +00:00
Mike Turquette 9d9f78ed9a clk: basic clock hardware types
Many platforms support simple gateable clocks, fixed-rate clocks,
adjustable divider clocks and multi-parent multiplexer clocks.

This patch introduces basic clock types for the above-mentioned hardware
which share some common characteristics.

Based on original work by Jeremy Kerr and contribution by Jamie Iles.
Dividers and multiplexor clocks originally contributed by Richard Zhao &
Sascha Hauer.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-16 20:35:02 +00:00
Mike Turquette b2476490ef clk: introduce the common clock framework
The common clock framework defines a common struct clk useful across
most platforms as well as an implementation of the clk api that drivers
can use safely for managing clocks.

The net result is consolidation of many different struct clk definitions
and platform-specific clock framework implementations.

This patch introduces the common struct clk, struct clk_ops and an
implementation of the well-known clock api in include/clk/clk.h.
Platforms may define their own hardware-specific clock structure and
their own clock operation callbacks, so long as it wraps an instance of
struct clk_hw.

See Documentation/clk.txt for more details.

This patch is based on the work of Jeremy Kerr, which in turn was based
on the work of Ben Herrenschmidt.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Rob Herring <rob.herring <at> calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-16 20:35:01 +00:00
Shawn Guo 5c77f5608a clk: add config option HAVE_CLK_PREPARE into Kconfig
The commit 40d3e0f (clk: provide prepare/unprepare functions) provides
the config option HAVE_CLK_PREPARE for platforms that have
prepare/unprepare implementation to select.  This patch adds the option
into drivers/clk/Kconfig, so that it can be actually selected.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
2011-12-28 21:35:06 +08:00
Kyungmin Park aa3831cf9d ARM: Consolidate the clkdev header files
Now most of ARM machines has the alsmot same __clk_get/put() macro

So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files

But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config

Now there are only 3 caese.

1) define the clk structure with clkdev macro => Need to move clk structure to proper header file

arch/arm/mach-versatile/include/mach/clkdev.h
arch/arm/mach-realview/include/mach/clkdev.h
arch/arm/mach-vexpress/include/mach/clkdev.h
arch/arm/mach-integrator/include/mach/clkdev.h

2) export the __clk_get/put function at clock.c

arch/arm/mach-shmobile/include/mach/clkdev.h

3) demuxing the clk source
arch/arm/mach-u300/include/mach/clkdev.h

Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-07-19 18:09:45 +02:00
Russell King e8bf8df9c2 CLKDEV: Fix clkdev return value for NULL clk case
clkdev may incorrectly cause a clkdev entry with a NULL clk to return
-ENOENT.  This is not the intention of this code; -ENOENT should only
be returned if the clock entry can not be found in the table.  Fix
this.

Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-04-30 10:14:08 +01:00
Jean-Christop PLAGNIOL-VILLARD 6d803ba736 ARM: 6483/1: arm & sh: factorised duplicated clkdev.c
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.

as the code is identical at 99%

put the arch specific code for allocation as example in asm/clkdev.h

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 10:51:04 +00:00