Commit Graph

114 Commits

Author SHA1 Message Date
Colin Cross 4de3a8fa33 [ARM] tegra: Add APB DMA support
The APB DMA block handles DMA transfers to and from some peripherals
in the Tegra SOC.  It reads from sequential addresses on the memory
bus, and writes repeatedly to the same address on the APB bus.

Two transfer modes are supported, oneshot for transferring a known
size to or from a peripheral, and continuous for streaming data.
In continuous mode, a callback occurs when the buffer is half full
to allow the existing data to be handled and a new request queued.x

v2 changes:
	dma API no longer uses PTR_ERR

Signed-off-by: Erik Gilling <konkers@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:35 -07:00
Colin Cross 7056d423f1 [ARM] tegra: Add cpufreq support
Implement cpufreq support for the Tegra SOC.  DVFS is handled by the
core virtual cpu clock.  The frequencies of the two cores are tied
together, the highest frequency requested by either core determines
the actual frequency.

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:28 -07:00
Colin Cross 71fc84cc35 [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups
- Add drivers to clock lookup table
- Add new pll_m entries
- Support I2C U16 divider
- Fix rate reporting on 32.768kHz clock
- Call propagate rate only if set_rate succeeds
- Add support for audio_sync clock
- Add 24MHz to PLLA frequency list
- Correct i2s1/2/spdifout mux
- Add suspend support
- Fix enable/disable parent clocks in set_parent
- Add max_rate parameter to all clocks
- DVFS support
- Add virtual cpu clock with dvfs
- Support clk_round_rate
- Fix requesting very high periph frequencies
- Add quirks for PLLU:
   PLLU is slightly different from the rest of the PLLs.  The
   lock enable bit is at bit 22 instead of 18 in the MISC
   register, and the post divider field is a single bit with
   reversed values from other PLLs.
- Simplify recalculating clock rates
- Fix UART divider flags
- Remove unused clock ops

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:19 -07:00
Colin Cross 73625e3e2e [ARM] tegra: Add support for reading fuses
The Tegra SOC contains fuses to identify the CPU type and
bin, and a unique id.  The CPU info is required to determine
the correct voltages for each cpu and core frequency.

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:12:09 -07:00
Colin Cross c5f04b8d10 [ARM] tegra: pinmux: add safe values, move tegra2, add suspend
- the reset values for some pin groups in the tegra pin mux can result in
functional errors due to conflicting with actively-configured pin groups
muxing from the same controller. this change adds a known safe, non-
conflicting mux for every pin group, which can be used on platforms
where the pin group is not routed to any peripheral

- also add each pin group's I/O voltage rail, to enable platform code to
map from the pin groups used by each interface to the regulators used
for dynamic voltage control

- add routines to individually configure the tristate, pin mux and pull-
ups for a pingroup_config array, so that it is possible to program
individual values at run-time without modifying other values.
this allows driver power-management code to reprogram individual
interfaces into lower power states during idle / suspend, or to
reprogram the pin mux to support multiple physical busses per
internal controller (e.g., sharing a single I2C or SPI controller
across multiple pin groups)

- move chip-specific data like pingroups and drive-pingroups
out of the common code and into chip-specific code

- fix debug output for group with no pullups

- add a TEGRA_MUX_SAFE function.  Setting a pingroup to TEGRA_MUX_SAFE
will automatically select a mux setting that is guaranteed not to
conflict with any of the hardware blocks.

Signed-off-by: Gary King <gking@nvidia.com>
2010-10-21 18:11:41 -07:00
Colin Cross 8726e4f50e [ARM] tegra: Add legacy irq support
The "legacy irq controller" duplicates the functionality of the GIC,
but remains powered during the cpu suspend and idle modes that power
down the CPU and the GIC.

Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21 18:11:29 -07:00
Colin Cross 42a7bf4d26 [ARM] tegra: harmony: Add harmony board file
v2: fixes from Russell King
	- include linux/io.h instead of mach/io.h

v3: fixes from Linus Walleij
	- remove /16 * 16 from UART clock

v3:
	- Fix checkpatch issues
	- make board init calls explicit
	- use clock init table to set clocks
	- remove panel

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
2010-08-05 14:57:02 -07:00
Erik Gilling a4417c8451 [ARM] tegra: add pinmux support
v2: fixes from Russell King
	- include linux/io.h instead of asm/io.h
v3:
	- Add drive strength controls
	- Replace typedef enums with plain enums

Signed-off-by: Erik Gilling <konkers@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
2010-08-05 14:57:02 -07:00
Erik Gilling 3c92db9ac0 [ARM] tegra: add GPIO support
v2: fixes from Mike Rapoport:
	- move gpio-names.h to arch/arm/mach-tegra
    fixes from Russell King
	- include linux/io.h and linux/gpio.h instead of asm/io.h
	  and asm/gpio.h
    additional changes:
    	- add macros to convert between irq and gpio numbers for platform data
	- change for_each_bit to for_each_set_bit in gpio.c
v3:
	- minor bugfixes

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
2010-08-05 14:57:02 -07:00
Colin Cross 2d5cd9a38b [ARM] tegra: Add timer support
v2: fixes from Russell King:
	- include linux/io.h instead of asm/io.h
    fixes from Gary King:
	- remove extra (and incorrect) irq definitions
	- use timer 3 instead of timer 1 for compatibility with other drivers
	- fix typo that disabled oneshot mode
v3:
	- Implement sched_clock
	- Fix checkpatch issues
    fixes from Gary King:
    	- Fix incorrect cycles calculation
	- Fix min_delta_ns assignment
    fixes from Linus Walleij:
	- use calc_mult_shift() instead of hard coding values

Signed-off-by: Colin Cross <ccross@android.com>
2010-08-05 14:57:02 -07:00
Colin Cross 1cea7326b3 [ARM] tegra: SMP support
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
2010-08-05 14:57:01 -07:00
Colin Cross d861196163 [ARM] tegra: Add clock support
v2: fixes from Russell King:
	- include linux/io.h instead of asm/io.h
	- fix whitespace in Kconfig
	- Use spin_lock_init to initialize lock
	- Return -ENOSYS instead of BUG for unimplemented clock ops
	- Use proper return values in tegra2 clock ops
    additional changes:
	- Rename some clocks to match dev_ids
	- add rate propagation
	- add debugfs entries
	- add support for clock listed in clk_lookup under multiple dev_ids
v3:
	- Replace per-clock locking with global clock lock
	- Autodetect clock state on init
	- Let clock dividers pick next lower possible frequency
	- Add support for clock init tables
	- Minor bug fixes
	- Fix checkpatch issues

Signed-off-by: Colin Cross <ccross@android.com>
2010-08-05 14:51:42 -07:00
Erik Gilling 5ad36c5f0e [ARM] tegra: Add IRQ support
v2: fixes from Russell King
	- include linux/io.h instead of asm/io.h and mach/io.h

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
2010-08-05 14:51:42 -07:00
Erik Gilling c5f800656b [ARM] tegra: initial tegra support
v2: Fixes from Mike Rapoport
	- remove unused header files (mach/dma.h and mach/nand.h)
	- remove tegra 1 references from Makefile.boot

v2: fixes from Russell King
	- remove mach/io.h include from mach/iomap.h
	- fix whitespace in Kconfig

v2: from Colin Cross
	- fix invalid immediate in debug-macro.S

v3:
	- allow selection of multiple boards

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
2010-08-05 14:51:42 -07:00