Change ADI BSD license to standart 3 clause BSD license for some blackfin arch
code requested by ADI Legal.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Re-architect how we save/restore the gpio/port logic that only pertains
to bf538/bf539 parts by pulling it out of the core code paths and pushing
it out to bf538-specific locations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the serial code has been unified in bfin_serial.h, and the
Blackfin UART driver pushed its resources to the boards files, we
don't need these headers anymore.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.
The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These were only included because of the irq handling of the PLL funcs,
and those PLL funcs have been moved out into their own header now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The main asm/blackfin.h header will pull in mach/blackfin.h to get
all the fun Blackfin defines. So having any of the sub-mach headers
trying to include asm/blackfin.h makes no sense -- punt it.
The mach/blackfin.h header takes care of including the part-specific
def headers which in turn will include any other needed def file.
Similarly, it takes care of pulling in the part-specific cdef header.
So move this logic out of the blackfin.h when necessary.
Further, make sure the cdef headers do not waste time including the
def headers again.
Since all parts need the common def/cdef headers, move this logic
out of the part-specific headers and into the mach/blackfin.h file.
Finally, we need to split the BF539 def header since the BF538 does
not have MXVR and we don't want to expose those MMRs.
So now all parts should have the same behavior:
mach/blackfin.h
asm/def_LPBlackfin.h
part-specific def.h
if ! asm
asm/cdef_LPBlackfin.h
part-specific cdef.h
And the sub def/cdef headers only tail into what they need.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.
Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Each Blackfin port has been duplicating UART structures and defines when
there really is no need for it. So start a new bfin_serial.h header to
unify all these pieces and give ourselves a fresh start.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the common header defines everything and the SPI drivers are
using it, we can drop these duplicated global namespace polluters.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rename h/w IRQ flags handling functions to be in line with what is expected for
the irq renaming patch. This renames local_*_hw() to hard_local_*() using the
following perl command:
perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"`
and then fixing up asm/irqflags.h manually.
Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both
return the flags rather than passing it through the argument list.
Signed-off-by: David Howells <dhowells@redhat.com>
Split the PLL control code from the Blackfin machine-specific cdef headers so
that the irqflags functions can be renamed without incurring a header loop.
Signed-off-by: David Howells <dhowells@redhat.com>
The common bfin_sport.h header now has unified definitions of these, so
stop polluting the global namespace.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The standard short name for control is CTL and not CTRL. Use TWI0_xxx
even on parts that only have one TWI bus to keep things simple. Drop
all the cdef helpers since the bus driver takes care of everything.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of
the GPIO value so it can be used with the normal gpio API.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that there's a common header with everything unified, drop the defines
from the global namespace. Pollution sucks.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This makes room for off-chip IRQ controllers.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Every Blackfin variant has the same DMA bit masks, so avoid duplicating
them over and over in each mach header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There are no MXVR device drivers, and if someday there is, we can put
these in a dedicated header rather than polluting the global namespace.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The watchdog code doesn't need these, and the other parts had these
punted, so keep the global namespace clean.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The RTC driver code doesn't need these, and the other parts had these
punted, so keep the global namespace clean.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The GPIOs on ports C/D/E on the BF538/BF539 do not behave the same way as
the other ports on the part and the same way as all other Blackfin parts.
The MMRs are programmed slightly different and they cannot be used to
generate interrupts or wakeup a sleeping system. Since these guys don't
fit into the existing code, create a simple gpiolib driver for them.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add some recently documented anomalies (473, 474, 475, 477). Also stick
a "do not edit" notice in here so people know these are copies of some
master version.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Bill Gatliff & David Brownell pointed out we were missing some
copyrights, and licensing terms in some of the files in
./arch/blackfin, so this fixes things, and cleans them up.
It also removes:
- verbose GPL text(refer to the top level ./COPYING file)
- file names (you are looking at the file)
- bug url (it's in the ./MAINTAINERS file)
- "or later" on GPL-2, when we did not have that right
It also allows some Blackfin-specific assembly files to be under a BSD
like license (for people to use them outside of Linux).
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add the bf538 version of bfin_clear_PPI_STATUS() to match all other ports.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin serial headers were inverting the CTS value leading to wrong
handling of the CTS line which broke CTS/RTS handling completely.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Many aspects of the Blackfin memory map is exactly the same across all
variants. Rather than copy and paste all of these duplicated values in
each header, unify all of these into the common Blackfin memory map header
file. In the process, push down BF561 SMP specific stuff to the BF561
specific header to keep the noise down.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add some defines to make the BF538/BF561 look like most other Blackfin
parts in that it has a MDMA0 channel available for low level init.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Both software emulated and hardware based CTS and RTS are enabled in
serial driver.
The CTS RTS PIN connection on BF548 UART port is defined as a modem
device not as a host device. In order to test it under Linux, please
nake a cross UART cable to exchange CTS and RTS signal.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
I have a system where UART0 is configured with hardware flow control, but UART1
doesn't have it enabled. Attempting to access UART1 in this configuration
results in the following error in dmesg:
<3>bfin-gpio: GPIO 0 is already reserved as Peripheral by bfin-uart !
<5>Stack from 0082bc7c:
<5> 0082bc88 00404dd6 00000003 00000000 0054051e 004079da 0082bcb4
00000000
<5> 00000003 00000000 0052686c 0113f2a0 005fa3f0 00000032 20515249
00003035
<5> 00427228 00526e50 0113f2e0 005fa3f0 00000032 0113f2e0 0054b748
0000ffff
<5> 22222222 22222222 004e1628 00427304 00000000 00000032 00000023
0054b748
<5> 00487a94 0054b7e8 0054b748 0000000b 00487fb8 0054b748 0054b748
00000001
<5> 0000000a 005fa3f0 009d4fe8 0101e3c0 0054b748 005fa3f0 0050b134
0054b748
<5>
<5>Call Trace:
<4>[<00485c16>] _uart_startup+0x56/0x178
<4>[<004865c8>] _uart_open+0x40/0x3e0
<4>[<0048661c>] _uart_open+0x94/0x3e0
<4>[<0047f1ce>] _init_dev+0x1fa/0x450
<4>[<004e1628>] ___mutex_unlock_slowpath+0x30/0xe8
<4>[<004815da>] _tty_open+0xf6/0x21c
<4>[<0043dab0>] ___path_lookup_intent_open+0x34/0x7c
<4>[<004375e4>] _chrdev_open+0x7c/0x134
<4>[<0043dc2c>] _open_namei+0x60/0x568
<4>[<00433fa2>] ___dentry_open+0x9e/0x188
<4>[<00437568>] _chrdev_open+0x0/0x134
<4>[<0043410c>] _nameidata_to_filp+0x30/0x3c
<4>[<00434152>] _do_filp_open+0x3a/0x44
<4>[<00408826>] _task_running_tick+0x102/0x278
<4>[<0043418e>] _do_sys_open+0x32/0xac
<4>[<0043ede4>] _sys_ioctl+0x28/0x50
<4>[<0043edbc>] _sys_ioctl+0x0/0x50
<4>[<00434224>] _sys_open+0x18/0x20
<4>[<0043420c>] _sys_open+0x0/0x20
<4>[<00418174>] _sys_setuid+0x0/0xc8
This is because the #ifdef's in bfin_serial_5xx.h are messed up. More
specifically, they add/remove the uart_{rts,cts}_pin fields in
bfin_serial_resources based on whether the particular port has rts/cts enabled,
as opposed to when either port has it enabled.
This patch fixed this.
Signed-off-by: Tom Parker <blackfin@tevp.net>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
make sure ANOMALY_05000278/ANOMALY_05000380 is defined for all parts
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
[Mike Frysinger <vapier.adi@gmail.com>:
- setup P_DEFAULT_BOOT_SPI_CS for every arch based on
the default bootrom behavior and convert all our boards
to it
- revert previous anomaly change ... bf51x is not affected
by anomaly 05000353]
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Sonic Zhang