Commit Graph

300609 Commits

Author SHA1 Message Date
Jerome Glisse f2e3922106 drm/radeon: make the ib an inline object
No need to malloc it any more.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:55 +01:00
Christian König f237750f00 drm/radeon: remove r600 blit mutex v2
If we don't store local data into global variables
it isn't necessary to lock anything.

v2: rebased on new SA interface

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:54 +01:00
Jerome Glisse 68470ae7e6 drm/radeon: move the semaphore from the fence into the ib
It never really belonged there in the first place.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:49 +01:00
Christian König 7c0d409db5 drm/radeon: immediately free ttm-move semaphore
We can now protected the semaphore ram by a
fence, so free it immediately.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:46 +01:00
Jerome Glisse c507f7ef30 drm/radeon: rip out the ib pool
It isn't necessary any more and the suballocator seems to perform
even better.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:41 +01:00
Jerome Glisse a8c05940bd drm/radeon: simplify semaphore handling v2
Directly use the suballocator to get small chunks of memory.
It's equally fast and doesn't crash when we encounter a GPU reset.

v2: rebased on new SA interface.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:40 +01:00
Christian König c3b7fe8b8a drm/radeon: multiple ring allocator v3
A startover with a new idea for a multiple ring allocator.
Should perform as well as a normal ring allocator as long
as only one ring does somthing, but falls back to a more
complex algorithm if more complex things start to happen.

We store the last allocated bo in last, we always try to allocate
after the last allocated bo. Principle is that in a linear GPU ring
progression was is after last is the oldest bo we allocated and thus
the first one that should no longer be in use by the GPU.

If it's not the case we skip over the bo after last to the closest
done bo if such one exist. If none exist and we are not asked to
block we report failure to allocate.

If we are asked to block we wait on all the oldest fence of all
rings. We just wait for any of those fence to complete.

v2: We need to be able to let hole point to the list_head, otherwise
    try free will never free the first allocation of the list. Also
    stop calling radeon_fence_signalled more than necessary.

v3: Don't free allocations without considering them as a hole,
    otherwise we might lose holes. Also return ENOMEM instead of ENOENT
    when running out of fences to wait for. Limit the number of holes
    we try for each ring to 3.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:39 +01:00
Jerome Glisse 0085c95061 drm/radeon: use one wait queue for all rings add fence_wait_any v2
Use one wait queue for all rings. When one ring progress, other
likely does to and we are not expecting to have a lot of waiter
anyway.

Also add a fence_wait_any that will wait until the first fence
in the fence array (one fence per ring) is signaled. This allow
to wait on all rings.

v2: some minor cleanups and improvements.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:38 +01:00
Christian König 557017a0e2 drm/radeon: define new SA interface v3
Define the interface without modifying the allocation
algorithm in any way.

v2: rebase on top of fence new uint64 patch
v3: add ring to debugfs output

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:37 +01:00
Christian König 2e0d99103e drm/radeon: make sa bo a stand alone object
Allocating and freeing it seperately.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:35 +01:00
Christian König e6661a9664 drm/radeon: keep start and end offset in the SA
Instead of offset + size keep start and end offset directly.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:34 +01:00
Christian König 711a972933 drm/radeon: add sub allocator debugfs file
Dumping the current allocations.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:33 +01:00
Christian König a651c55a0b drm/radeon: add proper locking to the SA v3
Make the suballocator self containing to locking.

v2: split the bugfix into a seperate patch.
v3: remove some unreleated changes.

Sig-off-by: Christian König <deathsimple@vodafone.de>

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:32 +01:00
Christian König dd8bea2111 drm/radeon: use inline functions to calc sa_bo addr
Instead of hacking the calculation multiple times.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:31 +01:00
Christian König 8a47cc9ec1 drm/radeon: rework locking ring emission mutex in fence deadlock detection v2
Some callers illegal called fence_wait_next/empty
while holding the ring emission mutex. So don't
relock the mutex in that cases, and move the actual
locking into the fence code.

v2: Don't try to unlock the mutex if it isn't locked.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:20 +01:00
Jerome Glisse 3b7a2b24ea drm/radeon: rework fence handling, drop fence list v7
Using 64bits fence sequence we can directly compare sequence
number to know if a fence is signaled or not. Thus the fence
list became useless, so does the fence lock that mainly
protected the fence list.

Things like ring.ready are no longer behind a lock, this should
be ok as ring.ready is initialized once and will only change
when facing lockup. Worst case is that we return an -EBUSY just
after a successfull GPU reset, or we go into wait state instead
of returning -EBUSY (thus delaying reporting -EBUSY to fence
wait caller).

v2: Remove left over comment, force using writeback on cayman and
    newer, thus not having to suffer from possibly scratch reg
    exhaustion
v3: Rebase on top of change to uint64 fence patch
v4: Change DCE5 test to force write back on cayman and newer but
    also any APU such as PALM or SUMO family
v5: Rebase on top of new uint64 fence patch
v6: Just break if seq doesn't change any more. Use radeon_fence
    prefix for all function names. Even if it's now highly optimized,
    try avoiding polling to often.
v7: We should never poll the last_seq from the hardware without
    waking the sleeping threads, otherwise we might lose events.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:19 +01:00
Jerome Glisse bb63556729 drm/radeon: convert fence to uint64_t v4
This convert fence to use uint64_t sequence number intention is
to use the fact that uin64_t is big enough that we don't need to
care about wrap around.

Tested with and without writeback using 0xFFFFF000 as initial
fence sequence and thus allowing to test the wrap around from
32bits to 64bits.

v2: Add comment about possible race btw CPU & GPU, add comment
    stressing that we need 2 dword aligned for R600_WB_EVENT_OFFSET
    Read fence sequenc in reverse order of GPU write them so we
    mitigate the race btw CPU and GPU.

v3: Drop the need for ring to emit the 64bits fence, and just have
    each ring emit the lower 32bits of the fence sequence. We
    handle the wrap over 32bits in fence_process.

v4: Just a small optimization: Don't reread the last_seq value
    if loop restarts, since we already know its value anyway.
    Also start at zero not one for seq value and use pre instead
    of post increment in emmit, otherwise wait_empty will deadlock.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:17 +01:00
Christian König d6999bc7b5 drm/radeon: replace the per ring mutex with a global one
A single global mutex for ring submissions seems sufficient.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:14 +01:00
Jerome Glisse 133f4cb336 drm/radeon: fix possible lack of synchronization btw ttm and other ring
We need to sync with the GFX ring as ttm might have schedule bo move
on it and new command scheduled for other ring need to wait for bo
data to be in place.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-09 17:22:12 +01:00
Daniel Vetter 38e490fea7 MAINTAINERS: switch drm/i915 to Daniel Vetter
... given that I essentially run the show already, let's make this
official.

Acked-by: Dave Airlie <airlied@redhat.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-09 09:15:50 +02:00
Daniel Vetter bc2481f313 drm/i915: s/intel_infoframe/gm45_infoframe
These two functions are actually hw-specific and only valid for gm45
thru gen7. HSW completely changes how this works, so label them
accordingly.

v2: s/gm45/g4x/ like for the previous patch.

Acked-by: Paulo Zanoni <przanoni@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 15:38:19 +02:00
Daniel Vetter a3da1df7bd drm/i915: s/i9xx_/gm45_ for the gm45 write_infoframe function
Generally we call stuff with i9xx_ when it's valid for gen3+. But
gen3 and early gen4 only support hdmi with sdvo cards, and writing
infoframes works completely different there.

v2: Use g4x instead of gm45 - it applies to the desktop variant, too.

v3: Properly align the paramters of g4x_write_infoframe again, noticed
by Paulo Zanoni.

Acked-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 15:37:14 +02:00
Daniel Vetter 4b24c9331a drm/i915: replace intel_infoframe_freq with VIDEO_DIP_FREQ_VSYNC
Simplifies things because for all the infoframes we care about,
we always send them on each vblank. Also, this gets rid of one
of the hw specific functions mislabelled with the intel_ prefix -
hsw will completely change how this works!

Acked-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 15:32:33 +02:00
Chris Wilson acb87dfb4b drm/i915: Limit calling mark-busy only for potential scanouts
The principle of intel_mark_busy() is that we want to spot the
transition of when the display engine is being used in order to bump
powersaving modes and increase display clocks. As such it is only
important when the display is changing, i.e. when rendering to the
scanout or other sprite/plane, and these are characterised by being
pinned.

v2: Mark the whole device as busy on execbuffer and pageflips as well
and rebase against dinq for the minor bug fix to be immediately
applicable.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: fix compile fail.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 15:10:34 +02:00
Paulo Zanoni a928d536c0 drm/i915: implement ironlake_wait_for_vblank
intel_wait_for_vblank uses PIPESTAT, which does not exist on Ironlake
and newer, so now we use PIPEFRAME.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Ditch the check for disable pipe from the new ilk wait for
vblank function to keep it consisten with existing behaviour.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 15:07:38 +02:00
Paulo Zanoni 4e89ee174b drm/i915: set the DIP port on ibx_write_infoframe
Just like Gen 4, IBX has a "Port Select" field on the DIP register,
but the ports are different.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:26:45 +02:00
Paulo Zanoni 4dc20c0d18 drm/i915: ibx_write_infoframe can disable AVI
IBX does not need the workaround used in cpt_write_infoframe that
requires the AVI frame to be enabled while being updated.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:23:44 +02:00
Paulo Zanoni fdf1250aaa drm/i915: split ironlake_write_infoframe into ibx_ and cpt_
The registers are on the PCH, so use the PCH name instead of the CPU
name. Also, the way this function is implemented is really only for
CPT and PPT. For now, both functions have the same implementations:
the next patch will fix ibx_write_infoframe.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:23:34 +02:00
Paulo Zanoni d47d7cb824 drm/i915: simplify intel_encoder_commit
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:16:03 +02:00
Paulo Zanoni 60c5ea2dd9 drm/i915: mask the video DIP frequency when changing it
Better safe than sorry. Currently we never change the frequency and
use the same for every infoframe type, so the only way to reproduce a
bug would be with the BIOS doing something.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:15:59 +02:00
Paulo Zanoni ecb978515c drm/i915: disable the infoframe before changing it
That's what the VIDEO_DIP_CTL documentation says we need to do. Except
when it's the AVI InfoFrame and we're ironlake_write_infoframe.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:15:51 +02:00
Paulo Zanoni fa193ff799 drm/i915: break intel_infoframe_flags into _enable and _frequency
This will allow us to disable an infoframe without changing its
frequency.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:14:42 +02:00
Paulo Zanoni 3e6e63952f drm/i915: mask the video DIP port select
Should prevent bugs when changing the port.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:04:21 +02:00
Paulo Zanoni 1d4f85ac2d drm/i915: start writing infoframes at address 0 on gen 4
Make sure we're doing the right thing, just like we do on gen5+.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:04:15 +02:00
Paulo Zanoni 22509ec867 drm/i915: change coding style of the write_infoframe functions
Don't use intermediate variables, change the value of 'val' as we go
through the function. The new style looks more similar to the rest of
our code. IMHO, it's also easier to read and change.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 14:02:43 +02:00
Paulo Zanoni 837ba00f20 drm/i915: DSL_LINEMASK is 12 bits only on gen2
Gen3+ is 13 bits (12:0), and on gen2 only 12 (11:0). For both the high
bits are marked reserved, read-only so continue to mask them. Bit 31
is not reserved and has a meaning.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 13:45:33 +02:00
Daniel Vetter 5e13a0c5ec Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queued
Backmerge of drm-next to resolve a few ugly conflicts and to get a few
fixes from 3.4-rc6 (which drm-next has already merged). Note that this
merge also restricts the stencil cache lra evict policy workaround to
snb (as it should) - I had to frob the code anyway because the
CM0_MASK_SHIFT define died in the masked bit cleanups.

We need the backmerge to get Paulo Zanoni's infoframe regression fix
for gm45 - further bugfixes from him touch the same area and would
needlessly conflict.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-08 13:39:59 +02:00
Dave Airlie 4f256e8aa3 Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
Daniel prepared this branch with a back-merge as git was getting
very confused about changes in intel_display.c
2012-05-07 16:09:35 +01:00
Daniel Vetter dc257cf154 Linux 3.4-rc6
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Merge tag 'v3.4-rc6' into drm-intel-next

Conflicts:
	drivers/gpu/drm/i915/intel_display.c

Ok, this is a fun story of git totally messing things up. There
/shouldn't/ be any conflict in here, because the fixes in -rc6 do only
touch functions that have not been changed in -next.

The offending commits in drm-next are 14415745b2..1fa611065 which
simply move a few functions from intel_display.c to intel_pm.c. The
problem seems to be that git diff gets completely confused:

$ git diff 14415745b2..1fa611065

is a nice mess in intel_display.c, and the diff leaks into totally
unrelated functions, whereas

$git diff --minimal  14415745b2..1fa611065

is exactly what we want.

Unfortunately there seems to be no way to teach similar smarts to the
merge diff and conflict generation code, because with the minimal diff
there really shouldn't be any conflicts. For added hilarity, every
time something in that area changes the + and - lines in the diff move
around like crazy, again resulting in new conflicts. So I fear this
mess will stay with us for a little longer (and might result in
another backmerge down the road).

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-07 14:02:14 +02:00
Kirill A. Shutemov 4086b1e2b1 gma500: mid-bios: rewrite VBT/GCT handling in a cleaner way
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:58 +01:00
Kirill A. Shutemov 4ad35b2e32 gma500: fix -Wmissing-include-dirs warnings
cc1: warning: include/drm: No such file or directory [enabled by default]

It's reproducible if you build with O=/some/obj/dir and W=1.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:57 +01:00
Kirill A. Shutemov 71ab1bee53 gma500: cdv_intel_lvds: mark cdv_intel_lvds_enc_funcs as static
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:56 +01:00
Kirill A. Shutemov 1f17fcd07b gma500: oaktrail_hdmi_i2c_handler(): base should be __iomem
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:55 +01:00
Kirill A. Shutemov d64363c755 gma500: lid_state should be __iomem
This was mostly already fixed but this one change is needed to match Kirill's
original submission

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:54 +01:00
Kirill A. Shutemov 9d12028884 gma500: psb_irq_turn_off_dpst() fix bit operation
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:53 +01:00
Kirill A. Shutemov 232e6686ab gma500: framebuffer: mark psb_fb_helper_funcs as static
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:52 +01:00
Kirill A. Shutemov 37214ca00e gma500: vram_addr should be __iomem
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:51 +01:00
Kirill A. Shutemov 846a6038d6 gma500: sgx_reg and vdc_reg should be __iomem
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:50 +01:00
Kirill A. Shutemov eab3760714 gma500: gtt: fix __iomem sparse warnings
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:49 +01:00
Kirill A. Shutemov f728bd1a94 gma500: psb_gtt_init(): drop unused variable
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-07 10:58:48 +01:00