Remove unused variable 'condition' which was set but not used.
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Reviewed-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch removes the ugly macro hack to make sure hw_stats and ethtool
strings are consisten, instead define a new struct which will hold the
stat string and his index within the hw_stats struct.
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Quoted strings should not be split to help text grep in the source.
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This change fixes all the lines that get over 80 characters.
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit replaces all the unsigned definitions in favour of 'unsigned
int' which is preferred.
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Fix the following comilation error by making sure that "phy_ring_head" is
defined as "dma_addr_t" and change "phy_ring_tail" to match it as both
should be "dma_addr_t".
error: passing argument 3 of ‘dma_alloc_coherent’ from incompatible pointer type
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Reviewed-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mtk_phy_link_adjust takes a spinlock and disables
interrupts, but never unlocks.
This can leave interrupts disabled on one CPU and
various things stop working.
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This fixes the following sparse warning:
drivers/staging/mt7621-eth/ethtool.c:213:6: warning: symbol
'mtk_set_ethtool_ops' was not declared. Should it be static?
Signed-off-by: Chris Coffey <cmc@babblebit.net>
Reviewed-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Trivial fix to spelling mistake in dev_err message text
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In case of error, the function devm_ioremap_resource() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Fixes: f079b64063 ("staging: mt7621-eth: add gigabit switch driver (GSW)")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In case of error, the function of_phy_connect() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.
Fixes: e3cbf478f8 ("staging: mt7621-eth: add the drivers core files")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In case of error, the function devm_ioremap_resource() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Fixes: e3cbf478f8 ("staging: mt7621-eth: add the drivers core files")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch adds the Makefile and Kconfig required to make the driver build.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add support for SoCs from the mt7621 family. These all have 2 GMAC ports,
both of which are attached to the same internal 1000MBit switch. Currently
we only support GMAC1 as the sole CPU port. MT7621 is very similar to
MT7620 with only a few registers having different offsets. MT7621 is the
first SoC to have the new QDMA engine builtin. The older PDMA engine is
also present. unfortunatley, to get the best performance we need to run RX
on PDMA and TX on QDMA. This SoC is also the first to have TX vlan
offloading and TSO6 support.
NeilBrown: the driver didn't work when I tested, so I changed it
to match known-working code as much as possible. This included
converting to the PDMA engine for TX.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
NeilBrown: this patch originally contained soc-mt7620.c
but as I cannot test that, I removed it. Some functions
from mdio-mt7620.c are needed for soc-mt7621.c support
- fixed mt7620_has_carrier() to read correct register.
Original comment:
Add support for SoCs from the mt7620 family. These all have one dedicated
external gbit port and a builtin 5 port 100mbit switch. Additionally one
of the 5 switch ports can be changed to become an additional gbit port
that we can attach a phy to. MT7620 was the first SoC released after
Ralink was acquired by MTK and has seen a lot of changes to the core.
With MT7620 we have seen the addition of some advanced features such as
TX vlan offloading, RX scatter gather and TSO. Newer MTK SoCs are based on
this design.
Although the builtin MT7530 is gbit capable, the builtin PHYs are only
100mbit. There are boards in the wild that use one of the gbit MACs to
attach an external MT7530. For this to work a few hacks need to be applied
to reorganize the MDIO address mappings and autopolling for the SoC to
correctly work with the external switch. This is however not part of the
series and will be part of a later series once we evaluated if we want to
use DSA or switchdev.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The GSW is found in all of the 1000mbit SoCs. it has 5 external ports,
1-2 cpu ports and 1 further port that the internal HW offloading engine
connects to. The switch core used is a MT7530, which also exists as a
standalone chip. Although these SoCs (mt7620/1/3) share the same switch
core, the bring up of these is slightly different. One of the reasons is
that on mt7620 the switch core is mmio mapped while MT7621/3 talks to the
switch via MDIO addr 0x1f. Additionally, the SoCs have different MAC types
and some of them have TRGMII support. MT7621 can do 1,2gbit and MT7623 is
able to do 2,6gbit. The support for the TRGMII bring up is not part of this
series as the code is based on the SDK driver and has between 1500 and 2000
magic values that still need to be converted to defines.
Because of these differences we have 3 separate drivers for these 3 SoCs.
These drivers are very basic and only provides basic init and irq support.
The SoC and switch core both have support for a special tag making DSA
support possible.
NeilBrown:
- added setting to mt7621_hw_init to match working code from libreCMC
This needs to be converted to use switchdev.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Original comment:
This patch adds the main chunk of the driver. The ethernet core is used in
all of the Mediatek/Ralink Wireless SoCs. Over the years we have seen
various changes to
* the register layout
* the type of ports (single/dual gbit, internal FE/Gbit switch)
* dma engine (PDMA/QDMA)
and new offloading features were added, such as
* checksum
* VLAN TX/RX
* TSO
* LRO
The core functionality has however remained the same allowing us to use
the same code for all SoCs.
The abstraction for the various SoCs uses the typical ops struct pattern
which allows us to extend or override the core functionality depending on
which SoC we are on. The code to bring up the switches and external ports
has also been split into separate files.
There are 2 types of DMA engine, PDMA and the newer QDMA. PDMA uses a
typical ring buffer while QDMA uses a linked list. Unfortunatley we have
the MT7621 which has a few silicon issues. Due to these issues we need to
PDMA for RX and QDMA for TX. All SoCs newer than the MT7621 can can run on
QDMA exclusively.
Most of the SoCs have a switch frontend. Older silicon has a so called ESW
(Ethernet Switch) while newer cores have a GSW (Gigabit switch).
Additionally there is a MDIO bus that can be used to talk to PHYs. In these
cases one switch port get changed into a normal MAC port.
Some SoCs have a dual MAC, we currently only support this on MT7623.
NeilBrown:
- removed everything not closely related to mt7621, as that is all I
can test
- converted ethtool.c to new ethtool_link_ksettings interfaces.
Doesn't work yet.
- updated some phydev interface use: e.g. dev_name() -> phydev_name()
- updated mdio to use mdiobus_get_phy()
- added some missing export_symbols
- updated get_stats64 interface
- TX_DMA_FPORT and TX_DMA_TSO to tx dma descriptor
- range checked RX_DMA_FPORT in rx dma descriptor
- tell hardware what mac address was chosen
- fixed MT7620_GDMA1_FWD_CFG which was using wrong value
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add possible dt binding for mediatek gigabit switches.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Michael Lee <igvtee@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Kamal Heib