There is no phy driver that works on the Rockchip board for either USB
host port yet. For now just hardcode the vbus signal to be on all the
time which makes both the dwc2 host and the EHCI port work.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Working on sound support I noticed the Apalis T30 Evaluation board
device tree missing the more generic Apalis T30 compatible string.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Indentation of the clock property used a hodgepodge of tabs and spaces.
Make them more consistent (tabs for indentation followed by spaces for
alignment).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The GPIO pin connected to card detect was inverted twice: once by
the argument to the GPIO line itself where it was magically marked
as active low by the flag GPIO_ACTIVE_LOW (0x01) in the third cell,
and also marked active low AGAIN by explicitly stating
"cd-inverted" (a deprecated method).
After commit 78f87df2b4
"mmc: mmci: Use the common mmc DT parser" this results in the
line being inverted twice so it was effectively uninverted, while
the old code would not have this effect, instead disregarding the
flag on the GPIO line altogether, which is a bug. I admit the
semantics may be unclear but inverting twice is as good a
definition as any on how this should work.
So fix up the buggy device tree. Use proper #includes so the DTS
is clear and readable.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow timer devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
This is in keeping with the approach taken for enabling
SCI (serial) devices using DT on these SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0F5NAAoJENfPZGlqN0++pqQQALBHNi4LifnNxPnR7Wz+DR0s
eu4ebk4wGFwfm9neWp0bnPqsFseEH7SIgysJosld1wb1aZ7Ax0VJq1xVLPv6ptul
aVUWFzMLjcgevyMnHrGD2YWN1g/PQAXssPLXA8J59I4oo82iC6223tpu3UcOTRkA
zPNU8GhVqjAr5K5Tb1REOEQyQHWuOsR3bhoUMbM6/EfE38iSsl1rFvtrMao2VrAr
3GLxFDCWXPvocmmgYiQtRrPbFvt9jwd/YPOCXUrE/5ra76VHcXynA/VUNqzKvHCc
RFDQ/toDT2R02JTrJVrL55TTLRJAbY+mBdHk8S5Ze7G5ahdD5pVYt6cJVNouskm1
e5Q2ovrZPfH2CSvd+E4/X6IDqxBi82ITm5egoLohP/s1QDu5oaGi1bFBKqBNpo6Y
tSoKIqdKwKA5WiJu3vPRQZmU823IXZbCxLpEcrzVGKqOQcOxcETQ0DOMDDWmpmpV
ws/WLmNba7hqZgz4WsW+GuvUF3G2SVBl7i9OSY9RtM8rqepdCY3u+jmHFya7Bs4v
0EwnPSolGlESgNcq0krJtuJRlrBpTr3Gn6yuy1FTBlH50fpBUzOPTTdlLxUbpaTw
S3Og+0lhDYDJkqMHMfaNFv15nc6Yjhozxu3PFI9ZDlUH4Us6Rh3YvyADl6Z2iRWc
rgfEaJ+bjfHGkgU7yqhw
=8vte
-----END PGP SIGNATURE-----
Merge tag 'renesas-clock3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.17" from Simon
Horman:
Third Round of Renesas ARM Based SoC Clock Updates for v3.17
* Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow timer devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
This is in keeping with the approach taken for enabling
SCI (serial) devices using DT on these SoCs.
* tag 'renesas-clock3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: add CMT1 clock support for DT
ARM: shmobile: r8a7740: add CMT1 clock support for DT
ARM: shmobile: r8a73a4: add CMT1 clock support for DT
ARM: shmobile: r8a7740: add TMU clock support for DT
ARM: shmobile: r8a7778: add TMU clock support for DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Exynos has buggy firmware that puts bad data into the memory node. Commit
1c2f87c2 (ARM: Get rid of meminfo) exposed the bug by dropping the artificial
upper bound on the number of memory banks that can be added. Exynos fails to
boot after that commit. This branch fixes it by splitting the early DT parse
function and inserting a fixup hook. Exynos uses the hook to correct the DT
before parsing memory regions.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT2HI1AAoJEMWQL496c2LNvfAP/ifY6foyrO2MHGxlGdghL3Xe
fHY+MxoywBqWwLuXjfSh0rIt/5KE80JvtTjnssSOHOZokOPa/O3N39SrQPaLRqW8
1XC5A/Qocokeii69iXgXn0aQChBhyrRW708q9iU43ucKwcmWNvrzgdq838XdVB3q
BGHeV9ADn57PHAitsOrDCJei//jgs94NXDKPmCwrTn62aiedeiiMAWYUfsPXFtsn
gloL8wT8gcD8ojaSvKWpGJtUbkFBNe1DVQgsmIfG0hNUuolpsbNZo688OoWJUCaj
0qQ2LqHD2djDMqxxj0xFxOx7GoQPZjAG9NlLkca3QG5dc1S+Bf//g11uxRAHQ2qD
3l24i825fp4kGL1NUfR+OK4PIqGwBbEnXoIgrWnVjQxw/adMlH3iWFfuZqe/fBIq
4CTe9buc+JGCdJUAp+DS3YRYtFPdlovgaJjCAAwKWEd4GpjLEKrGGL/dAkhyRP/j
77byHy8XgSB5moh7qiR0u1M3lyRmU54f5EdDimPGaMUJ2PSzSxuYZk41hRRrstVn
JCzDmblvTF4wai3t4Z+laUP0dAym/gwX/87UiRsO+hyXKGiVCq9AmDkueL2xLUuV
c8rqjXLcVZ5qicLP2uCtWpz96WVzTCa3CzcMufT7t6cErMLueSSARrxq2RrETsFo
SpeBf3cc90Edv8LP7V9W
=lmyQ
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux
Pull Exynos platform DT fix from Grant Likely:
"Device tree Exynos bug fix for v3.16-rc7
This bug fix has been brewing for a while. I hate sending it to you
so late, but I only got confirmation that it solves the problem this
past weekend. The diff looks big for a bug fix, but the majority of
it is only executed in the Exynos quirk case. Unfortunately it
required splitting early_init_dt_scan() in two and adding quirk
handling in the middle of it on ARM.
Exynos has buggy firmware that puts bad data into the memory node.
Commit 1c2f87c225 ("ARM: Get rid of meminfo") exposed the bug by
dropping the artificial upper bound on the number of memory banks that
can be added. Exynos fails to boot after that commit. This branch
fixes it by splitting the early DT parse function and inserting a
fixup hook. Exynos uses the hook to correct the DT before parsing
memory regions"
* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux:
arm: Add devicetree fixup machine function
of: Add memory limiting function for flattened devicetrees
of: Split early_init_dt_scan into two parts
often during boot with Ubuntu 14.04 PV guests.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQEcBAABAgAGBQJT2PhgAAoJEFxbo/MsZsTRlzIH/1HjbkGZmRlOj5wcrYlWCUJ/
DGLBHc76so52xd9oP8COT5tuSVP6/usPPLFaOmVZ7fMiOpoyz9d3lc0g56otw3gJ
tTUFTyW0EoFtvmIl50OMC726p9azETjA3P2XJkV/D3GhBGGqgrP5uR+mRvisvq3y
eGZEx1UIHv1jov47TBFR1NcckXBWw+6J9m34y9h6an9VNDCuuGwYZ8dfGAFsLrVb
lGLTmgQQmyk4SexVINfOwL40KkVDVEq+X74HcPviyNHEIy66xLzMtKpL+Sf4xeuv
VG3JhqAUGuRGGK48rrbpxhBbpxGp35O9RV68YrGssxfuTejSYduw5zTzzt30QIA=
=cr8X
-----END PGP SIGNATURE-----
Merge tag 'stable/for-linus-3.16-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull Xen fix from David Vrabel:
"Fix BUG when trying to expand the grant table. This seems to occur
often during boot with Ubuntu 14.04 PV guests"
* tag 'stable/for-linus-3.16-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
x86/xen: safely map and unmap grant frames when in atomic context
arch_gnttab_map_frames() and arch_gnttab_unmap_frames() are called in
atomic context but were calling alloc_vm_area() which might sleep.
Also, if a driver attempts to allocate a grant ref from an interrupt
and the table needs expanding, then the CPU may already by in lazy MMU
mode and apply_to_page_range() will BUG when it tries to re-enable
lazy MMU mode.
These two functions are only used in PV guests.
Introduce arch_gnttab_init() to allocates the virtual address space in
advance.
Avoid the use of apply_to_page_range() by using saving and using the
array of PTE addresses from the alloc_vm_area() call (which ensures
that the required page tables are pre-allocated).
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Commit 1c2f87c225
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invalid memory
information and rely on the kernel to not parse this data. This is a
bug in the bootloader but we still need to work around this.
Work around this by introducing a dt_fixup function. This function
gets called before the flattened devicetree is scanned for memory
and the like. In this fixup function for exynos, limit the maximum
number of memory regions in the devicetree.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Tested-by: Andreas Färber <afaerber@suse.de>
[glikely: Added a comment and fixed up function name]
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This patch add missing pinctrl for uart0/1 for Exynos3250. The gpio pin (
uart0_data, uart0_fctl, uart1_data) is only used for UART IP.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes duplicat 'interrupt-parent' property for Exynos3250
because exynos3250.dtsi already defined 'interrupt-parent' property
as following:
In arch/arm/boot/dts/exynos3250.dtsi:
compatible = "samsung,exynos3250";
interrupt-parent = <&gic>;
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add TMU (Thermal Management Unit) dt node to monitor the high
temperature for Exynos3250.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The IRQB interrupt pin of MAX77686 PMIC is connected to GPX3[2] pin of
Exynos5250 on the Exynos5250 SMDK board. Specify this connection using
interrupts property for the max77686 pmic node.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an Atmel maXTouch instead.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an s5m8767 instead.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The platforms selecting NEED_MACH_MEMORY_H defined the start address of
their physical memory in the respective <mach/memory.h>. With
ARM_PATCH_PHYS_VIRT=y (which is quite common today) this is useless
though because the definition isn't used but determined dynamically.
So remove the definitions from all <mach/memory.h> and provide the
Kconfig symbol PHYS_OFFSET with the respective defaults in case
ARM_PATCH_PHYS_VIRT isn't enabled.
This allows to drop the dependency of PHYS_OFFSET on !NEED_MACH_MEMORY_H
which prevents compiling an integrator nommu-kernel.
(CONFIG_PAGE_OFFSET which has "default PHYS_OFFSET if !MMU" expanded to
"0x" because CONFIG_PHYS_OFFSET doesn't exist as INTEGRATOR selects
NEED_MACH_MEMORY_H.)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A nice small set of bug fixes for arm-soc:
- two incorrect register addresses in DT files on shmobile and hisilicon
- one revert for a regression on omap
- one bug fix for a newly introduced pin controller binding
- one regression fix for the memory controller on omap
- one patch to avoid a harmless WARN_ON
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAU9fDBmCrR//JCVInAQIxCw/+IadEDDeP4WZHO0Bx9vm7Oj8XYlDg4xU8
O+SvqmJ3qDFNxbG7LEZ9B0dqcAaxkYPgF0LEy29uneQn+oKXykzRwhmXilB3akJR
Y/B3y7FJKch9dBZf+Kx+94NgHt1IdcaArWdSKBLgMN5/IZzRY3B8fo3AEjnHjt2P
c0kXasLOQ97aGiFobNHp5GLrR2uUjplzWjMDA7F9i6PQZ1grmDGJ2w67bZ8Uukwh
p2xYOmgHdyVRweFHrHlISNGWov8TPfGJpItM665ROMxJ+wREJ4rHp/VOA/74OMGf
heOEsUUhZOjEvNza8U4TCVroAqA26OCth8sd1mOOe+INPkt1IDAPK4zF0bxHt2it
PuxAVH43fyQ0oPerB9BfAwJOr+aSIQNYJRVpEDbwBU0d0/N/lERixPZxsmSDY4ES
cwzu9FTY2+tYfzS3WW/0fGDtIXXlEbcXnfxc3sSzjErV71GAq1UICxrBrUL5KoGY
YyBh4Ly6V6WzLC0dkRnYe+gEKIWn+SA95JGaYMYigQdIJHGKf7DoChWkDeWmrYwQ
cl34GZ5k79L6c2Az2YoON2R2vwByhP5kSZ5z6sNuyL0Z2TbRUeDw4qkjQcxFvfN0
NLqMidJhFZyKTjJtc0ttB+ah9kyZy+kyKoyKbIMDCk5zYTLAgh0PF85G0IJEEUU5
+qwzQP/ROjQ=
=Ny58
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"A nice small set of bug fixes for arm-soc:
- two incorrect register addresses in DT files on shmobile and hisilicon
- one revert for a regression on omap
- one bug fix for a newly introduced pin controller binding
- one regression fix for the memory controller on omap
- one patch to avoid a harmless WARN_ON"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: Revert enabling of twl configuration for n900
ARM: dts: fix L2 address in Hi3620
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: shmobile: r8a7791: Fix SD2CKCR register address
ARM: OMAP2+: l2c: squelch warning dump on power control setting
broken legacy code for omap1 and move things towards
device tree.
These patches were posted a while back, but I did not
realize I was supposed to merge the driver related
parts too. So apologies for a late pull request on
these changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT13u+AAoJEBvUPslcq6VzxQ0QAOTLTa3BnHEOi3IW4SDu+BE8
d5fl1VSK2VS+4hUwBz5keiRwqpo8wgJFry81JhaDsSqBhIA9dZhbhayP08p2JLtH
D4r0SpVYdLsXy35OwpmCl1+e3mko4R7AawXXcGmHJ16Ueb2I/eLiI9RSMBoDULVG
4XzzxJmicgHZoTPmpmYS6wMq0oD1KqERDHY5E2JfVLVTvzN0knkD3ezmuq9ObfRY
9JNWC4+1odHkPu714eng/oHsTJPp2bCKW7Ek8wzxBCEKd1lHVT9SSHvxOQnOR8lg
r7XEgBuuhaFC31a5ES3HFBVv7STAOIhlhm1hg3j/swuNjZOHOwSnRGYdlwR+U6Po
l0d4I9LL4LCS8zCn/+RWCffZQ0IC9IOoBJnO95a5peJJ+vbBJZ8yR1T+HUrFbpXU
6gEWI6JEL/+bZAfVnjqRrEYq2a4E3Zp5eAbyggUsI/EgNxQtbMejj0TGJLDFaugI
P1/ON/AXNqROl4JJd4UjMNNxNm2eIUJ0yQVflzUgC751SKj6DWSxXzmynAAOTQyi
omI174C6bGIwz2qUpAmMqvGYkd4yzgaI7LzsKvsrJl0SoMjE4ka+IVx+NX+p6bqI
z662ro6NPkUPaS9AVvRlrMo2Io0+b6InbROxeSmJAeRTYmeZGibZj4x9QecVF8dp
JBZcpoqLZZf2SqWykURG
=ZyPG
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "late omap mailbox clean-up, driver parts" from Tony Lindgren:
Driver specific omap mailbox cleanup. Mostly to remove
broken legacy code for omap1 and move things towards
device tree.
These patches were posted a while back, but I did not
realize I was supposed to merge the driver related
parts too. So apologies for a late pull request on
these changes.
* tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mailbox/omap: add a parent structure for every IP instance
mailbox/omap: remove the private mailbox structure
mailbox/omap: consolidate OMAP mailbox driver
mailbox/omap: simplify the fifo assignment by using macros
mailbox/omap: remove omap_mbox_type_t from mailbox ops
mailbox/omap: remove OMAP1 mailbox driver
mailbox/omap: use devm_* interfaces
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On LPAE, each level 1 (pgd) page table entry maps 1GiB, and the level 2
(pmd) entries map 2MiB.
When the identity mapping is created on LPAE, the pgd pointers are copied
from the swapper_pg_dir. If we find that we need to modify the contents
of a pmd, we allocate a new empty pmd table and insert it into the
appropriate 1GB slot, before then filling it with the identity mapping.
However, if the 1GB slot covers the kernel lowmem mappings, we obliterate
those mappings.
When replacing a PMD, first copy the old PMD contents to the new PMD, so
that we preserve the existing mappings, particularly the mappings of the
kernel itself.
[rewrote commit message and added code comment -- rmk]
Fixes: ae2de10173 ("ARM: LPAE: Add identity mapping support for the 3-level page table format")
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT11p5AAoJEBvUPslcq6VzbEgQALyzdS0E48KFwfZZP2cafcRi
AtcOAenJiHLyPEt2ja4rx6op0lglxmMgniqVJCTujt7aNLxv6QoYLAgTIXvz3ZRp
3PyG7trH8aZ6DJXlVA9oxuyQ2n+WKWWo1A10V33IDC14VZVPwdtNr/cBO9VVy6n/
MvWEdZU9rUKgAkVgCCV1YfaodHY9jW6Nxdpbb8vvEWJWaLg4UB7GcRRkZhH0ZVDJ
dzv9kBNJKN9lV8Nb2QFQD8dL/PmUvdjw7Uj3XLTsXPLbiMcBGvd842zgu0RsGJMj
ns6VET8nZNdsOf0ap14lcYyMxjf0xD8cv851fK2ug3x7H4/WC2tDdHJNj26jk0cS
k9iyp+gO47hiSXBdmvHUO77fUoNCqn7qMM9L8i0F+3gKjZWFfUMOBnajDJ7rfsTM
pEVD1SAHmFnYJhjHqNF8sETNfhGxTU2A5VrUBXC62Wchu9bLIQHZnDDv1l7EoOAB
STewWGzltoLVoP+DDJPaTMW/atA7lEGmsOT8Abn27X2dOYns8/wwVmcq1RE87zwj
mT1efgy4iMYvZRUD2rsTG6xTFH/E0IOpu7uKbhIzXlPtzCXZx9tzLMIF998ePipC
ESNMoZth5qx0Rd6zwvYgKLE0N31HM91s/zII13s79BywkjY05W78rExBk1upkniD
zro4uxaG9tofeYULdYpM
=5XAH
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap n900 regression fix for v3.16 rc series" from Tony Lindgren:
Minimal regression fix for n900 display that got broken with
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
* tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Revert enabling of twl configuration for n900
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0lK2AAoJEMePsQ0LvSpLUkEQAKpqkh9UYUixXBaeIQnoFcwH
uW7/cjYPfTY1ogFgMaFJN14cTmat+Xm97Es8hgEIZYyY5OmRNYqcdBXmfQ5Mls8b
mtxZu9FAPRfFZkfNst7Y1i969GoyTnOyOG3Ea7PlAzQacnjq7HVACLMKIDEOmGhG
rzDSj1eFaJWTUdY0yGFQAkwd5LvuNIfuXIwQ9DlHm84/tpKEpi32tmRJBPzLaKz1
Cu88ZiW1pfMR8BRw247wlJ9v2DJmhnrluhKhM6UFGJR6X31kw/s7wqbTi3+yNXqL
BToTQs1xVwMnnOAntM7sc39UFg3pgZBqWFemQCHtshGqhgo1MJ8nznIvxyPXAcAp
cLHMxMdBbs4Ds9vbJKTNVzntoam8PGO8mff0wMePqAPAuE/m/JMxBTPc5vZijI7f
SmjirUEhK47BEtUBRQNTVX/B1ABvmodaU93ous8gbKagjH358DkrIlCwP2rerJWc
eg9UxYNNRvK0iUsjl19vfr/qfT7vXnkp3YGfkJlR22KBJOQd1+M3X/NIBrU0fV2e
00H9O2YdScBGzFMLvbnT0LkH4/VgilR3667Kx6LkK/r62LrG1z296kTpnfwLtivH
1jfmhMyt1MfgOylPx/5Dh39xKqUqKeUVoBCFUr/45y3nFbEFZkILiNEuPzRNFUPK
AgSz5lyNGFfd4mb144hM
=fXvM
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-clock-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
Modify OMAP PLL rate rounding function to round to the exact rate requested
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
If init_mm.brk is not section aligned, the LPAE fixup code will miss
updating the final PMD. Fix this by aligning map_end.
Fixes: a77e0c7b27 ("ARM: mm: Recreate kernel mappings in early_paging_init()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The fields are not used by the driver and will be removed from platform
data. Don't set them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
There are no existing users for OMAP1 mailbox driver
in kernel. Commit ab6f775 "Removing dead OMAP_DSP"
has cleaned up all the dead code related to the only
possible user, including the creation of the mailbox
platform device.
Remove this stale driver so that the OMAP mailbox
driver can be simplified and streamlined better for
converting to mailbox framework.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 9188883fd6 (ARM: dts: Enable twl4030 off-idle configuration
for selected omaps) allowed n900 to cut off core voltages during
off-idle. This however caused a regression where twl regulator
vaux1 was not getting enabled for the LCD panel as we are not
requesting it for the panel.
Turns out quite a few devices on n900 are using vaux1, and we need
to either stop idling it, or add proper regulator_get calls for all
users. But until we have a proper solution implemented and tested,
let's just disable the twl off-idle configuration for now for n900.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Fixes: 9188883fd6 (ARM: dts: Enable twl4030 off-idle configuration for selected omaps)
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DMA engine is enabled for all DTs that derive from zynq-7000.dtsi.
There is no need to override the 'status' property in board DTs.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Exynos initialisation code now relies on obtaining the PMU address via
DT, so add the exynos5260 PMU compatible string to DT match table.
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so add the new 5410 value to the list of compatible string matches.
This unbreaks booting on 5410 based boards.
Fixes: fce9e5bb25 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so prepare a PMU node for Exynos5410.
Fixes: fce9e5bb25 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull ARM AES crypto fixes from Herbert Xu:
"This push fixes a regression on ARM where odd-sized blocks supplied to
AES may cause crashes"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: arm-aes - fix encryption of unaligned data
crypto: arm64-aes - fix encryption of unaligned data
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- BCM Mobile SMP support
- BRCM STB platform support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT1mChAAoJEOfTILNwq7R4DDYQAJudlSqjwerAjQZwcdoe/xmP
74LjnWeCU3l1PhvtTynjPz3YWp+6VsHPDiHwJ00/ZTotCaa3Nl+zs5EbKs4aDeIb
R6YvvIJ4bmAaStmiWV32gM9UzC+4VGV8RsI8zbsbLFLhh6ChMYs47xTyLFeXd9Ks
999CW2T+TIQmvJHhD9hmpVFf6s+TWeDpS1VKagPeZAz1tTB7XTqKItQNalrobi+b
j4ak0Qsg/cYKjjG48320I2LuuXvUBZuW1nGLJ6sR90MKj1fWvUnwlJGv0Fyze1eF
B1mTBD5OznZyCOJqOUA8zXxesDFoCcPSjq4rrBgCBYu8KLTCeC7ZXUPiuYLihs1B
I64y7JzQThTqJghORgOb9oRq+DRHmO2hN6Ssfh41uJIJk9T6tssG3/qcwW6sdJPR
r64VknaQR3yyWTOWsCpWQwjY0VgTUvtH5WjVAnnx/MZzp/P8JDDYftYh4TPXnIu+
fhHPl6P1NoFm4hV6cYUNd1dT+tDACJDVOBytxRqgJ6BpcCOyPbe8aODDHES1ZOT7
XVTO0NSrO2ywbDb7JA/OteEHy1Ql7BL85Dx0+AK3WCsgOrZ7YjoODo2/5qr+I8p0
0hyYP+NZNljCrnXy0j4F1DNjJq1saVp1LS03ye9RqclsAdjqsrze9cmupZLNAj5o
qzDzm8AMGqRYBrM2gVfJ
=lUq9
-----END PGP SIGNATURE-----
Merge tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc
Merge "ARM: mach-bcm: soc updates for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm:
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- BCM Mobile SMP support
- BRCM STB platform support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT1mIQAAoJEOfTILNwq7R4E9EQALNeAA80eWRF+xtGp7heShrt
lxm1gT8JUyCIG6GvCiYy5QvNpSaxaLqWpsSHdmxETfUHzexvICUJUECNmxUR49RX
9TScOu3P0lfQrd6+ZoAZdqTeiOv4nbQjdTrioIPvnjNKP/pk3FJy43ExkPaElDqG
792hrsPcKJ2Qet2Eu73Xx2LtEgarWoR9MDV/Yr1eI1CoKDiVobOCTeQlv+AtwEnW
Mj+DBRdMKykLvB5aS1fN1lRP+AOEibgn6mWyQExT1+8uVrqX5zjiuqtrxLqwgMep
9UFk1gUu4u/ao9CELi/thwBHm0BYt43y4h/mA9KspgOxE+eOoBXEruyxEb1s/hVU
nqF59FNfIJNVKA1dgOrYmph3xMTEMeenkf/EHBoXEsLOQRW84PIpHUYbsrj7akr2
aUte0nL7dWYXgcT+V6pn2IADWXGkp4AzAr1i8nAApHifDJmQ65a+ph7Y/J1s6eag
SWLdHLWQLcSS/YPHHyXWKSCwf3vHEx3GNfeoXqqpYgSLlfWifSXQpJc+Pi0hQrvv
12qmQkWmEc/wEDuJeOFmUedG1ZDW2ID03cCh10G2alkUCvn9i2STtfjV7Z7MkDtz
DbJCGoLfsQA92Zc0U5zHnuG7jDs+eCtODeKCpsrSuOoqOKUIze6gOStAfclC17sk
yigSWSFaOFhb6udn8dP5
=ZOoN
-----END PGP SIGNATURE-----
Merge tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm into next/dt
Merge "ARM: mach-bcm: dt updatees for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
ARM: brcmstb: add misc. DT bindings for brcmstb
ARM: brcmstb: add CPU binding for Broadcom Brahma15
ARM: dts: enable SMP support for bcm21664
ARM: dts: enable SMP support for bcm28155
devicetree: bindings: document Broadcom CPU enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc6' into next/dt
Update to Linux 3.16-rc6 as a dependency for the broadcom changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT1l8ZAAoJEP45WPkGe8ZnoEAP/1tuwu6stZaEQSEEtI6TB5QP
RIjW19sMHcxNsH2s5uCXnG/Zrijkv+iPVizzx7uHs8upjvyo0Q4kPX3NYq4hQFMT
AriVnTHTVZ0ostX2IjflWWdikPwUi+a6yYmlZs2pUvUO/mrvuoMCDKNm4ry2zPZs
T4bXaKvHy+Y7LtqIQLTarr3oqkVi5N0zu+lVz7YMOj6plFrt+Q2ek0XiqJIjcR/+
59TozGocVQzS3p8zj2CJdHyqAdsId+mLQHsuLyMSHwQMADZsFtlmk71gFTlSrjdh
IL5IJbGaWXLVVelNo66T77a3bg3zpKetcA+4qwzIZjYQaZv9Et+old/dBUiAoumn
Vbo+QvqjumJRmFCY8ja3UNxKAjtPzdStZiomf2lCkJwEnxiFFwV2PCIxf9HkKGqC
tKU0vKG3fhmw1oOqkxRHNlNNtH8w+yfcAp1BDH6dnEUr3Og+vfZJeth+a6zDScaI
EBtTcBxHyfz9TmHw2SrUc8gjhEM0UkpE9UThukjy/futXxqlBn9BbgON9+s2IpqH
65s4I3ddtHcvO/ZamGC2IhHBmoorhdZ1HTYC2bkiq5IMrvkWEHWQpCZJlkEXfeLa
JxzFqU4i+W5824krYcYd2E46APE5CUT8d/tcuPog+LPy8B+T4Br2vhEzZ4bE9nTz
4VkOqw8kkJpAB3cIzXDy
=Ixkt
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 4)" from Jason Cooper"
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
* tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add dts definition for Lenovo Iomega ix4-300d NAS
of: Add Lenovo Group Ltd. to the vendor-prefixes list.
ARM: dts: dove: add DT LCD controllers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Fix the same alignment bug as in arm64 - we need to pass residue
unprocessed bytes as the last argument to blkcipher_walk_done.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org # 3.13+
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
This feature is controlled with a distinct config option such that
an SMP-enabled multi-v7 binary can be configured to run these SoCs
in uniprocessor mode. Since this SMP functionality is used for
multiple Broadcom mobile chip families the config option is called
ARCH_BCM_MOBILE_SMP (for lack of a better name).
On SoCs of this type, the secondary core is not held in reset on
power-on. Instead it loops in a ROM-based holding pen. To release
it, one must write into a special register a jump address whose
low-order bits have been replaced with a secondary core's id, then
trigger an event with SEV. On receipt of an event, the ROM code
will examine the register's contents, and if the low-order bits
match its cpu id, it will clear them and write the value back to the
register just prior to jumping to the address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
In preparation to make the check_extension function available to VM scope
we add a struct kvm * argument to the function header and rename the function
accordingly. It will still be called from the /dev/kvm fd, but with a NULL
argument for struct kvm *.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
- convert to new clock driver
- bring structure in line with recent rk3288 comments
(no soc-nodes, using phandles when adding changes, sorted by address)
- i2c, board-pmic and pwm nodes nodes
- sd card slot and ir receiver on radxa rock
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJT1jA+AAoJEPOmecmc0R2BjLUH/0tqosFsfksVGJY+MX7+foRh
KClPetsBuktT+XbOxg9LkLE8MbBvEMbtMzQDoeUk4sRyBdbX5Je+EYkF4V97KkDv
zSAAfHCXOoPPVJpuxHoVQO/sCRG38oKUhtngTPzY70Lw3Gax8R0bAPRcG8c3R++C
Tep4q8TBkRenSnHBf94rk6kiyfs0ktUAroW4oWVWICPAGpKGpQU9kUpw91QmONe1
RdqUCW3g1yKHXj3n0DYjZmouIwrc/5fybMFH0tgy/PXeGFv02kZz+3ZkBTrWr/uz
yy9hhrIKrBvRbpz0WP5b6Ij5INQBDUSx3/rU2zGnWl2DRZl7YTPAMwXAUJCPLKs=
=wLux
-----END PGP SIGNATURE-----
Merge tag 'v3.17-rockchip-rk3xxx-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: dts: changes for existing rockchip boards" from Heiko Stuebner:
Collected changes for existing Rockchip boards
- convert to new clock driver
- bring structure in line with recent rk3288 comments
(no soc-nodes, using phandles when adding changes, sorted by address)
- i2c, board-pmic and pwm nodes nodes
- sd card slot and ir receiver on radxa rock
* tag 'v3.17-rockchip-rk3xxx-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rk3188-radxarock: add GPIO IR receiver node
ARM: dts: rockchip: add pwm nodes
ARM: dts: rockchip: add both clocks to uart nodes
ARM: dts: rk3188-radxarock: enable sd-card slot
ARM: dts: add i2c and regulator nodes to rk3188-radxarock
ARM: dts: rockchip: add tps65910 regulator for bqcurie2
ARM: dts: add rk3066 and rk3188 i2c device nodes and pinctrl settings
ARM: dts: rockchip: oder nodes by register address
ARM: dts: rockchip: remove address from pinctrl nodes
ARM: dts: uses handles to reference nodes for changes
ARM: dts: rockchip: add handles for shared nodes that don't have one yet
ARM: dts: rockchip: remove soc subnodes
arm: dts: rockchip: remove obsolete clock gate definitions
ARM: dts: rockchip: move oscillator input clock into main dtsi
ARM: dts: rockchip: add cru nodes and update device clocks to use it
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In some cases it is desired to move a channel to a specific event queue.
Such a use case is audio, where it is preferred that it is served with
highest priority compared to other DMA clients.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Use the lowest priority queue as default for clients.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
As per example from the regulator subsystem: put all defines and
functions related to registering board info for GPIO descriptors
into a separate <linux/gpio/machine.h> header.
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree node for the infrared receiver connected to a
GPIO pin on the Radxa Rock.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Modified to use the new clock defines and added rk3066 pins.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use the newly ammended dw_8250 clock binding to define both the baudclk as
well as the pclk supplying the ip.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables the 2nd i2c bus and adds the act8846 pmic as device.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Curie2 uses a tps659102 as its main pmic, so add the i2c1 and tps65910
node as well as define the used voltages and regulator-names according to
the schematics.
Also fix the supply of the sd0 regulator, as it is supplied by the vio reg.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pincontroller uses the GRF and PMU syscons nowadays, so should not
contain an address in its device node.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some nodes that are changed in the dtsi hierarchy do not have handles yet.
As it was suggested in the rk3288 submission to do subsequent nodes changes
through such handle-references, add the missing ones.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.
So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The clock and reset unit is now provided by the rk3188-cru clock driver and thus
the old style definitions of the gate clocks can go away.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
The clock definitions get a lot shorter due to the soc clocks being handled by
rk3188-cru and only the input clock remains. These can now simply live
in the main rk3xxx.dtsi without affecting readability.
At the same time, rename the node to oscillator, adding a clock-output-names
property to match how the rk3288 handles this.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and
also updates the device nodes retrieve their clocks from there, instead of
the previous gate clock nodes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
- Armada XP
- Fix return value check in pmsu code
- Document URLs for new public datasheets (Thanks, Marvell & free-electrons!)
- Armada 370/38x
- Add cpuidle support
- mvebu
- Fix build when no platforms are selected
- Update EBU SoC status in docs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT0kjkAAoJEP45WPkGe8ZnqpsQALFvbZKqBmvm+dj4G/dB9YYg
ihJM1FasU5yrHWhQlUSJw3Lntf/WwK2Qbrq3NmeCNo9qxx5r3IOv8inLah+XsXWv
C4RyiqmbnbiUg24QwHHGHLnRZuKCZdciiCyVmDO5DxRiT7Ov7EffOiiEws1WIUU1
6os30LEp82UpfcUkevJi12AkQvgTcX8tQXN2Kc7TgbxzJcyOt9M03BUej9gDdqD3
XfeBZv/WTapZllifRF04zsVJUtPKx48BmR0KdInYlsRfjg7knbYb1qkC7iysPJvv
G2XPWYOTVC7bbY+ZRfDcreowcTbBxXNiVbtPMM0+5kfli76/thPFutlA9/hi5plR
WeGa6V+M61RMdOexg9C/lVIpdqXLpI1xINlRv4vyjalm28JgvzAoucaaFnY6Rdxt
ApDIbhHzYCWyHwMn9DXi5s2nhMFL7i7JXCL/iDySzZB+ZNSKd+ULn1AhTOnOjFSL
jU7S9htD8tNZ7MuTX1Jg6gsuGxH1yr8x6kUX99DymUiYlKT7XbrXPa3Xf9vS8dx+
j0y7J6aJET7dlReH3tScehKOjnt44Djwgb9HiEilMNNYCWUQkKwxZCxnDQ6xNFCV
COXfu+nx87yVbBhSlJH+m0hQbf3jBmx/vuKnjYLRrZ/ATeWv/uWd78G2tZV7ercU
AiXn0eiPzFWML9isjqzd
=y40Y
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu SoC changes for v3.17 (round 4)" from Jason Cooper:
- Armada XP
- Fix return value check in pmsu code
- Document URLs for new public datasheets (Thanks, Marvell & free-electrons!)
- Armada 370/38x
- Add cpuidle support
- mvebu
- Fix build when no platforms are selected
- Update EBU SoC status in docs
* tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu: (21 commits)
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
ARM: mvebu: make the snoop disabling optional in mvebu_v7_pmsu_idle_prepare()
ARM: mvebu: use a local variable to store the resume address
ARM: mvebu: make the cpuidle initialization more generic
ARM: mvebu: rename the armada_370_xp symbols to mvebu_v7 in pmsu.c
ARM: mvebu: use the common function for Armada 375 SMP workaround
ARM: mvebu: add a common function for the boot address work around
ARM: mvebu: sort the #include of pmsu.c in alphabetic order
ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code
ARM: mvebu: fix return value check in armada_xp_pmsu_cpufreq_init()
clk: mvebu: extend clk-cpu for dynamic frequency scaling
ARM: mvebu: extend PMSU code to support dynamic frequency scaling
...
Conflicts:
arch/arm/mach-mvebu/Kconfig
drivers/cpuidle/cpuidle-armada-370-xp.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This resolves a nontrivial conflict against a bug fix
in another branch.
Conflicts:
arch/arm/mach-exynos/pm.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJT0NA6AAoJEPOmecmc0R2B+PYH/RD+OYgBNgwSahT13DG2Irky
EJKJ+BQCIMk0Q+D2Vag/fOiGFeEFpXxeciGu1WkrEyQq2yLpPqzgPEH8NE/XRkkI
tO/EZY/SERWeL+M5VzybQzvLN9JftSv312yzGc+MMcvOe0kazzFI0O9rQKzBBpxm
SJKwWZrvDhGOzivOQco+aLYYEcEw7Ai8vfug4Ay75oJ1fQodHiAGhYaJ/+FYbIP/
aEyVzKoyIAII45Mg6Fg5v+WrfuRaZq76Ch7cxqwLlnuJySVxg62qLzXgLflCTqM7
NwUFuQHJihBUkeEhAsYiwM23D/1SEKYO2/WWgyiN1nlUNZRxVgqkGYyLnoQQMRs=
=W1+9
-----END PGP SIGNATURE-----
Merge tag 'v3.17-rockchip-smp-hotplug' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "CPU-Hotplug support for RK3066 and RK3188" from Heiko Stuebner:
* tag 'v3.17-rockchip-smp-hotplug' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: Add cpu hotplug support for RK3XXX SoCs
ARM: rockchip: select ARMv7 compiler flags for platsmp.o
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This allows the "make dtbs" target to work.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
There exist 2 variants using either the act8846 or rk808 as pmic, while the
rest of the board stays the same.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Node definitions shared by all rk3288 based boards.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
The new rk3288 needs a bigger gpio space, as it has 9 gpio banks.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
The uarts on rk3288 are still compatible with the dw_8250, but located
at a different position and need DEBUG_UART_8250_WORD enabled.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
The debug uart settings from the DEBUG_RK3X_UART options are usable on
all Rockchip SoCs from the rk30xx and rk31xx series but not on the
new rk3288 SoCs. Thus clarify their use to prevent confusion.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Fix the address of L2 controler register in hi3620 SoC.
This has been wrong from the point that the file was merged
in v3.14.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Cc: stable@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJT0ZTrAAoJEA0Cl+kVi2xqaAgP/RZjKZizSPCTTM71wQv4QWjU
TR3SJMgejnePLzHU6h22P11PBV1KOCec9nko+7M+vQeSCJscoJsudmSiKRceh0tC
9ATq5eSIw/p3WVjRSFOsj95O1urKdFQPzQ/odwwtw4WRnFerZoY9ihRBKnZxRCJc
oQdFTDTJeBVlPUxLV1/slS+HWP+I/csYXnAF1Y2tz0GxEX+7iQ6LS7YuCB3kGiG1
S4mcNyfyhUjpxO4oL0QazCEpsX7UgyNm9MMaW7jGxjc7J7GraiVnFdo3C8yZIeS/
zAkA6YnOBoFqwCwgJsvo8VBsfqUtMC49GVJYSFiVNe3s9W6awuLfr8GhhHLX7q6t
dGib2p0DtYbVNGRUHW1PWkwBefdFEGkYmNugcS9/WiqTL2oUr3L11LaAEbzVC2pq
cBnT7+8lyEoaBmpeMDpmXUti4fyQH4uNxMjoRT4qDI1d/U20+d5pZFZzuQbuZ5xX
UZnk4vs6YRZAqYgkPh9Wg5A56J+ku21oHBlnbjIxBgrjA9UjP4foCk3rA8iZT1JD
eH7r033zcOZ1LUOZWO53O4/l5pE8cfU6FweEb9h6ADfrMB8vKTAeDbwipI4n+l0v
/VxlIV+cRCEuWPCNuYJkOLpqj7L36MFkbkppJy8wyPPPu1UUrpAWpq/Pw60uEW7M
hkVo/JtpTjqzUEEb7mC1
=7b91
-----END PGP SIGNATURE-----
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim:
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
* tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: samsung: s5pv210: Remove legacy board support
ARM: SAMSUNG: Remove remaining legacy code
gpio: samsung: Remove legacy support of S5PV210
ARM: S5PV210: Enable multi-platform build support
cpufreq: s5pv210: Make the driver multiplatform aware
ARM: S5PV210: Register cpufreq platform device
ARM: S5PV210: move debug-macro.S into the common space
ARM: S5PV210: Untie PM support from legacy code
ARM: S5PV210: Remove support for board files
ARM: dts: Add Device tree for s5pc110/s5pv210 boards
ARM: dts: Add Device tree for s5pv210 SoC
ARM: S5PV210: Add board file for boot using Device Tree
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
clk: samsung: Add S5PV210 Audio Subsystem clock driver
ARM: SAMSUNG: Remove legacy clock code
serial: samsung: Remove support for legacy clock code
cpufreq: s3c24xx: Remove some dead code
ARM: S5PV210: Migrate clock handling to Common Clock Framework
clk: samsung: Add clock driver for S5PV210 and compatible SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- support cluster power off on exynos5420 and exynos5800
to save power.
- use PMU address via DT to remove PMU static mapping
- remove exynos_cpuidle_init() and exynos_cpufreq_init()
* Note that this is including tags/samsung-cleanup and
tags/exynos-cpuidle are already merged into arm-soc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJT0ZIeAAoJEA0Cl+kVi2xqoj8P/RwWyzRXwnsGHFK2VLEUD6sw
OzzG65ASqoDfgfYAyJSDJpb07k3wgQTD2vTu0v67trmAAPMMXtF/Kd6hYI9n0uto
94cj1PSO259KG5ec/KuhxwBDOFfhZPqDIh27EGNa3jYyDKHhshiP+fOAf8YfSMgb
LZL+dKRrM0asXKBZF5e1IjSf0Gk3LW9IO4crVH5DizQdSdY+BtFOcFzIyqB86qto
j59cz9tOvdc9wYAGDLYayK/5lq1sldaxLSwm1PRk8KLC0PkUsqS/xM2EnmhjOX+w
oLclq1IzVy3ae74GBT2LUIsx+3fRQUvMXuREDn/s3GyFAIDaWAEoswhHTlynIxC3
wkwP/yxdyoHSZ0RfPyfE6Uf/SbzN7+y92Le3KAJ+Cvlb8GhmikdOUwhQ4ByY3r4+
677kSwSYaI0ew8TDgucsjO9iuBL/6vW8QeZj0hmujpYMG05sckcR0fx6J8fteXK9
iUWpAmHZM5AHp3OLZAV/SsWyW9CJMKzTr0DF3Z6ZMNYRURdpACAVgmuZL6/cq5w+
3GKaQ6sSpxAQYSKH8wqSDbB2hlJAt7BRN48lxgh+d7PTDkD9fkLwfF6ht699FNUO
jRy7FDqledVqNmBXGW0ZzFnuLX5NaW3VtXzkpHZyRtIYrMu10k1PZYqYHxfvlieO
lZ+EU9vrN75Ik5Xn/pFK
=1TAS
-----END PGP SIGNATURE-----
Merge tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung power management related updates for v3.17" from Kukjin Kim
- support cluster power off on exynos5420 and exynos5800
to save power.
- use PMU address via DT to remove PMU static mapping
- remove exynos_cpuidle_init() and exynos_cpufreq_init()
* Note that this is including tags/samsung-cleanup and
tags/exynos-cpuidle are already merged into arm-soc.
* tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Move cpufreq and cpuidle device registration to init_machine
ARM: EXYNOS: Refactored code for using PMU address via DT
ARM: EXYNOS: Support cluster power off on exynos5420/5800
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge branches 'samsung/cleanup' and 'samsung/s5p-cleanup-v2', tag 'v3.16-rc6' into next/soc
The following samsung branches are based on these cleanups,
which are already in mainline before this branch gets pulled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
rc series. Mostly a fix for GPMC allocation and omap5 ABB
(Adaptive Body Bias).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PLHAAoJEBvUPslcq6VzVicQANRgbrIUKCHiYvi2ngRafAzT
JrJ6xDn1Z9gQSXErlc1syxrH8YFZuNth+jGBs+yvZ+kN5kh6vCXk34MANxxv/IjO
Qkm3qAjpEwGlzeW9LKwGfA9vqcnvbNJtf+xXXsaS6vB4Eac2epBjNF1aRLHqUN1n
x3buaT7otHNUYzDts5mEPkF1W8ZmmyROvcdedAYaM5wayGK/7ETO7oto4l2l9h39
rsPKX5IL+L36EDCbz45FlmiRf5jXZhR80vfcC9wR1I6om8jov4KZTPTapoSGvaxg
17UaZ2RzMvTbapUJ8kRH7fGt43GPqGO9tqxTzUEXyf1IwP6BhPmVNXNCPWlSbcGn
6zATw4DtKtqEDGu3eOLEvo5yb2QydrC3p9CIl7cmVqRECCBSEtHcoQ8pbGeMCzOP
XPaCw3TKJe5lzAqVqGcgryq7NnzhzvAzLW3MfDvSq5nsYbr8bkvv+6RqyZ7RpY7Q
sv0pROA1Niwi8XyGeFMvh+NB2MtmPXRbV4if0SeKwZAxWIvUk+RXejxyhP7WEqCe
MiUUx/tYjzDi8wjL6BqT7elpjPizR3jy1iuevmTUdsTK6Ks5QcCSwXtlKwr/VzbA
pn4u5ylclXcOuR2EOdPwjTk3++HXvDGKZtRhyjFIf6dnQB/ThJs+5yF1QrWvkiD1
alomdF9oL2wy4cf4dOLA
=nbzr
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge non-urgent omap fixes from Tony Lindgren:
Fixes for omaps that were not considered urgent enough for the
rc series. Mostly a fix for GPMC allocation and omap5 ABB
(Adaptive Body Bias).
* tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc()
omap16xx: Removes fixme no longer needed in ocpi_enable()
ARM: dts: OMAP5: Add device nodes for ABB
ARM: omap2+: usb-tusb6010.c: Cleaning up variable is set more than once
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add device tree and hwmod data for various devices
for new SoCs
- Remove legacy mailbox hwmod data that's no longer
needed for SoCs that are DT only. Note that this may
cause a minor merge conflict in mach-omap2/devices.c
with omap_init_mbox() and omap_init_hdmi_audio(), both
are legacy code that is getting removed
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PR7AAoJEBvUPslcq6VzcUkP/RlSR5qip8BgSsar600B/W11
JFKl8t4VNcoutv109UYrmHaodYDsou6Sgj3QhZk1iQ8Sl76TCXDbF2LUtlpEt4VR
tpzr01o9gRw7SqxOxpIo6AB6owNmfiEhlRX9OsbGC5efgVFPJUO3ycK7ap2JdKbr
Cr976YBE6RVe5JDrQAbKGThilOoidOxUAFToXNbo72VM59V0E8J8LQQJHHs6oWeR
fz6p1sj1P45xUO8/LQ11Aaz5iQ/6bai4sHHZffFcglfjqxEHx5xFbFriEuUS5s+9
dmfyvP1fy7dkiLVFo5KZuDVUBMnLGFUWUWlmxf/dMH+dw4yjxRlyXSxLHa2U8vAO
ttRHBBCph5y2gxSYBvkVXdqV4DdgrIjS7yWUJBnXo+73N/8CfFjOv/kc7l7p2vCu
7uNa7c03+xVG/+EhZPMPxI4nzhb8KRLqZ9k8+FhIfvzuHdA2x//BGYvjmLdi84fk
aEptRjeM5Shvgf89r/OThAiQmQYjMCxUB16jcZVyTaIj6C3sFnudWJR/N0VEaPnZ
QdlbvgN9w+/cvWWFA1P11wgriDKWWS6nWz24tp/YvBI12cIl//NXO8FNv+sOV6Jt
zpjqJTa16c3SxPKTkv6yIzdB5h5Jxouw/EXzrT0Uj5gL0kRqwA17FEdySR31uSDl
F/T9CcZK7JMIx9uCQ8Hf
=lKl0
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "SoC related changes for omaps for v3.17 merge window"
from Tony Lindgren:
- Add device tree and hwmod data for various devices
for new SoCs
- Remove legacy mailbox hwmod data that's no longer
needed for SoCs that are DT only. Note that this may
cause a minor merge conflict in mach-omap2/devices.c
with omap_init_mbox() and omap_init_hdmi_audio(), both
are legacy code that is getting removed
* tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Add data for RTC
arm: dra7xx: Add hwmod data for MDIO and CPSW
arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems
arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy
ARM: DRA7: hwmod: Add OCP2SCP3 module
ARM: DRA7: hwmod: remove interrupts for DMA
ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver
ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs
ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs
ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs
ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot
ARM: DRA7: hwmod_data: Add mailbox hwmod data
ARM: dts: DRA7: Add mailbox nodes
ARM: dts: AM4372: Correct mailbox node data
ARM: dts: AM33xx: Add mailbox node
ARM: dts: OMAP4: Add mailbox node
ARM: dts: OMAP2+: Add mailbox fifo and user information
ARM: AM43xx: hwmod: add DSS hwmod data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch extends nodes of PMU system controller on Exynos4210, 4x12,
5250 and 5420 SoCs with newly defined properties used by Exynos CLKOUT
driver.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Use BUG_ON(x) rather than if(x) BUG();
The semantic patch that fixes this problem is as follows:
// <smpl>
@@ identifier x; @@
-if (x) BUG();
+BUG_ON(x);
// </smpl>
Signed-off-by: Himangi Saraogi <himangi774@gmail.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Change the behavior of omap2_dpll_round_rate() to round to either the
exact rate requested, or the next lowest rate that the clock is able to
provide.
This is not an ideal fix, but is intended to provide a relatively safe
way for drivers to set PLL rates, until a better solution can be
implemented.
For the time being, omap3_noncore_dpll_set_rate() is still allowed to
set its rate to something other than what the caller requested; but will
warn when this occurs.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This allows to boot the Adapteva Parallella board to serial console.
Cc: Andreas Olofsson <andreas@adapteva.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
this new compatibility string prevents macb/gem driver from using the
scatter-gather and gso features on sama5d3x boards.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch attaches selftest's device tree data (required by /drivers/of/selftest.c)
dynamically into live device tree. First, it links selftest device tree data into the
kernel image and then iterates over all the nodes and attaches them into the live tree.
Once the testcases are complete, it removes the data attached.
This patch will remove the manual process of addition and removal of selftest device
tree data into the machine's dts file.
Tested successfully with current selftest's testcases.
Signed-off-by: Gaurav Minocha <gaurav.minocha.os@gmail.com>
[glikely: Removed ability to build as a module and fixed no-devicetree bug]
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Add the DT fragment for the Marvell Dove LCD controllers.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/E1XAKGS-0004WE-8h@rmk-PC.arm.linux.org.uk
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
When building a multiplatform kernel that enables 'ARCH_MVEBU' but
none of the individual options under it, we get this link error:
arch/arm/mach-mvebu/built-in.o: In function `mvebu_armada375_smp_wa_init':
:(.text+0x190): undefined reference to `mvebu_setup_boot_addr_wa'
The best solution seems to be to ensure that in this configuration,
we don't actually build any of the mvebu code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/7339332.ZE2mWIdyDh@wuerfel
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT0VkRAAoJEFSFNJnE9BaIVmwP/i9/kzwHaXr09GbOMoUNlnuP
4wU+qJTucPOlj0rNvE6VewOshkF5G1soMAc97MAlEL12mU0qXt+q9m9xu7aVnQwF
FU87BECdmbWVSIfGnCwkm2PzN+zLmGKr/TTPdCa+kuX1WIq7tUfVwYJVqU7vxDde
n1G5Rx3sbujwAd/kP5X0Bk35X2Wng4Af0f3tkuoRC8nFWCxXN1qW9VZHlJCp5UIh
c4J1COUeANf26CnMbgz3qqumGtYX1gbGHi3zzD4vYxD+inqKtvg/pqTqge3J7E9D
HBhyNn0Rd3m2DDoz/5fRQ5z/5CAKLkpsqJa9ZsYLzzmo3AHUDYoVA6tGIoExhW9q
7P8FJgJx0Gc58V/A0Y48vcHAcqinoL+2vphc5BHZXA2wdeVHZxWO3e7HX7KUmr55
AXlHowFf0VKoJjJtcfFkFjalF5flIfyA7Kiu+10kptj8wsoX+AjUHXPYDfeRxw+S
7nkr/7janHvsBhoP83PqPdRSrlnNPiLJSl8ZIgegVpKOBtsRKJLGW4zlwTp1lchr
M1ydD9eh3uUT3luKRCJzoXo60Ia15x3KBrZxIkQiORIW2otlfUm7dduICc4p9Ij7
RjU8S1NbOVZiD8fNcbmnFp0Xj3cGf4K/Jf1Jvs/QrGB2GAuYoF48BIyeaHj0tCr8
n4wJtDu+aly6vzM7Kf8d
=iOto
-----END PGP SIGNATURE-----
Merge tag 'iio-for-3.17d' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Fourth round of IIO new drivers, functionality and cleanups for the 3.17 cycle
New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15
erratum 798181, so enable the workaround for Brahma-B15.
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Acked-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This fixes the following warning:
warning: (ARCH_MULTIPLATFORM && ARCH_INTEGRATOR && ARCH_SHMOBILE_LEGACY) selects ARM_PATCH_PHYS_VIRT which has unmet direct dependencies (!XIP_KERNEL && MMU && (!ARCH_REALVIEW || !SPARSEMEM))
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Perform any CPU-specific initialization required on the
Broadcom Brahma-15 core.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For LPAE, we have the following means for encoding writable or dirty
ptes:
L_PTE_DIRTY L_PTE_RDONLY
!pte_dirty && !pte_write 0 1
!pte_dirty && pte_write 0 1
pte_dirty && !pte_write 1 1
pte_dirty && pte_write 1 0
So we can't distinguish between writeable clean ptes and read only
ptes. This can cause problems with ptes being incorrectly flagged as
read only when they are writeable but not dirty.
This patch renumbers L_PTE_RDONLY from AP[2] to a software bit #58,
and adds additional logic to set AP[2] whenever the pte is read only
or not dirty. That way we can distinguish between clean writeable ptes
and read only ptes.
HugeTLB pages will use this new logic automatically.
We need to add some logic to Transparent HugePages to ensure that they
correctly interpret the revised pgprot permissions (L_PTE_RDONLY has
moved and no longer matches PMD_SECT_AP2). In the process of revising
THP, the names of the PMD software bits have been prefixed with L_ to
make them easier to distinguish from their hardware bit counterparts.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Long descriptors on ARM are 64 bits, and some pte functions such as
pte_dirty return a bitwise-and of a flag with the pte value. If the
flag to be tested resides in the upper 32 bits of the pte, then we run
into the danger of the result being dropped if downcast.
For example:
gather_stats(page, md, pte_dirty(*pte), 1);
where pte_dirty(*pte) is downcast to an int.
This patch introduces a new macro pte_isset which performs the bitwise
and, then performs a double logical invert (where needed) to ensure
predictable downcasting. The logical inverse pte_isclear is also
introduced.
Equivalent pmd functions for Transparent HugePages have also been
added.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PDDAAoJEBvUPslcq6Vz2kkP/2XcaWEl5xWEP6vTFDwy1RDL
apjp2qURWpJ579bT5y5KlGP8vyBeSLfdXl+ccCuHhBrRtYCZfsUdRaii/AHDcsd/
N0p1ZaAQLwfMXUo1sVgW2grSOJEo8QZs8DEZ7eJfE8SnH2g/i4j+VFknYOO1t6vA
+QoHRWcY0CRLNVHSyGGFk235pfdq1ZAKskayzQ4wCjOXuH2tKILjFsiCxItPStih
CmKqZCoO+BQMz7dLTGZsdchDTqf0PceMh7w6PWO65QeJxr16nWmGbqnZRlUGeBqo
vTZO1Rsfb4DlRYRGBxJ1ybVJw2cgmsx8fWKv4eYVrulGNKUE2m3UYj+oYCst0g5i
VOPMwLiLapciCZi/4er2VWtb9sFWY6XaTAJHVRtrtX6RZgZC5c3cWGzkykXOkF7N
Ut7He/TT41uc5OIjuG6WGQNCIfKOmfBcSDeNRqyr9YzZpn6lbJ+U4kk0kco1pyda
IHrRUD+yHuXK0FjZvZMDlWmKqP3QLK+xjL7LRzsiJ4yfymikckjS2RH0iP9PGuCV
T68PPl+rzyHjmVUnbBCgLnatTAQ9uHPCb4Eb5rRZaiO+4nUyqeqikMWU/DsiS4jc
1igudgOx53/0zCCQC/VHVL9HGb4fSrbevMzq8YR3uyyS2b/R8FFbGs6Y6TCIDWdi
TUSv/ckpA4uUbe22SFTn
=/FMt
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Two regression fixes for omaps and one fix for device
signaling" from Tony Lindgren:
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
* tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: OMAP2+: l2c: squelch warning dump on power control setting
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Unlike the Armada XP and the Armada 370, this SoC uses a Cortex A9
core. Consequently, the procedure to enter the idle state is
different: interaction with the SCU, not disabling snooping, etc.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-16-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit introduces the cpuidle support for Armada 370. The main
difference compared to the already supported Armada XP is that the
Armada 370 has an issue caused by "a slow exit process from the deep
idle state due to heavy L1/L2 cache cleanup operations performed by
the BootROM software" (cf errata GL-BootROM-10).
To work around this issue, we replace the restart code of the BootROM
by some custom code located in an internal SRAM. For this purpose, we
use the common function mvebu_boot_addr_wa() introduced in the commit
"ARM: mvebu: Add a common function for the boot address work around".
The message in case of failure to suspend the system was switched from
the warn level to the debug level. Indeed due to the "slow exit
process from the deep idle state" in Armada 370, this situation
happens quite often. Using the debug level avoids spamming the kernel
logs, but still allows to enable it if needed.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-15-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This driver will be able to manage the cpuidle for more SoCs than just
Armada 370 and XP. It will also support Armada 38x and potentially
other SoC of the Marvell Armada EBU family. To take this into account,
this patch renames the driver and its symbols.
It also changes the driver name from cpuidle-armada-370-xp to
cpuidle-armada-xp, because separate platform drivers will be
registered for the other SoC types. This change must be done
simultaneously in the cpuidle driver and in the PMSU code in order to
remain bisectable.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lkml.kernel.org/r/1406120453-29291-12-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The SCU address will be needed in other files than board-v7.c,
especially in pmsu.c for cpuidle related activities. So this patch
adds a function that allows to retrieve the virtual address at which
the SCU has been mapped.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On some mvebu v7 SoCs (the ones using a Cortex-A9 core and not a PJ4B
core), the snoop disabling feature does not exist as the hardware
coherency is handled in a different way. Therefore, in preparation to
the introduction of the cpuidle support for those SoCs, this commit
modifies the mvebu_v7_psmu_idle_prepare() function to take several
flags, which allow to decide whether snooping should be disabled, and
whether we should use the deep idle mode or not.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-9-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The resume address used by the cpuidle code will not always be the
same depending on the SoC. Using a local variable to store the resume
address allows to keep the same function for the PM notifier but with
a different address. This address will be set during the
initialization of the cpuidle logic in pmsu.c.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-8-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In preparation to the addition of the cpuidle support for more SoCs,
this patch moves the Armada XP specific initialization to a separate
function.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-7-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Most of the function related to the PMSU are not specific to the
Armada 370 or Armada XP SoCs. They can also be used for most of the
other mvebu ARMv7 SoCs, and will actually be used to support cpuidle
on Armada 38x.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Use the common function mvebu_setup_boot_addr_wa() introduced in the
commit "ARM: mvebu: Add a common function for the boot address work
around" instead of the dedicated version for Armada 375.
This commit also moves the workaround in the system-controller
module. Indeed the workaround on 375 is really related to setting the
boot address which is done by the system controller.
As a bonus we no longer use an harcoded value to access the register
storing the boot address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On some of the mvebu SoCs and due to internal BootROM issue, the CPU
initial jump code must be placed in the SRAM memory of the SoC. In
order to achieve this, we have to unmap the BootROM and at some
specific location where the BootROM was placed, create a dedicated
MBus window for the SRAM. This SRAM is initialized with a few
instructions of code that allows to jump to the real secondary CPU
boot address. The SRAM used is the Crypto engine one.
This work around is currently needed for booting SMP on Armada 375 Z1
and will be needed for cpuidle support on Armada 370. Instead of
duplicating the same code, this commit introduces a common function to
handle it: mvebu_setup_boot_addr_wa().
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Sorting the headers in alphabetic order will help to reduce conflicts
when adding new headers later.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
do_armada_370_xp_cpu_suspend() and armada_370_xp_pmsu_idle_prepare(),
have been merged into a single function called
armada_370_xp_pmsu_idle_enter() by the commit "bbb92284b6c8 ARM:
mvebu: slightly refactor/rename PMSU idle related functions", in
prepare for the introduction of the CPU hotplug support for Armada XP.
But for cpuidle the prepare function will be common to all the mvebu
SoCs that use the PMSU, while the suspend function will be specific to
each SoC. Keeping the prepare function separate will help reducing
code duplication while new SoC support is added.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC
This corrects a bug introduced in v3.14 by
59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").
However, it does not manifest in mainline code until
SDHI devices were enabled on the Koelsch board in v3.15 by
2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").
It also manifests on the Henninger board when
SDHI devices were enabled in v3.16-rc1 by
1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0FapAAoJENfPZGlqN0++socQAI25b++UQ89EiUQE/98yB/vq
ma63gl346dXdv6lb8iN+rx9Vk3wtzNuroozds2iulmAnutMTdQ83huektaYdPkQ4
T+RxOl4liJUbQRBg2+8UBtiaTB+oGQWbRkqt/MOvniTbOqYKs71Oym901ULlQMKL
9RSyWORUx5x2c+zZMJ0eU8T6Bl9hf0P0ikHwUv9ZYIQzrYxjJubdmyVoNI6slxF9
S4O4sUZfOSVqfSis5rEfWgG29jBYjlGdTyFXp1+kE19J02wikGRTjgM9bWkxarrF
wfa+ZQXjMywsdY8rCSxeNEYFuS3NW7s4ylRIC4UfpvSg1cvNVVE5m4BK0E2IOIyJ
kW/zSimYfh/RJSX+HMZ2hfipvFDE6dDOL5PHpwJ8fhWfM5Yinn1Wgfa2mUDxsPFe
CAfhtiTB56Rhzo+ln9UcNwaakZs/uSsG0jq3lI2zNTUd+1VMS+7xB/3pdKQjDGo/
75+UKvdcqJ4yprfcvKwIp0LsJCKWIm1hQTqSFWuYfpVaNbM+9CFQculw0YZxOWxc
xFr3LznFidUJCHKiM4ngnPBsLfDCdjVU5MyqDXcW9iVEKeSQJJ01CCORA4MjTUT5
niZEMcAoIMaeXeuVnL5FlRK5Owd6SgryWpy4XUlf+ioGLLE5EzuLqA9TJe4eo41P
caa5gpyUDbTjH1J4GktY
=SQyi
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Second Round of Renesas ARM Based SoC Fixes for v3.16" from Simon Horman
* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC
This corrects a bug introduced in v3.14 by
59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").
However, it does not manifest in mainline code until
SDHI devices were enabled on the Koelsch board in v3.15 by
2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").
It also manifests on the Henninger board when
SDHI devices were enabled in v3.16-rc1 by
1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")
* tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Fix SD2CKCR register address
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A number of board files in arch/arm and arch/unicore32
explicitly reference platform_bus device as a parent
for new platform devices.
This is unnecessary, as platform device API guarantees
that devices with NULL parent are going to by adopted
by the mentioned "root" device.
This patch removes or replaces with NULL such references.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Use the nanoseconds based interface instead of converting from a
timespec.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
This patchset fix wrong compatible string for Exynos3250 ADC. Exynos3250 SoC
need to control only special clock for ADC. Exynos SoC except for Exynos3250
has not included special clock for ADC. The exynos ADC driver can control
special clock if compatible string is 'exynos3250-adc-v2'.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Merge basic support for the Mediatek Cortex-A7 SoCs from Matthias Brugger:
Support is quite basic, as the only component working up to now are the
timers.
* tag 'v3.17-next-mediatek-support' of https://github.com/mbgg/linux-mediatek:
arm: mediatek: add dts for Aquaris5 mobile phone
dt-bindings: add documentation for Mediatek SoC
arm: add basic support for Mediatek MT6589 boards
Signed-off-by: Matthias Brugger matthias.bgg@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada 375
- Fix ethernet aliases for new node added for v3.17
- Add missing MDIO clock for new node added for v3.17
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTz6X+AAoJEP45WPkGe8ZnjT4QAKDmMMYP6bSILe4JpGFeEwp/
9so3aFCkRMmM9ENgZmXU93hiAIMtmofivU7hHBz+IevFmK2KkoxLxIDfQjhandS1
7ek5U5T+e6wzq8GGW3tYKMZiqsT0LpE1sJurcq4k13zYML2DO6YDZr19bIa9fZLL
DWuj+QvFZUHvuoXYioKU9OyfoREHkImD3DDdPSYeGpDF/lOUrFFqhIG9ZDhuZEhw
G5PAgfqXyHZtxJX4LvZUxFTOIhoefVOCt4519sjFBOpjKW3urZRsYLnUTO/Q1+Fc
O/8Y5U3GSyYJ+LKxxqYNZuWReZ+wZ+WCoKmP5O4bLwl4hJwo7bciYMEtLdP4Q22A
K4JzGNPX4d6quLLIpRg3Jl0lf0FBQhZu57S8oNa5jUy2oTCGL7a2bf5CMlBeIzGV
hjPMboHV+yJeJ+t78npa8hrrLQtS/Oky574C2EBqkaXXKAj4fq6VNMkza7m6XvYA
imgD/jlU417GRhHwu+lPFqcaTdptWfc1s4TrOaXoWOy5a/KdwxJTQvH3lS+QoME7
smNI4+sUeyjkk2gpKPHC5yg1gU56B242aQ2EgNgljZ+x3YIjhodA7RKK1ylFEYSe
jJmSGeeGhdaumvxbTV95lHMgW/M6ODofaPAgYT4jXuNB6SelT9iezG4WV/rbSOOe
gIGE5Mv9dldojbwJSK85
=y5gn
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 3)" from Jason Cooper:
- Armada 375
- Fix ethernet aliases for new node added for v3.17
- Add missing MDIO clock for new node added for v3.17
* tag 'mvebu-dt-3.17-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add missing MDIO clock in Armada 375
ARM: mvebu: Add ethernet aliases required by U-Boot
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The non-scalar ktime_t implementation is basically a timespec
which has to be changed to support dates past 2038 on 32bit
systems.
This patch removes the non-scalar ktime_t implementation, forcing
the scalar s64 nanosecond version on all architectures.
This may have additional performance overhead on some 32bit
systems when converting between ktime_t and timespec structures,
however the majority of 32bit systems (arm and i386) were already
using scalar ktime_t, so no performance regressions will be seen
on those platforms.
On affected platforms, I'm open to finding optimizations, including
avoiding converting to timespecs where possible.
[ tglx: We can now cleanup the ktime_t.tv64 mess, but thats a
different issue and we can throw a coccinelle script at it ]
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
commit 11c32d7b62 ("video: move Versatile CLCD helpers")
moved files out of the plat-versatile directory but in the process
got a few of the dependencies wrong:
- If CONFIG_FB is not set, the file no longer gets built, resulting
in a link error
- If CONFIG_FB or CONFIG_FB_ARMCLCD are disabled, we also get a
Kconfig warning for incorrect dependencies due to the symbol
being 'select'ed from the platform Kconfig.
- When the file is not built, we also get a link error for missing
symbols.
This patch should fix all three, by removing the 'select' statements,
changing the Kconfig description of the symbol to be enabled in
exactly the right configurations, and adding inline stub functions
for the case when the framebuffer driver is disabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
In case of error, the function clk_get() returns ERR_PTR()
and never returns NULL. The NULL test in the return value
check should be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Link: https://lkml.kernel.org/r/1406038688-26417-1-git-send-email-weiyj_lk@163.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In Armada 375 SoCs, the MDIO is handled by a separate orion-mdio driver,
despite the register is contained within the "LMS" block of the network
controller.
Therefore we need to add the clock to the MDIO devicetree to prevent the
controller from being accesed with its clock gated. This is needed, for
instance, to be able to load the MDIO driver before the network driver.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1405961296-5846-7-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Select CLKSRC_OF for PXA architectures.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Move time.c from arch/arm/mach-pxa/time.c to
drivers/clocksource/pxa_timer.c.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Adds ability to shutdown all CPUs except the first one
(since it might be special for a lot of platforms).
It is now possible to use kexec which requires such a feature.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When compiling for multiplatform for both ARMv6 and ARMv7, the default
compiler flags are for ARMv6, and the following cpu-hotplug change will
fail with:
/tmp/ccSFxfmI.s:68: Error: selected processor does not support ARM mode `isb '
/tmp/ccSFxfmI.s:74: Error: selected processor does not support ARM mode `isb '
/tmp/ccSFxfmI.s:75: Error: selected processor does not support ARM mode `dsb '
Fix this in a similar manner as in commit 9f0affcf3e "ARM: mvebu: Fix pmsu
compilation when ARMv6 is selected", by specifying ARMv7 flags for platsmp.o.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds bch8 ecc software fallback which is mostly used by
omap3s because they lack hardware elm support.
Fixes: 0611c41934 (ARM: OMAP2+: gpmc:
update gpmc_hwecc_bch_capable() for new platforms and ECC schemes)
Cc: <stable@vger.kernel.org> # 3.15.x+
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTztT1AAoJEMePsQ0LvSpLM90P/jT8Ea/hjZzsZwi48RD/xv5u
fFXVdb69jx0sS8HrXPIpuyLxYASFM4iRK7cJn6C0ptNj31mi+BKRhIH2xKdtxw/X
n+5UvBirHj+Vk3Sk2OVmb7oKslDlOCPQvwMkWfOQzF6CCujIqrhMhzzq71b6GfWb
KVmlsQoMWqApedcNHpoOLwvD+TZBbU4RRRtUb9owYXSPGReci4korT5SDADjfA7Y
nuGLk0YnkF2CsShORyM8BYrB1DXJjIk133d3xOK+blgV8slMik3af2N77CwWPTtP
P/qj8Uk3J787FG9nV8nq9aSpNZa8cOSIFSjdg2OhpwV5hX6wGJlnm5Q2sbQyzyxM
9Xe5L40i/F96F/vHDyCwTEdPoyu6VHysJG6qCGbsKp7rfEIj9WPhSZoi2hxqzxI5
furH0hwA68l68C+ujOsUX1xU8RfCrpEW8Knj69FBuHhX87x4Yoxc1KuIA4wabol3
8fEts6S99aVYit7GAoU2JnPzBCoE6aRT5Ns7rnswCqNFu4xKW8CkOLHR02MA2l0v
1TZPIFBGkHwU/r0U8VhLKqr/bGqVtPMyUJnmuGGoT3Wdcm1oi+Hk6940Hc8SqjAk
dIkIirS+08cpn4SuJJa+HrNMLmeFF2pqSumpAvr+kK2OFFhpnx9LHbq++JCMCIZB
0uOAyHGMtY9E/vTJwQgt
=csSf
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
OMAP hwmod data additions for v3.17. Most of these are DRA7xx-related,
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
As exynos_cpuidle_init() and exynos_cpufreq_init() functions have just
one line of code for registering platform devices. So we can move them
to exynos_dt_machine_init() and remove exynos_cpuidle_init() and
exynos_cpufreq_init(). This will help in reducing lines of code in
exynos.c, making it more clean.
Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 based SoC.
Also as we have removed static mappings from "regs-pmu.h" it does
not need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Doug Anderson