mirror of https://gitee.com/openkylin/linux.git
214 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
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d7d170a8e3 |
chrome platform changes for v5.3
* CrOS EC:
- Add new CrOS ISHTP transport protocol
- Add proper documentation for debugfs entries and expose resume and uptime files
- Select LPC transport protocol variant at runtime.
- Add lid angle sensor driver
- Fix oops on suspend/resume for lightbar driver
- Set CrOS SPI transport protol in realtime
* Wilco EC:
- Add telemetry char device interface
- Add support for event handling
- Add new sysfs attributes
* Misc:
- Contains ib-mfd-cros-v5.3 immutable branch from mfd, with cros_ec_commands.h
header freshly synced with Chrome OS's EC project.
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Merge tag 'tag-chrome-platform-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux
Pull chrome platform updates from Benson Leung
"CrOS EC:
- Add new CrOS ISHTP transport protocol
- Add proper documentation for debugfs entries and expose resume and
uptime files
- Select LPC transport protocol variant at runtime.
- Add lid angle sensor driver
- Fix oops on suspend/resume for lightbar driver
- Set CrOS SPI transport protol in realtime
Wilco EC:
- Add telemetry char device interface
- Add support for event handling
- Add new sysfs attributes
Misc:
- Contains ib-mfd-cros-v5.3 immutable branch from mfd, with
cros_ec_commands.h header freshly synced with Chrome OS's EC
project"
* tag 'tag-chrome-platform-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: (54 commits)
mfd / platform: cros_ec_debugfs: Expose resume result via debugfs
platform/chrome: lightbar: Get drvdata from parent in suspend/resume
iio: cros_ec: Add lid angle driver
platform/chrome: wilco_ec: Add circular buffer as event queue
platform/chrome: cros_ec_lpc_mec: Fix kernel-doc comment first line
platform/chrome: cros_ec_lpc: Choose Microchip EC at runtime
platform/chrome: cros_ec_lpc: Merge cros_ec_lpc and cros_ec_lpc_reg
Input: cros_ec_keyb: mask out extra flags in event_type
platform/chrome: wilco_ec: Fix unreleased lock in event_read()
platform/chrome: cros_ec_debugfs: cros_ec_uptime_fops can be static
platform/chrome: cros_ec_debugfs: Add debugfs ABI documentation
platform/chrome: cros_ec_debugfs: Fix kernel-doc comment first line
platform/chrome: cros_ec_debugfs: Add debugfs entry to retrieve EC uptime
mfd: cros_ec: Update I2S API
mfd: cros_ec: Add Management API entry points
mfd: cros_ec: Add SKU ID and Secure storage API
mfd: cros_ec: Add API for rwsig
mfd: cros_ec: Add API for Fingerprint support
mfd: cros_ec: Add API for Touchpad support
mfd: cros_ec: Add API for EC-EC communication
...
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Evan Green
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8c3166e17c |
mfd / platform: cros_ec_debugfs: Expose resume result via debugfs
For ECs that support it, the EC returns the number of slp_s0 transitions and whether or not there was a timeout in the resume response. Expose the last resume result to usermode via debugfs so that usermode can detect and report S0ix timeouts. Signed-off-by: Evan Green <evgreen@chromium.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Rajat Jain
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c18e6ea101 |
platform/chrome: lightbar: Get drvdata from parent in suspend/resume
The lightbar driver never assigned the drvdata in probe method, and thus there is nothing there. Need to get the ec_dev from the parent's drvdata. Signed-off-by: Rajat Jain <rajatja@google.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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1d333ef3d5 |
platform/chrome: wilco_ec: Add circular buffer as event queue
The current implementation of the event queue both wastes space using a doubly linked list and isn't super obvious in how it behaves. This converts the queue to an actual circular buffer. The size of the queue is a tunable module parameter. This also fixes a few other things: - A memory leak that occurred when the ACPI device was removed, but the events were not freed from the queue. - Now kfree() the oldest event from outside all locks. - Add newline to logging messages. - Add helper macros to calculate size of events. - Remove unneeded lock around a check for dev_data->exist in hangup_device(). - Remove an unneeded null event pointer check in enqueue_events(). - Correct some comments. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Enric Balletbo i Serra
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9eecd07b34 |
platform/chrome: cros_ec_lpc_mec: Fix kernel-doc comment first line
kernel-doc comments have a prescribed format. To be _particularly_ correct we should also capitalise the brief description and terminate it with a period. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Nick Crews <ncrews@chromium.org> |
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Enric Balletbo i Serra
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22c040fa21 |
platform/chrome: cros_ec_lpc: Choose Microchip EC at runtime
On many boards, communication between the kernel and the Embedded Controller happens over an LPC bus. In these cases, the kernel config CONFIG_CROS_EC_LPC is enabled. Some of these LPC boards contain a Microchip Embedded Controller (MEC) that is different from the regular EC. On these devices, the same LPC bus is used, but the protocol is a little different. In these cases, the CONFIG_CROS_EC_LPC_MEC kernel config is enabled. Currently, the kernel decides at compile-time whether or not to use the MEC variant, and, when that kernel option is selected it breaks the other boards. We would like a kind of runtime detection to avoid this. This patch adds that detection mechanism by probing the protocol at runtime, first we assume that a MEC variant is connected, and if the protocol fails it fallbacks to the regular EC. This adds a bit of overload because we try to read twice on those LPC boards that doesn't contain a MEC variant, but is a better solution than having to select the EC variant at compile-time. While here also fix the alignment in Kconfig file for this config option replacing the spaces by tabs. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Nick Crews <ncrews@chromium.org> Reviewed-by: Nick Crews <ncrews@chromium.org> |
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Enric Balletbo i Serra
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4116fd25c5 |
platform/chrome: cros_ec_lpc: Merge cros_ec_lpc and cros_ec_lpc_reg
The cros_ec_lpc_reg files are only used by the cros_ec_lpc core and there isn't logical separation between them. So, merge those files into the cros_ec_lpc also allowing us to drop the header file used for the interface between the two. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Nick Crews <ncrews@chromium.org> |
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Nick Crews
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aa8b8f9f9b |
platform/chrome: wilco_ec: Fix unreleased lock in event_read()
When copying an event to userspace failed, the event queue lock was never released. This fixes that. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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kbuild test robot
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35b52b3315 |
platform/chrome: cros_ec_debugfs: cros_ec_uptime_fops can be static
Fixes: 909447f683b3 ("platform/chrome: cros_ec_debugfs: Add debugfs entry to retrieve EC uptime")
Signed-off-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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Enric Balletbo i Serra
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cb78a163c1 |
platform/chrome: cros_ec_debugfs: Fix kernel-doc comment first line
kernel-doc comments have a prescribed format. To be _particularly_ correct we should also capitalise the brief description and terminate it with a period. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Tim Wawrzynczak
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e90716a661 |
platform/chrome: cros_ec_debugfs: Add debugfs entry to retrieve EC uptime
The new debugfs entry 'uptime' is being made available to userspace so that a userspace daemon can synchronize EC logs with host time. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> [rework based on Tim's first approach] Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Tim Wawrzynczak <twawrzynczak@chromium.org> |
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YueHaibing
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81bc8c03e1 |
platform/chrome: cros_ec: Make some symbols static
Fix sparse warning: drivers/platform/chrome/cros_ec_debugfs.c:256:30: warning: symbol 'cros_ec_console_log_fops' was not declared. Should it be static? drivers/platform/chrome/cros_ec_debugfs.c:265:30: warning: symbol 'cros_ec_pdinfo_fops' was not declared. Should it be static? drivers/platform/chrome/cros_ec_lightbar.c:550:24: warning: symbol 'cros_ec_lightbar_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_sysfs.c:338:24: warning: symbol 'cros_ec_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_vbc.c:104:24: warning: symbol 'cros_ec_vbc_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_lpc.c:408:25: warning: symbol 'cros_ec_lpc_pm_ops' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Raul E Rangel
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79e3f1d3db |
platform/chrome: wilco_ec: Add version sysfs entries
Add the ability to extract version information from the EC. Example Output: $ cd /sys/bus/platform/devices/GOOG000C:00 $ tail build_date build_revision version model_number ==> build_date <== 04/25/19 ==> build_revision <== d2592cae0 ==> version <== 00.00.14 ==> model_number <== 08B6 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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1210d1e6ba |
platform/chrome: wilco_ec: Add telemetry char device interface
The Wilco Embedded Controller is able to send telemetry data which is useful for enterprise applications. A daemon running on the OS sends a command to the EC via a write() to a char device, and can read the response with a read(). The write() request is verified by the driver to ensure that it is performing only one of the whitelisted commands, and that no extraneous data is being transmitted to the EC. The response is passed directly back to the reader with no modification. The character device will appear as /dev/wilco_telemN, where N is some small non-negative integer, starting with 0. Only one process may have the file descriptor open at a time. The calling userspace program needs to keep the device file descriptor open between the calls to write() and read() in order to preserve the response. Up to 32 bytes will be available for reading. For testing purposes, try requesting the EC's firmware build date, by sending the WILCO_EC_TELEM_GET_VERSION command with argument index=3. i.e. write [0x38, 0x00, 0x03] to the device node. An ASCII string of the build date is returned. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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f7b0bc5eaf |
platform/chrome: wilco_ec: Add event handling
The Wilco Embedded Controller can create custom events that
are not handled as standard ACPI objects. These events can
contain information about changes in EC controlled features,
such as errors and events in the dock or display. For example,
an event is triggered if the dock is plugged into a display
incorrectly. These events are needed for telemetry and
diagnostics reasons, and for possibly alerting the user.
These events are triggered by the EC with an ACPI Notify(0x90),
and then the BIOS reads the event buffer from EC RAM via an
ACPI method. When the OS receives these events via ACPI,
it passes them along to this driver. The events are put into
a queue which can be read by a userspace daemon via a char device
that implements read() and poll(). The event queue acts as a
circular buffer of size 64, so if there are no userspace consumers
the kernel will not run out of memory. The char device will appear at
/dev/wilco_event{n}, where n is some small non-negative integer,
starting from 0. Standard ACPI events such as the battery getting
plugged/unplugged can also come through this path, but they are
dealt with via other paths, and are ignored here.
To test, you can tail the binary data with
$ cat /dev/wilco_event0 | hexdump -ve '1/1 "%x\n"'
and then create an event by plugging/unplugging the battery.
Signed-off-by: Nick Crews <ncrews@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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Douglas Anderson
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ac5bdfdc0e |
platform/chrome: cros_ec_spi: Request the SPI thread be realtime
All currently known ECs in the wild are very sensitive to timing. Specifically the ECs are known to drop a transfer if more than 8 ms passes from the assertion of the chip select until the transfer finishes. Let's use the new feature introduced in the patch (spi: Allow SPI devices to request the pumping thread be realtime") to request the SPI pumping thread be realtime. This means that if we get shunted off to the SPI thread for whatever reason we won't get downgraded to low priority. NOTES: - We still need to keep ourselves as high priority since the SPI core doesn't guarantee that all transfers end up on the pumping thread (in fact, it tries pretty hard to do them in the calling context). - If future Chrome OS ECs ever fix themselves to be less sensitive then we could consider adding a property (or compatible string) to not set this property. For now we need it across the board. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Thomas Gleixner
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ec8f24b7fa |
treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Douglas Anderson
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7dadf88f8d |
platform/chrome: cros_ec_spi: Move to real time priority for transfers
In commit |
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Rushikesh S Kadam
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26a14267af |
platform/chrome: Add ChromeOS EC ISHTP driver
This driver implements a slim layer to enable the ChromeOS EC kernel stack (cros_ec) to communicate with ChromeOS EC firmware running on the Intel Integrated Sensor Hub (ISH). The driver registers a ChromeOS EC MFD device to connect with cros_ec kernel stack (upper layer), and it registers a client with the ISH Transport Protocol bus (lower layer) to talk with the ISH firwmare. See description of the ISHTP protocol at Documentation/hid/intel-ish-hid.txt Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Evan Green
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75501d2edc |
platform/chrome: cros_ec_spi: Always add of_match_table
The Chrome OS EC driver attaches to devices using the of_match_table even when ACPI is the underlying firmware. It does this using the magic PRP0001 ACPI HID, which tells ACPI to go find an OF compatible string under the hood and match on that. The cros_ec_spi driver needs to provide the of_match_table regardless of whether CONFIG_OF is enabled or not, since the table is used by ACPI for PRP0001 devices. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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2ad1f7a914 |
platform/chrome: wilco_ec: Remove 256 byte transfers
The 0xF6 command, intended to send and receive 256 byte payloads to and from the EC, is not needed. The 0xF5 command for 32 byte payloads is sufficient. This patch removes support for the 0xF6 command and 256 byte payloads. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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4c1ca625c6 |
platform/chrome: wilco_ec: Add Boot on AC support
Boot on AC is a policy which makes the device boot from S5 when AC power is connected. This is useful for users who want to run their device headless or with a dock. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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0c0b7ea23a |
platform/chrome: wilco_ec: Add property helper library
A Property is typically a data item that is stored to NVRAM by the EC. Each of these data items has an index associated with it, known as the Property ID (PID). Properties may have variable lengths, up to a max of WILCO_EC_PROPERTY_MAX_SIZE bytes. Properties can be simple integers, or they may be more complex binary data. This patch adds support for getting and setting properties. This will be useful for setting the charge algorithm and charge schedules, which all use properties. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Linus Torvalds
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ebcf5bb282 |
- Core Frameworks
- Document (kerneldoc) core mfd_add_devices() API
- New Drivers
- Add support for Altera SOCFPGA System Manager
- Add support for Maxim MAX77650/77651 PMIC
- Add support for Maxim MAX77663 PMIC
- Add support for ST Multi-Function eXpander (STMFX)
- New Device Support
- Add support for LEDs to Intel Cherry Trail Whiskey Cove PMIC
- Add support for RTC to SAMSUNG Electronics S2MPA01 PMIC
- Add support for SAM9X60 to Atmel HLCDC (High-end LCD Controller)
- Add support for USB X-Powers AXP 8xx PMICs
- Add support for Integrated Sensor Hub (ISH) to ChromeOS EC
- Add support for USB PD Logger to ChromeOS EC
- Add support for AXP223 to X-Powers AXP series PMICs
- Add support for Power Supply to X-Powers AXP 803 PMICs
- Add support for Comet Lake to Intel Low Power Subsystem
- Add support for Fingerprint MCU to ChromeOS EC
- Add support for Touchpad MCU to ChromeOS EC
- Move TI LM3532 support to LED
- New Functionality
- Add/extend DT support; max77650, max77620
- Add support for power-off; max77620
- Add support for clocking; syscon
- Add support for host sleep event; cros_ec
- Fix-ups
- Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
- Remove unused functionality; rk808, da9063-*
- SPDX conversion; da9063-*, atmel-*,
- Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
- Fix-up DT bindings; ti-lmu, cirrus,lochnagar
- Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb
- Bug Fixes
- Fix incorrect defined values; max77620, da9063
- Fix device initialisation; twl6040
- Reset device on init; intel-lpss
- Fix build warnings when !OF; sun6i-prcm
- Register OF match tables; tps65912-spi
- Fix DMI matching; intel_quark_i2c_gpio
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Merge tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core Framework:
- Document (kerneldoc) core mfd_add_devices() API
New Drivers:
- Altera SOCFPGA System Manager
- Maxim MAX77650/77651 PMIC
- Maxim MAX77663 PMIC
- ST Multi-Function eXpander (STMFX)
New Device Support:
- LEDs support in Intel Cherry Trail Whiskey Cove PMIC
- RTC support in SAMSUNG Electronics S2MPA01 PMIC
- SAM9X60 support in Atmel HLCDC (High-end LCD Controller)
- USB X-Powers AXP 8xx PMICs
- Integrated Sensor Hub (ISH) in ChromeOS EC
- USB PD Logger in ChromeOS EC
- AXP223 in X-Powers AXP series PMICs
- Power Supply in X-Powers AXP 803 PMICs
- Comet Lake in Intel Low Power Subsystem
- Fingerprint MCU in ChromeOS EC
- Touchpad MCU in ChromeOS EC
- Move TI LM3532 support to LED
New Functionality:
- max77650, max77620: Add/extend DT support
- max77620 power-off
- syscon clocking
- croc_ec host sleep event
Fix-ups:
- Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
- Remove unused functionality; rk808, da9063-*
- SPDX conversion; da9063-*, atmel-*,
- Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
- Fix-up DT bindings; ti-lmu, cirrus,lochnagar
- Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb
Bug Fixes:
- Fix incorrect defined values; max77620, da9063
- Fix device initialisation; twl6040
- Reset device on init; intel-lpss
- Fix build warnings when !OF; sun6i-prcm
- Register OF match tables; tps65912-spi
- Fix DMI matching; intel_quark_i2c_gpio"
* tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits)
mfd: Use dev_get_drvdata() directly
mfd: cros_ec: Instantiate properly CrOS Touchpad MCU device
mfd: cros_ec: Instantiate properly CrOS FP MCU device
mfd: cros_ec: Update the EC feature codes
mfd: intel-lpss: Add Intel Comet Lake PCI IDs
mfd: lochnagar: Add links to binding docs for sound and hwmon
mfd: ab8500-debugfs: Fix a typo ("deubgfs")
mfd: imx6sx: Add MQS register definition for iomuxc gpr
dt-bindings: mfd: LMU: Fix lm3632 dt binding example
mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching
mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L
mfd: tps65912-spi: Add missing of table registration
mfd: axp20x: Add USB power supply mfd cell to AXP803
mfd: sun6i-prcm: Fix build warning for non-OF configurations
mfd: intel-lpss: Set the device in reset state when init
platform/chrome: Add support for v1 of host sleep event
mfd: cros_ec: Add host_sleep_event_v1 command
mfd: cros_ec: Instantiate the CrOS USB PD logger driver
mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable
mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable
...
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Linus Torvalds
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414147d99b |
pci-v5.2-changes
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Merge tag 'pci-v5.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Enumeration changes:
- Add _HPX Type 3 settings support, which gives firmware more
influence over device configuration (Alexandru Gagniuc)
- Support fixed bus numbers from bridge Enhanced Allocation
capabilities (Subbaraya Sundeep)
- Add "external-facing" DT property to identify cases where we
require IOMMU protection against untrusted devices (Jean-Philippe
Brucker)
- Enable PCIe services for host controller drivers that use managed
host bridge alloc (Jean-Philippe Brucker)
- Log PCIe port service messages with pci_dev, not the pcie_device
(Frederick Lawler)
- Convert pciehp from pciehp_debug module parameter to generic
dynamic debug (Frederick Lawler)
Peer-to-peer DMA:
- Add whitelist of Root Complexes that support peer-to-peer DMA
between Root Ports (Christian König)
Native controller drivers:
- Add PCI host bridge DMA ranges for bridges that can't DMA
everywhere, e.g., iProc (Srinath Mannam)
- Add Amazon Annapurna Labs PCIe host controller driver (Jonathan
Chocron)
- Fix Tegra MSI target allocation so DMA doesn't generate unwanted
MSIs (Vidya Sagar)
- Fix of_node reference leaks (Wen Yang)
- Fix Hyper-V module unload & device removal issues (Dexuan Cui)
- Cleanup R-Car driver (Marek Vasut)
- Cleanup Keystone driver (Kishon Vijay Abraham I)
- Cleanup i.MX6 driver (Andrey Smirnov)
Significant bug fixes:
- Reset Lenovo ThinkPad P50 GPU so nouveau works after reboot (Lyude
Paul)
- Fix Switchtec firmware update performance issue (Wesley Sheng)
- Work around Pericom switch link retraining erratum (Stefan Mätje)"
* tag 'pci-v5.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (141 commits)
MAINTAINERS: Add Karthikeyan Mitran and Hou Zhiqiang for Mobiveil PCI
PCI: pciehp: Remove pointless MY_NAME definition
PCI: pciehp: Remove pointless PCIE_MODULE_NAME definition
PCI: pciehp: Remove unused dbg/err/info/warn() wrappers
PCI: pciehp: Log messages with pci_dev, not pcie_device
PCI: pciehp: Replace pciehp_debug module param with dyndbg
PCI: pciehp: Remove pciehp_debug uses
PCI/AER: Log messages with pci_dev, not pcie_device
PCI/DPC: Log messages with pci_dev, not pcie_device
PCI/PME: Replace dev_printk(KERN_DEBUG) with dev_info()
PCI/AER: Replace dev_printk(KERN_DEBUG) with dev_info()
PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
PCI: Replace printk(KERN_INFO) with pr_info(), etc
PCI: Use dev_printk() when possible
PCI: Cleanup setup-bus.c comments and whitespace
PCI: imx6: Allow asynchronous probing
PCI: dwc: Save root bus for driver remove hooks
PCI: dwc: Use devm_pci_alloc_host_bridge() to simplify code
PCI: dwc: Free MSI in dw_pcie_host_init() error path
PCI: dwc: Free MSI IRQ page in dw_pcie_free_msi()
...
|
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Evan Green
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7235560ac7 |
platform/chrome: Add support for v1 of host sleep event
Add support in code for the new forms of the host sleep event. Detects the presence of this version of the command at runtime, and use whichever form the EC supports. At this time, always request the default timeout, and only report the failing response via a WARN_ONCE(). Future versions could accept the sleep parameter from outside the driver, and return the response information to usermode or elsewhere. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rajat Jain <rajatja@chromium.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
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Linus Torvalds
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47782361ac |
chrome platform changes for v5.2
CrOS EC: - Add EC host command support using rpmsg - Add new CrOS USB PD logging driver - Transfer spi messages at high priority - Add support to trace CrOS EC commands - Minor fixes and cleanups in protocol and debugfs Wilco EC: - Standardize Wilco EC mailbox interface - Add h1_gpio status to debugfs -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6gYDF28Li+nEiKLaHwn1ewov5lgFAlzV61YACgkQHwn1ewov 5lgEFw//S7GVmBrFxcqu5wAjF1CW+mOGi3y6nVuTAHanWG/hJGWT+itOwsdDp6c9 TggYgohprz64JAZOPqPCTonV/qbxgsfKrSQRxFDtHH4F1iEUF46fnlsULDKi8VwM Qzj4g4d//ePsOwHOsYVrbJRU2qKyF6Rm2hpOxKfI9u2Dv5fxLFu6fxUhrSq1Inr6 U67j7pxBwOnBtN2A6hMKHZaOUVkSNYT6azSPO3Z2YH0aky2Baxw/LPoRnbCNhwUQ iyneX5+K0wpCz2fpnBF/QSh1QBACeyfrO6HHA+flfaejhShaWttrS36Gar+sdHFN p6eeR1CoEJZbRY79Eetj8Cv5Be1ivVG/SC5JF4O1apAAn87wXLI6AaLG/03ul0vc KOkcjrXMxISRlAUr+OKD0rg3Uo2oI0ht70XMT9DDsCRNDoVHvkDQJNdkWrKq+E1c xL4YeLofZpcEN+Oe/WnwUZtYUdY3qcWs+C4hV+h0L0Ke5xir25DEUfF3j3J/uK2B JEgkTpH8j6YjbGAErBPkTxWt5HE3oWtkK4moPlrfPKfxoSo2eRDvqz68qHsgIn8p WBM+FSr+dQ7qyYDigMKrFSesiBpwCBI4lIgPxkvTxqbubaoZcsABHm3BUGjykXII E5z2qsgRnDrB+uGGDkTvDoR0Kr3U0hGlag7u/N61H86PoiMLUig= =NF5N -----END PGP SIGNATURE----- Merge tag 'tag-chrome-platform-for-v5.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux Pull chrome platform updates from Benson Leung: "CrOS EC: - Add EC host command support using rpmsg - Add new CrOS USB PD logging driver - Transfer spi messages at high priority - Add support to trace CrOS EC commands - Minor fixes and cleanups in protocol and debugfs Wilco EC: - Standardize Wilco EC mailbox interface - Add h1_gpio status to debugfs" * tag 'tag-chrome-platform-for-v5.2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: platform/chrome: cros_ec_proto: Add trace event to trace EC commands platform/chrome: cros_ec_debugfs: Use cros_ec_cmd_xfer_status helper platform/chrome: cros_ec: Add EC host command support using rpmsg platform/chrome: wilco_ec: Add h1_gpio status to debugfs platform/chrome: wilco_ec: Standardize mailbox interface platform/chrome: cros_ec_proto: check for NULL transfer function platform/chrome: Add CrOS USB PD logging driver platform/chrome: cros_ec_spi: Transfer messages at high priority platform/chrome: cros_ec_debugfs: no need to check return value of debugfs_create functions platform/chrome: cros_ec_debugfs: Remove dev_warn when console log is not supported |
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Kirill Smelkov
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c5bf68fe0c |
*: convert stream-like files from nonseekable_open -> stream_open
Using scripts/coccinelle/api/stream_open.cocci added in |
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Heiner Kallweit
|
3b9f900fa0 |
platform/chrome: chromeos_laptop: use pci_dev_id() helper
Use new helper pci_dev_id() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Benson Leung <bleung@chromium.org> |
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Raul E Rangel
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58a2109f6e |
platform/chrome: cros_ec_proto: Add trace event to trace EC commands
This is useful to see which EC commands are being executed and when.
To enable:
echo 1 > /sys/kernel/debug/tracing/events/cros_ec/enable
Example:
cros_ec_cmd: version: 0, command: EC_CMD_GET_VERSION
cros_ec_cmd: version: 0, command: EC_CMD_GET_PROTOCOL_INFO
cros_ec_cmd: version: 1, command: EC_CMD_GET_CMD_VERSIONS
cros_ec_cmd: version: 1, command: EC_CMD_USB_PD_CONTROL
The list of current commands is generated using the following script:
sed -n 's/^#define \(EC_CMD_[[:alnum:]_]*\)\s.*/\tTRACE_SYMBOL(\1),\\/p' include/linux/mfd/cros_ec_commands.h
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Ross Zwisler <zwisler@google.com>
Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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Enric Balletbo i Serra
|
81f6ec2333 |
platform/chrome: cros_ec_debugfs: Use cros_ec_cmd_xfer_status helper
This patch makes use of cros_ec_cmd_xfer_status() instead of cros_ec_cmd_xfer() so we can remove some redundant code. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> |
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Pi-Hsun Shih
|
2de89fd989 |
platform/chrome: cros_ec: Add EC host command support using rpmsg
Add EC host command support through rpmsg. Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
|
9e2b0e0be6 |
platform/chrome: wilco_ec: Add h1_gpio status to debugfs
As part of Chrome OS's FAFT (Fully Automated Firmware Testing) tests, we need to ensure that the H1 chip is properly setting some GPIO lines. The h1_gpio attribute exposes the state of the lines: - ENTRY_TO_FACT_MODE in BIT(0) - SPI_CHROME_SEL in BIT(1) There are two reasons that I am exposing this in debugfs, and not as a GPIO: 1. This is only useful for testing, so end users shouldn't ever care about this. In fact, if it passes the tests, then the value of h1_gpio will always be 2, so it would be really uninteresting for users. 2. This GPIO is not connected to, controlled by, or really even related to the AP. The GPIO runs between the EC and the H1 security chip. Changes in v4: - Use "0x02x\n" instead of "02x\n" for format string - Use DEFINE_DEBUGFS_ATTRIBUTE() - Add documentation Changes in v3: - Fix documentation to correspond with formatting change in v2. Changes in v2: - Zero out the unused fields in the request. - Format result as "%02x\n" instead of as a decimal. Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
|
14e14aaf61 |
platform/chrome: wilco_ec: Standardize mailbox interface
The current API for the wilco EC mailbox interface is bad. It assumes that most messages sent to the EC follow a similar structure, with a command byte in MBOX[0], followed by a junk byte, followed by actual data. This doesn't happen in several cases, such as setting the RTC time, using the raw debugfs interface, and reading or writing properties such as the Peak Shift policy (this last to be submitted soon). Similarly for the response message from the EC, the current interface assumes that the first byte of data is always 0, and the second byte is unused. However, in both setting and getting the RTC time, in the debugfs interface, and for reading and writing properties, this isn't true. The current way to resolve this is to use WILCO_EC_FLAG_RAW* flags to specify when and when not to skip these initial bytes in the sent and received message. They are confusing and used so much that they are normal, and not exceptions. In addition, the first byte of response in the debugfs interface is still always skipped, which is weird, since this raw interface should be giving the entire result. Additionally, sent messages assume the first byte is a command, and so struct wilco_ec_message contains the "command" field. In setting or getting properties however, the first byte is not a command, and so this field has to be filled with a byte that isn't actually a command. This is again inconsistent. wilco_ec_message contains a result field as well, copied from wilco_ec_response->result. The message result field should be removed: if the message fails, the cause is already logged, and the callers are alerted. They will never care about the actual state of the result flag. These flags and different cases make the wilco_ec_transfer() function, used in wilco_ec_mailbox(), really gross, dealing with a bunch of different cases. It's difficult to figure out what it is doing. Finally, making these assumptions about the structure of a message make it so that the messages do not correspond well with the specification for the EC's mailbox interface. For instance, this interface specification may say that MBOX[9] in the received message contains some information, but the calling code needs to remember that the first byte of response is always skipped, and because it didn't set the RESPONSE_RAW flag, the next byte is also skipped, so this information is actually contained within wilco_ec_message->response_data[7]. This makes it difficult to maintain this code in the future. To fix these problems this patch standardizes the mailbox interface by: - Removing the WILCO_EC_FLAG_RAW* flags - Removing the command and reserved_raw bytes from wilco_ec_request - Removing the mbox0 byte from wilco_ec_response - Simplifying wilco_ec_transfer() because of these changes - Gives the callers of wilco_ec_mailbox() the responsibility of exactly and consistently defining the structure of the mailbox request and response - Removing command and result from wilco_ec_message. This results in the reduction of total code, and makes it much more maintainable and understandable. Signed-off-by: Nick Crews <ncrews@chromium.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
|
|
Enrico Granata
|
94d4e7af14 |
platform/chrome: cros_ec_proto: check for NULL transfer function
As new transfer mechanisms are added to the EC codebase, they may not support v2 of the EC protocol. If the v3 initial handshake transfer fails, the kernel will try and call cmd_xfer as a fallback. If v2 is not supported, cmd_xfer will be NULL, and the code will end up causing a kernel panic. Add a check for NULL before calling the transfer function, along with a helpful comment explaining how one might end up in this situation. Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Guenter Roeck
|
a2679b6471 |
platform/chrome: Add CrOS USB PD logging driver
The CrOS USB PD logging feature is logically separate functionality of the charge manager, hence has its own driver. The driver logs the event data for the USB PD charger available in some ChromeOS Embedded Controllers. Signed-off-by: Guenter Roeck <groeck@chromium.org> [remove macro to APPEND_STRING and minor cleanups] Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Douglas Anderson
|
37a186225a |
platform/chrome: cros_ec_spi: Transfer messages at high priority
The software running on the Chrome OS Embedded Controller (cros_ec)
handles SPI transfers in a bit of a wonky way. Specifically if the EC
sees too long of a delay in a SPI transfer it will give up and the
transfer will be counted as failed. Unfortunately the timeout is
fairly short, though the actual number may be different for different
EC codebases.
We can end up tripping the timeout pretty easily if we happen to
preempt the task running the SPI transfer and don't get back to it for
a little while.
Historically this hasn't been a _huge_ deal because:
1. On old devices Chrome OS used to run PREEMPT_VOLUNTARY. That meant
we were pretty unlikely to take a big break from the transfer.
2. On recent devices we had faster / more processors.
3. Recent devices didn't use "cros-ec-spi-pre-delay". Using that
delay makes us more likely to trip this use case.
4. For whatever reasons (I didn't dig) old kernels seem to be less
likely to trip this.
5. For the most part it's kinda OK if a few transfers to the EC fail.
Mostly we're just polling the battery or doing some other task
where we'll try again.
Even with the above things, this issue has reared its ugly head
periodically. We could solve this in a nice way by adding reliable
retries to the EC protocol [1] or by re-designing the code in the EC
codebase to allow it to wait longer, but that code doesn't ever seem
to get changed. ...and even if it did, it wouldn't help old devices.
It's now time to finally take a crack at making this a little better.
This patch isn't guaranteed to make every cros_ec SPI transfer
perfect, but it should improve things by a few orders of magnitude.
Specifically you can try this on a rk3288-veyron Chromebook (which is
slower and also _does_ need "cros-ec-spi-pre-delay"):
md5sum /dev/zero &
md5sum /dev/zero &
md5sum /dev/zero &
md5sum /dev/zero &
while true; do
cat /sys/class/power_supply/sbs-20-000b/charge_now > /dev/null;
done
...before this patch you'll see boatloads of errors. After this patch I
don't see any in the testing I did.
The way this patch works is by effectively boosting the priority of
the cros_ec transfers. As far as I know there is no simple way to
just boost the priority of the current process temporarily so the way
we accomplish this is by queuing the work on the system_highpri_wq.
NOTE: this patch relies on the fact that the SPI framework attempts to
push the messages out on the calling context (which is the one that is
boosted to high priority). As I understand from earlier (long ago)
discussions with Mark Brown this should be a fine assumption. Even if
it isn't true sometimes this patch will still not make things worse.
[1] https://crbug.com/678675
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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Enric Balletbo i Serra
|
b18e606ff3 |
platform/chrome: cros_ec_debugfs: no need to check return value of debugfs_create functions
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> |
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Enric Balletbo i Serra
|
e43c426a77 |
platform/chrome: cros_ec_debugfs: Remove dev_warn when console log is not supported
If the debugfs interface is enabled, every time a CrOS device is instantiated a warning like this can appear for every probed device. "device does not support reading the console log" The warning message adds nothing, rather it is source of confusion as this is expected on some cases. For example, on Samus, that has a cros-ec and a cros-pd instance the message appears twice, and I suspect this will happen also on those devices that has a non-standard EC. If the command is not supported just return silently and don't print the warning, otherwise the code will already print an error. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> |
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Guenter Roeck
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57aeef7f7a
|
platform/chrome: cros_ec_debugfs: cancel/schedule logging work only if supported
The following traceback was reported on ASUS C201, which does not support
console logging.
------------[ cut here ]------------
WARNING: CPU: 2 PID: 361 at kernel/workqueue.c:3030 __flush_work+0x38/0x154
Modules linked in: snd_soc_hdmi_codec cros_ec_debugfs cros_ec_sysfs uvcvideo dw_hdmi_cec dw_hdmi_i2s_audio videobuf2_vmalloc cfg80211 gpio_charger rk_crypto rfkill videobuf2_memops videobuf2_v4l2 des_generic videobuf2_common ofpart m25p80 spi_nor tpm_i2c_infineon sbs_battery mtd tpm joydev cros_ec_dev coreboot_table evdev mousedev ip_tables x_tables [last unloaded: brcmutil]
CPU: 2 PID: 361 Comm: systemd-sleep Not tainted 5.1.0-rc1-1-ARCH+ #1
Hardware name: Rockchip (Device Tree)
[<c020e4b0>] (unwind_backtrace) from [<c020ac18>] (show_stack+0x10/0x14)
[<c020ac18>] (show_stack) from [<c07a3e04>] (dump_stack+0x7c/0x9c)
[<c07a3e04>] (dump_stack) from [<c0222748>] (__warn+0xd0/0xec)
[<c0222748>] (__warn) from [<c022279c>] (warn_slowpath_null+0x38/0x44)
[<c022279c>] (warn_slowpath_null) from [<c02365d0>] (__flush_work+0x38/0x154)
[<c02365d0>] (__flush_work) from [<c023786c>] (__cancel_work_timer+0x114/0x1a4)
[<c023786c>] (__cancel_work_timer) from [<bf33233c>] (cros_ec_debugfs_suspend+0x14/0x1c [cros_ec_debugfs])
[<bf33233c>] (cros_ec_debugfs_suspend [cros_ec_debugfs]) from [<c056a888>] (dpm_run_callback+0x64/0xcc)
[<c056a888>] (dpm_run_callback) from [<c056ad2c>] (__device_suspend+0x174/0x3a8)
[<c056ad2c>] (__device_suspend) from [<c056b9e0>] (dpm_suspend+0x174/0x1e0)
[<c056b9e0>] (dpm_suspend) from [<c026b3e0>] (suspend_devices_and_enter+0x6c/0x50c)
[<c026b3e0>] (suspend_devices_and_enter) from [<c026ba8c>] (pm_suspend+0x20c/0x274)
[<c026ba8c>] (pm_suspend) from [<c026a628>] (state_store+0x54/0x88)
[<c026a628>] (state_store) from [<c03cd2d0>] (kernfs_fop_write+0x114/0x180)
[<c03cd2d0>] (kernfs_fop_write) from [<c035d48c>] (__vfs_write+0x1c/0x154)
[<c035d48c>] (__vfs_write) from [<c035f9e8>] (vfs_write+0xb8/0x198)
[<c035f9e8>] (vfs_write) from [<c035fbc0>] (ksys_write+0x3c/0x74)
[<c035fbc0>] (ksys_write) from [<c0201000>] (ret_fast_syscall+0x0/0x4c)
Exception stack(0xe9365fa8 to 0xe9365ff0)
5fa0: 00000004 beef8b28 00000004 beef8b28 00000004 00000000
5fc0: 00000004 beef8b28 02319170 00000004 beef8b28 00000004 b6f3d900 beef8b74
5fe0: 0000006c beef8a98 b6c0adac b6c66534
---[ end trace f4ee5df14e8ea0ec ]---
If console logging is not supported, the work structure is never
initialized, resulting in the traceback. Calling cancel/schedule functions
conditionally fixes the problem.
While at it, also fix error handling in the probe function.
Reported-by: Urja Rannikko <urjaman@gmail.com>
Cc: Urja Rannikko <urjaman@gmail.com>
Fixes:
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|
|
Nick Crews
|
6f8f89ce1e
|
platform/chrome: Fix locking pattern in wilco_ec_mailbox()
Before, ec->data_buffer could be written to from multiple
contexts at the same time. Since the ec is shared data,
it needs to be inside the mutex as well.
Fixes:
|
|
|
Arnd Bergmann
|
2794449576 |
platform/chrome: fix wilco-ec dependencies
When CROS_EC_LPC is set to =m, we get a link failure for a
builtin wilco-ec module:
drivers/platform/chrome/wilco_ec/core.o: In function `wilco_ec_remove':
core.c:(.text+0x26): undefined reference to `cros_ec_lpc_mec_destroy'
drivers/platform/chrome/wilco_ec/core.o: In function `wilco_ec_probe':
core.c:(.text+0x18c): undefined reference to `cros_ec_lpc_mec_init'
core.c:(.text+0x224): undefined reference to `cros_ec_lpc_mec_destroy'
drivers/platform/chrome/wilco_ec/mailbox.o: In function `wilco_ec_mailbox':
mailbox.c:(.text+0x104): undefined reference to `cros_ec_lpc_io_bytes_mec'
The problem with the existing CROS_EC_LPC_MEC dependency is that this
is only for a 'bool' symbol, so the information about the exported
functions being in a module is lost on the way, and we actually have
to depend on both CROS_EC_LPC and CROS_EC_LPC_MEC.
Fixes:
|
|
|
Nick Crews
|
0d2f2a3da1 |
platform/chrome: wilco_ec: Add RTC driver
This Embedded Controller has an internal RTC that is exposed as a standard RTC class driver with read/write functionality. The driver is added to the drivers/rtc/ so that the maintainer of that directory will be able to comment on this change, as that maintainer is the expert on this system. In addition, the driver code is called indirectly after a corresponding device is registered from core.c, as opposed to core.c registering the driver callbacks directly. To test: > hwclock --show --rtc /dev/rtc1 2007-12-31 16:01:20.460959-08:00 > hwclock --systohc --rtc /dev/rtc1 > hwclock --show --rtc /dev/rtc1 2018-11-29 17:08:00.780793-08:00 > hwclock --show --rtc /dev/rtc1 2007-12-31 16:01:20.460959-08:00 > hwclock --systohc --rtc /dev/rtc1 > hwclock --show --rtc /dev/rtc1 2018-11-29 17:08:00.780793-08:00 Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Nick Crews <ncrews@chromium.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [Fix the sparse warning: symbol 'wilco_ec_rtc_read/write' was not declared] Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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b787bb126c |
platform/chrome: wilco_ec: Add support for raw commands in debugfs
Add a debugfs attribute that allows sending raw commands to the EC. This is useful for development and debug but should not be enabled in a production environment. To test: Get the EC firmware build date First send the request command > echo 00 f0 38 00 03 00 > raw Then read the result. "12/21/18" is in the middle of the response > cat raw 00 31 32 2f 32 31 2f 31 38 00 00 0f 01 00 01 00 .12/21/18....... Get the EC firmware build date First send the request command > echo 00 f0 38 00 03 00 > raw Then read the result. "12/21/18" is in the middle of the response > cat raw 00 31 32 2f 32 31 2f 31 38 00 00 0f 01 00 01 00 .12/21/18....... Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Nick Crews <ncrews@chromium.org> [Fix off-by-one error in wilco_ec/debugfs.c] Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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7b3d4f44ab |
platform/chrome: Add new driver for Wilco EC
This EC is an incompatible variant of the typical Chrome OS embedded controller. It uses the same low-level communication and a similar protocol with some significant differences. The EC firmware does not support the same mailbox commands so it is not registered as a cros_ec device type. This commit exports the wilco_ec_mailbox() function so that other modules can use it to communicate with the EC. Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Nick Crews <ncrews@chromium.org> [Fix the sparse warning: symbol 'wilco_ec_transfer' was not declared] Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> [Fix Kconfig dependencies for wilco_ec] Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Nick Crews
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6b7cb2227d |
platform/chrome: cros_ec: Remove cros_ec dependency in lpc_mec
In order to allow this code to be re-used, remove the dependency on the rest of the cros_ec code from the cros_ec_lpc_mec functions. Instead of using a hardcoded register base address of 0x800 have this be passed in to cros_ec_lpc_mec_init(). The existing cros_ec use case now passes in the 0x800 base address this way. There are some error checks that happen in cros_ec_lpc_mec_in_range() that probably shouldn't be there, as they are checking kernel-space callers and not user-space input. However, we'll just do the refactor in this patch, and in a future patch might remove this error checking and fix all the instances of code that calls this. There's a similar problem in cros_ec_lpc_read_bytes(), where we return a checksum, but on error just return 0. This should probably be changed so that it returns int, but we don't want to have to mess with all the calling code for this fix. Maybe we'll come back through later and fix this. Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Nick Crews <ncrews@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
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Enric Balletbo i Serra
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73c935de7f |
platform/chrome: cros_ec_sysfs: remove pr_fmt() define
This driver no longer has any pr_{level} messages. Remove the pr_fmt().
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
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Enric Balletbo i Serra
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d6c7901ba8 |
platform/chrome: cros_ec_lightbar: remove pr_fmt() define
This driver no longer has any pr_{level} messages. Remove the pr_fmt().
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
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Enric Balletbo i Serra
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0e27a11f32 |
platform/chrome: cros_kbd_led_backlight: switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management. Also change the term 'Chrome OS' for 'ChromeOS' to be coherent with other drivers. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> |
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Enric Balletbo i Serra
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30fc9147ae |
platform/chrome: cros_ec_spi: switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management. Also change the description for one more appropriate. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> |