Commit Graph

944844 Commits

Author SHA1 Message Date
Linus Torvalds f8851cb2d0 17ed808ad2 ("EDAC: Fix reference count leaks")
e370f886fe ("EDAC: Remove edac_get_dimm_by_index()")
 b9cae27728 ("EDAC/ghes: Scan the system once on driver init")
 b001694d60 ("EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to ghes_pvt")
 cb51a371d0 ("EDAC/ghes: Setup DIMM label from DMI and use it in error reports")
 8807e15597 ("EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurations")
 e9ff6636d3 ("EDAC/mc: Call edac_inc_ue_error() before panic")
 30bf38e434 ("EDAC, pnd2: Set MCE_PRIO_EDAC priority for pnd2_mce_dec notifier")
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Merge tag 'edac_updates_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

Pull EDAC updates from Tony Luck:
 "Boris is on vacation and aske me to send you the EDAC changes"

* tag 'edac_updates_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC: Fix reference count leaks
  EDAC: Remove edac_get_dimm_by_index()
  EDAC/ghes: Scan the system once on driver init
  EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to ghes_pvt
  EDAC/ghes: Setup DIMM label from DMI and use it in error reports
  EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurations
  EDAC/mc: Call edac_inc_ue_error() before panic
  EDAC, pnd2: Set MCE_PRIO_EDAC priority for pnd2_mce_dec notifier
2020-08-03 20:01:00 -07:00
Linus Torvalds d4db4e5532 ARM: new SoC support for v5.9
There are three SoC families newly dded to the 32-bit and
 64-bit Arm architecture code in the kernel this time:
 
  - Daniel Palmer adds initial support for two chips made by MStar, a
    taiwanese SoC manufacturer that became part of Mediatek in 2012. For
    now, the added support is fairly minimal, with just two of its
    Cortex-A7 based 32-bit camera chips getting support for a limited
    set of on-chip peripherals.
 
  - Lars Povlsen from Microchip adds support for their new Sparx5
    family of ethernet switch chips using 64-bit Cortex-A53 cores.
    These are descended from earlier VSC7xxx SparX and Ocelot chips
    using 32-bit MIPS cores.
 
  - Daniele Alessandrelli from Intel adds support for the new Keem Bay
    SoC for computer vision, built around a Movidius VPU with Linux
    running on Arm Cortex-A53 cores.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new ARM SoC support from Arnd Bergmann:
 "There are three SoC families newly dded to the 32-bit and 64-bit Arm
  architecture code in the kernel this time:

   - Daniel Palmer adds initial support for two chips made by MStar, a
     taiwanese SoC manufacturer that became part of Mediatek in 2012.

     For now, the added support is fairly minimal, with just two of its
     Cortex-A7 based 32-bit camera chips getting support for a limited
     set of on-chip peripherals.

   - Lars Povlsen from Microchip adds support for their new Sparx5
     family of ethernet switch chips using 64-bit Cortex-A53 cores.

     These are descended from earlier VSC7xxx SparX and Ocelot chips
     using 32-bit MIPS cores.

   - Daniele Alessandrelli from Intel adds support for the new Keem Bay
     SoC for computer vision, built around a Movidius VPU with Linux
     running on Arm Cortex-A53 cores"

* tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
  ARM: mstar: Correct the compatible string for pmsleep
  dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep
  dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep
  ARM: mstar: Add reboot support
  ARM: mstar: Add "pmsleep" node to base dtsi
  ARM: mstar: Add PMU
  ARM: mstar: Adjust IMI size for infinity3
  ARM: mstar: Adjust IMI size for mercury5
  ARM: mstar: Adjust IMI size of infinity
  ARM: mstar: Add IMI SRAM region
  dt-bindings: arm: mstar: Move existing MStar binding descriptions
  dt-bindings: arm: mstar: Add binding details for mstar, pmsleep
  ARM: mstar: Fix dts filename for 70mai midrive d08
  ARM: mstar: Add dts for 70mai midrive d08
  ARM: mstar: Add dts for msc313(e) based BreadBee boards
  ARM: mstar: Add mercury5 series dtsis
  ARM: mstar: Add infinity/infinity3 family dtsis
  ARM: mstar: Add Armv7 base dtsi
  ARM: mstar: Add binding details for mstar,l3bridge
  ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs
  ...
2020-08-03 19:38:30 -07:00
Linus Torvalds 822ef14e9d ARM: SoC driver updates for v5.9
A couple of subsystems have their own subsystem maintainers but choose
 to have the code merged through the soc tree as upstream, as the code
 tends to be used across multiple SoCs or has SoC specific drivers itself:
 
  - memory controllers:
      Krzysztof Kozlowski takes ownership of the drivers/memory
      subsystem and its drivers, starting out with a set of cleanup
      patches.
      A larger driver for the Tegra memory controller that was accidentally
      missed for v5.8 is now added.
 
  - reset controllers:
      Only minor updates to drivers/reset this time
 
  - firmware:
      The "turris mox" firmware driver gains support for signed firmware blobs
      The tegra firmware driver gets extended to export some debug information
      Various updates to i.MX firmware drivers, mostly cosmetic
 
  - ARM SCMI/SCPI:
      A new mechanism for platform notifications is added, among a number
      of minor changes.
 
  - optee:
      Probing of the TEE bus is rewritten to better support detection of
      devices that depend on the tee-supplicant user space.
      A new firmware based trusted platform module (fTPM) driver is added
      based on OP-TEE
 
  - SoC attributes:
      A new driver is added to provide a generic soc_device for identifying
      a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
      by probing SoC family specific registers.
      The series also contains some cleanups to the common soc_device code.
 
 There are also a number of updates to SoC specific drivers,
 the main ones are:
 
  - Mediatek cmdq driver gains a few in-kernel interfaces
 
  - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
    support for additional SoC variants
 
  - The Qualcomm GENI core code gains interconnect path voting and
    performance level support, and integrating this into a number of
    device drivers.
 
  - A new driver for Samsung Exynos5800 voltage coupler for
 
  - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
    specific device drivers
 
  - Updates to the TI K3 Ring Accelerator driver
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Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A couple of subsystems have their own subsystem maintainers but choose
  to have the code merged through the soc tree as upstream, as the code
  tends to be used across multiple SoCs or has SoC specific drivers
  itself:

   - memory controllers:

     Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
     and its drivers, starting out with a set of cleanup patches.

     A larger driver for the Tegra memory controller that was
     accidentally missed for v5.8 is now added.

   - reset controllers:

     Only minor updates to drivers/reset this time

   - firmware:

     The "turris mox" firmware driver gains support for signed firmware
     blobs The tegra firmware driver gets extended to export some debug
     information Various updates to i.MX firmware drivers, mostly
     cosmetic

   - ARM SCMI/SCPI:

     A new mechanism for platform notifications is added, among a number
     of minor changes.

   - optee:

     Probing of the TEE bus is rewritten to better support detection of
     devices that depend on the tee-supplicant user space. A new
     firmware based trusted platform module (fTPM) driver is added based
     on OP-TEE

   - SoC attributes:

     A new driver is added to provide a generic soc_device for
     identifying a machine through the SMCCC ARCH_SOC_ID firmware
     interface rather than by probing SoC family specific registers.

     The series also contains some cleanups to the common soc_device
     code.

  There are also a number of updates to SoC specific drivers, the main
  ones are:

   - Mediatek cmdq driver gains a few in-kernel interfaces

   - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
     support for additional SoC variants

   - The Qualcomm GENI core code gains interconnect path voting and
     performance level support, and integrating this into a number of
     device drivers.

   - A new driver for Samsung Exynos5800 voltage coupler for

   - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
     specific device drivers

   - Updates to the TI K3 Ring Accelerator driver"

* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  memory: jz4780_nemc: Only request IO memory the driver will use
  soc: qcom: pdr: Reorder the PD state indication ack
  MAINTAINERS: Add Git repository for memory controller drivers
  memory: brcmstb_dpfe: Fix language typo
  memory: samsung: exynos5422-dmc: Correct white space issues
  memory: samsung: exynos-srom: Correct alignment
  memory: pl172: Enclose macro argument usage in parenthesis
  memory: of: Correct kerneldoc
  memory: omap-gpmc: Fix language typo
  memory: omap-gpmc: Correct white space issues
  memory: omap-gpmc: Use 'unsigned int' for consistency
  memory: omap-gpmc: Enclose macro argument usage in parenthesis
  memory: omap-gpmc: Correct kerneldoc
  memory: mvebu-devbus: Align with open parenthesis
  memory: mvebu-devbus: Add missing braces to all arms of if statement
  memory: bt1-l2-ctl: Add blank lines after declarations
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  ...
2020-08-03 19:30:59 -07:00
Linus Torvalds 6ce076f415 ARM: SoC changes for v5.9
These are mostly cosmetic changes and minor bugfixes for the SoC
 specific code, across the 32-bit at91, mvebu, davinci, samsung, and
 omap platforms.
 
 The main notable changes are for the Samsung Exynos platform, which
 sees a rewrite of gpio handling and a change to restore and adds
 a workaround for a problem with cpuidle support.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "These are mostly cosmetic changes and minor bugfixes for the SoC
  specific code, across the 32-bit at91, mvebu, davinci, samsung, and
  omap platforms.

  The main notable changes are for the Samsung Exynos platform, which
  sees a rewrite of gpio handling and a change to restore and adds a
  workaround for a problem with cpuidle support"

* tag 'arm-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()
  MAINTAINERS: arm/amlogic: add designated reviewers
  ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()'
  ARM: davinci: Fix trivial spelling
  ARM: davinci: Replace HTTP links with HTTPS ones
  ARM: s3c24xx: Replace HTTP links with HTTPS ones
  ARM: orion/gpio: Make use of for_each_requested_gpio()
  ARM: at91: Replace HTTP links with HTTPS ones
  ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()
  ARM: rpc: Change blacklist to quirklist in ecode.c file
  ARM: OMAP: Replace HTTP links with HTTPS ones
  ARM: s3c24xx: leds: Convert to use GPIO descriptors
  udc: lpc32xx: mark local function static
  ARM: exynos: MCPM: Restore big.LITTLE cpuidle support
  ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val
2020-08-03 19:24:55 -07:00
Linus Torvalds 2f3fbfdaf7 ARM: SoC DT changes for 5.9
As usual, there are many patches addressing minor issues in existing
 DTS files, such as DTC warnings, or adding support for additional
 peripherals.
 
 There are three added SoCs in existing product families:
 
  - Amazon:
     Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
     otherwise known as AL73400 or first-generation Graviton, and following
     the already supported Cortex-A1`5 and Cortex-A57 based Alpine chips.
     This one is added together with the official Evaluation platform.
 
  - Qualcomm:
     The Snapdragon SDM630 platform is a family of mid-range mobile phone
     chips from 2017 based on Cortex-A53 or Kryo 260 CPUs.
     A total of five end-user products are added based on these, all
     Android phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and
     XA2 Ultra.
 
  - Renesas:
     RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
     family, and apparently closely related to the RZ/G2N and RZ/G2M
     models we already support but has a faster GPU and additional
     on-chip peripherals.
     It is added along with the HopeRun HiHope RZ/G2H development board
 
 A small number of new boards for already supported SoCs also debut:
 
  - Allwinner sunxi:
     Only one new machine, revision v1.2 of the Pine64 PinePhone
     (non-Android) smartphone, containing minor changes compared to
     earlier versions.
 
  - Amlogic Meson:
     WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
 
  - Aspeed:
     EthanolX is AMD's EPYC data center rerence platform, using an
     ASpeed AST2600 baseboard management controller.
 
  - Mediatek:
     Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook
     based on the MT8183 (Helio P60t) SoC.
 
  - Nvidia Tegra:
     ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
     tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
     Thanks to PostmarketOS, these can now run mainline kernels
     and become useful again.
 
     The Jetson Xavier NX Developer Kit uses a SoM and carrier board
     for the Tegra194, their latest 64-bit chip based on Carmel CPU
     cores and Volta graphics.
 
  - NXP i.MX:
     Five new boards based on the 32-bit i.MX6 series are added:
     The MYiR MYS-6ULX single-board computer, and four different
     models of industrial computers from Protonic.
 
  - Qualcomm:
     MikroTik RouterBoard 3011 is a rackmounted router based on the
     32-bit IPQ8064 networking SoC
     Three older phones get added, the Snapdragon 808 (msm8992) based
     Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
     Windows Phone, and the Snapdragon 810 (msm8994) based Sony
     Xperia Z5.
 
  - Renesas:
     In addition to the HiHope RZ/G2H board mentioned above, we gain
     support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
     RZ/G2N reference boards.
     Beacon EmbeddedWorks adds another SoM+Carrier development board
     for RZ/G2M.
 
  - Rockchips:
     Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it
     is based on, using the high-end 32-bit rk3288 SoC.
 
 Notable updates to existing platforms are usually for added on-chip
 peripherals, including:
 
  - ASpeed AST2xxx (various)
 
  - Allwinner (cpufreq, thermal, Pinephone touchscreen)
 
  - Amlogic Meson (audio, gpu dvdfs, board updates)
 
  - Arm Versatile
 
  - Broadcom (board updates for switch ports, Raspberry pi clock updates)
 
  - Hisilicon (various)
 
  - Intel/Altera SoCFPGA (various)
 
  - Marvell Armada 7xxx/8xxx (smmu)
 
  - Marvell MMP (GPU on mmp2/mmp3)
 
  - Mediatek mt8183 (USB, pericfg)
 
  - NXP Layerscape (VPU, thermal, DSPI)
 
  - NXP i.MX (VPU, bindings, board updates)
 
  - Nvidia Tegra194 (GPU)
 
  - Qualcomm (GPU, Interconnect, ...)
 
  - Renesas R-Car (SPI, IPMMU, board updates)
 
  - STMicroelectronics STM32 (various)
 
  - Samsung Exynos (various)
 
  - Socionext Uniphier (updates to serial, and pcie)
 
  - TI K3 (serdes, usb3, audio, sd, chipid)
 
  - TI OMAP (IPU/DSP remoteproc changes, dropping platform data)
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, there are many patches addressing minor issues in existing
  DTS files, such as DTC warnings, or adding support for additional
  peripherals.

  There are three added SoCs in existing product families:

   - Amazon:

     Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
     otherwise known as AL73400 or first-generation Graviton, and
     following the already supported Cortex-A1`5 and Cortex-A57 based
     Alpine chips. This one is added together with the official
     Evaluation platform.

   - Qualcomm:

     The Snapdragon SDM630 platform is a family of mid-range mobile
     phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total
     of five end-user products are added based on these, all Android
     phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra.

   - Renesas:

     RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
     family, and apparently closely related to the RZ/G2N and RZ/G2M
     models we already support but has a faster GPU and additional
     on-chip peripherals. It is added along with the HopeRun HiHope
     RZ/G2H development board

  A small number of new boards for already supported SoCs also debut:

   - Allwinner sunxi:

     Only one new machine, revision v1.2 of the Pine64 PinePhone
     (non-Android) smartphone, containing minor changes compared to
     earlier versions.

   - Amlogic Meson:

     WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box

   - Aspeed:

     EthanolX is AMD's EPYC data center rerence platform, using an
     ASpeed AST2600 baseboard management controller.

   - Mediatek:

     Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based
     on the MT8183 (Helio P60t) SoC.

   - Nvidia Tegra:

     ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
     tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
     Thanks to PostmarketOS, these can now run mainline kernels and
     become useful again.

     The Jetson Xavier NX Developer Kit uses a SoM and carrier board for
     the Tegra194, their latest 64-bit chip based on Carmel CPU cores
     and Volta graphics.

   - NXP i.MX:

     Five new boards based on the 32-bit i.MX6 series are added: The
     MYiR MYS-6ULX single-board computer, and four different models of
     industrial computers from Protonic.

   - Qualcomm:

     MikroTik RouterBoard 3011 is a rackmounted router based on the
     32-bit IPQ8064 networking SoC

     Three older phones get added, the Snapdragon 808 (msm8992) based
     Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
     Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia
     Z5.

   - Renesas:

     In addition to the HiHope RZ/G2H board mentioned above, we gain
     support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
     RZ/G2N reference boards. Beacon EmbeddedWorks adds another
     SoM+Carrier development board for RZ/G2M.

   - Rockchips:

     Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is
     based on, using the high-end 32-bit rk3288 SoC.

  Notable updates to existing platforms are usually for added on-chip
  peripherals, including:

   - ASpeed AST2xxx (various)

   - Allwinner (cpufreq, thermal, Pinephone touchscreen)

   - Amlogic Meson (audio, gpu dvdfs, board updates)

   - Arm Versatile

   - Broadcom (board updates for switch ports, Raspberry pi clock updates)

   - Hisilicon (various)

   - Intel/Altera SoCFPGA (various)

   - Marvell Armada 7xxx/8xxx (smmu)

   - Marvell MMP (GPU on mmp2/mmp3)

   - Mediatek mt8183 (USB, pericfg)

   - NXP Layerscape (VPU, thermal, DSPI)

   - NXP i.MX (VPU, bindings, board updates)

   - Nvidia Tegra194 (GPU)

   - Qualcomm (GPU, Interconnect, ...)

   - Renesas R-Car (SPI, IPMMU, board updates)

   - STMicroelectronics STM32 (various)

   - Samsung Exynos (various)

   - Socionext Uniphier (updates to serial, and pcie)

   - TI K3 (serdes, usb3, audio, sd, chipid)

   - TI OMAP (IPU/DSP remoteproc changes, dropping platform data)"

* tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits)
  arm64: dts: meson: odroid-n2: add jack audio output support
  arm64: dts: meson: odroid-n2: enable audio loopback
  ARM: dts: berlin: Align L2 cache-controller nodename with dtschema
  arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
  arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
  arm64: dts: qcom: msm8992: Add RPMCC node
  arm64: dts: qcom: msm8992: Add PSCI support.
  arm64: dts: qcom: msm8992: Add PMU node
  arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
  arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
  arm64: dts: qcom: msm8992: Add a SCM node
  arm64: dts: qcom: msm8992: Add a proper CPU map
  arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
  arm64: dts: qcom: bullhead: Add qcom,msm-id
  arm64: dts: qcom: msm8992: Fix SDHCI1
  arm64: dts: qcom: msm8992: Modernize the DTS style
  arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
  arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
  arm64: dts: qcom: msm8994: Add support for SMD RPM
  arm64: dts: qcom: msm8992: Add a label to rpm-requests
  ...
2020-08-03 19:19:34 -07:00
Linus Torvalds 92c59e126b ARM: defconfig updates for 5.9
These are the usual updates to arm/arm64 defconfig files,
 enabling newly added drivers and addressing changes to Kconfig
 files.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM defconfig updates from Arnd Bergmann:
 "These are the usual updates to arm/arm64 defconfig files, enabling
  newly added drivers and addressing changes to Kconfig files"

* tag 'arm-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
  ARM: configs: at91: sama5: enable CAN PLATFORM driver
  ARM: configs: at91: sama5: enable bridge and VLAN filtering
  ARM: configs: at91: sama5: add support for KSZ ethernet switches
  arm64: defconfig: Enable AM654x SDHCI controller
  arm64: arch_k3: enable chipid driver
  arm/arm64: defconfig: Update configs to use the new CROS_EC options
  ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500
  ARM: tegra: Enable CPUFREQ userspace governor
  arm64: defconfig: enable CONFIG_FSL_ENETC_QOS
  arm64: defconfig: enable TSN features for ENETC and similiar hardware
  ARM: imx_v6_v7_defconfig: Support i.MX8MM
  arm64: defconfig: enable RTC and audio support on Kontron sl28 boards
  arm64: defconfig: add pca9450 pmic driver
  ARM: configs: sunxi: Enable crypto related options
  ARM: sunxi: configs: Enable the Mailbox driver
  ARM: configs: sunxi: Enable the PS/2 controller
  ARM: configs: sunxi: Enable Lima
  ARM: configs: sunxi: Add DRM output-related options
  ARM: configs: sunxi: Enable ASoC options
  ARM: configs: sunxi: Enable Cedrus
  ...
2020-08-03 19:17:58 -07:00
David S. Miller da7955405f sfc: Fix build with CONFIG_RFS_ACCEL disabled.
drivers/net/ethernet/sfc/ef100_nic.c:835:3: error: 'const struct efx_nic_type' has no member named 'filter_rfs_expire_one'
     835 |  .filter_rfs_expire_one = efx_mcdi_filter_rfs_expire_one,
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/net/ethernet/sfc/ef100_nic.c:835:27: error: initialization of 'void (*)(struct efx_nic *, u32)' {aka 'void (*)(struct efx_nic *, unsigned int)'} from incompatible pointer type 'bool (*)(struct efx_nic *, u32,  unsigned int)' {aka '_Bool (*)(struct efx_nic *, unsigned int,  unsigned int)'} [-Werror=incompatible-pointer-types]
     835 |  .filter_rfs_expire_one = efx_mcdi_filter_rfs_expire_one,
         |                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:29:39 -07:00
David S. Miller 2e7199bd77 Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Daniel Borkmann says:

====================
pull-request: bpf-next 2020-08-04

The following pull-request contains BPF updates for your *net-next* tree.

We've added 73 non-merge commits during the last 9 day(s) which contain
a total of 135 files changed, 4603 insertions(+), 1013 deletions(-).

The main changes are:

1) Implement bpf_link support for XDP. Also add LINK_DETACH operation for the BPF
   syscall allowing processes with BPF link FD to force-detach, from Andrii Nakryiko.

2) Add BPF iterator for map elements and to iterate all BPF programs for efficient
   in-kernel inspection, from Yonghong Song and Alexei Starovoitov.

3) Separate bpf_get_{stack,stackid}() helpers for perf events in BPF to avoid
   unwinder errors, from Song Liu.

4) Allow cgroup local storage map to be shared between programs on the same
   cgroup. Also extend BPF selftests with coverage, from YiFei Zhu.

5) Add BPF exception tables to ARM64 JIT in order to be able to JIT BPF_PROBE_MEM
   load instructions, from Jean-Philippe Brucker.

6) Follow-up fixes on BPF socket lookup in combination with reuseport group
   handling. Also add related BPF selftests, from Jakub Sitnicki.

7) Allow to use socket storage in BPF_PROG_TYPE_CGROUP_SOCK-typed programs for
   socket create/release as well as bind functions, from Stanislav Fomichev.

8) Fix an info leak in xsk_getsockopt() when retrieving XDP stats via old struct
   xdp_statistics, from Peilin Ye.

9) Fix PT_REGS_RC{,_CORE}() macros in libbpf for MIPS arch, from Jerry Crunchtime.

10) Extend BPF kernel test infra with skb->family and skb->{local,remote}_ip{4,6}
    fields and allow user space to specify skb->dev via ifindex, from Dmitry Yakunin.

11) Fix a bpftool segfault due to missing program type name and make it more robust
    to prevent them in future gaps, from Quentin Monnet.

12) Consolidate cgroup helper functions across selftests and fix a v6 localhost
    resolver issue, from John Fastabend.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:27:40 -07:00
David S. Miller 76769c38b4 mlx5-updates-2020-08-03
This patchset introduces some updates to mlx5 driver.
 
 1) Jakub converts mlx5 to use the new udp tunnel infrastructure.
    Starting with a hack to allow drivers to request a static configuration
    of the default vxlan port, and then a patch that converts mlx5.
 
 2) Parav implements change_carrier ndo for VF eswitch representors,
    to speedup link state control of representors netdevices.
 
 3) Alex Vesker, makes a simple update to software steering to fix an issue
    with push vlan action sequence
 
 4) Leon removes a redundant dump stack on error flow.
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Merge tag 'mlx5-updates-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

Saeed Mahameed says:

====================
mlx5-updates-2020-08-03

This patchset introduces some updates to mlx5 driver.

1) Jakub converts mlx5 to use the new udp tunnel infrastructure.
   Starting with a hack to allow drivers to request a static configuration
   of the default vxlan port, and then a patch that converts mlx5.

2) Parav implements change_carrier ndo for VF eswitch representors,
   to speedup link state control of representors netdevices.

3) Alex Vesker, makes a simple update to software steering to fix an issue
   with push vlan action sequence

4) Leon removes a redundant dump stack on error flow.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:24:30 -07:00
David S. Miller c4b83061dc Merge branch 'sfc-driver-for-EF100-family-NICs-part-2'
Edward Cree says:

====================
sfc: driver for EF100 family NICs, part 2

This series implements the data path and various other functionality
 for Xilinx/Solarflare EF100 NICs.

Changed from v2:
 * Improved error handling of design params (patch #3)
 * Removed 'inline' from .c file in patch #4
 * Don't report common stats to ethtool -S (patch #8)

Changed from v1:
 * Fixed build errors on CONFIG_RFS_ACCEL=n (patch #5) and 32-bit
   (patch #8)
 * Dropped patch #10 (ethtool ops) as it's buggy and will need a
   bigger rework to fix.
====================

Acked-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree d61592a112 sfc_ef100: add nic-type for VFs, and bind to them
We don't yet have a .sriov_configure() to create them, though.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree ef2c57b956 sfc_ef100: read pf_index at probe time
We'll need it later, for VF representors.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree 43c3df0d56 sfc_ef100: functions for selftests
Self-tests for event and interrupt reception and NVRAM.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree b593b6f1b4 sfc_ef100: statistics gathering
MAC stats work much the same as on EF10, with a periodic DMA to a region
 specified via an MCDI.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree b780feac36 sfc_ef100: plumb in fini_dmaq
Bring down the TX and RX queues at ifdown, so that we can then fini the
 EVQs (otherwise the MC would return EBUSY because they're still in use).

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:55 -07:00
Edward Cree 8e57daf706 sfc_ef100: RX path for EF100
Includes RSS spreading.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Edward Cree a9dc3d5612 sfc_ef100: RX filter table management and related gubbins
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Edward Cree d19a537218 sfc_ef100: TX path for EF100 NICs
Includes checksum offload and TSO, so declare those in our netdev features.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Edward Cree adcfc3482f sfc_ef100: read Design Parameters at probe time
Several parts of the EF100 architecture are parameterised (to allow
 varying capabilities on FPGAs according to resource constraints), and
 these parameters are exposed to the driver through a TLV-encoded
 region of the BAR.
For the most part we either don't care about these values at all or
 just need to sanity-check them against the driver's assumptions, but
 there are a number of TSO limits which we record so that we will be
 able to check against them in the TX path when handling GSO skbs.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Edward Cree 4496363bec sfc_ef100: fail the probe if NIC uses unsol_ev credits
In the future, EF100 is planned to have a credit-based scheme for
 handling unsolicited events, which drivers will need to use in order
 to function correctly.  However, current EF100 hardware does not yet
 generate unsolicited events and the credit scheme has not yet been
 implemented in firmware.  To prevent compatibility problems later if
 the current driver is used with future firmware which does implement
 it, we check for the corresponding capability flag (which that
 future firmware will set), and if found, we refuse to probe.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Edward Cree 8e737145e8 sfc_ef100: check firmware version at start-of-day
Early in EF100 development there was a different format of event
 descriptor; if the NIC is somehow running the very old firmware
 which will use that format, fail the probe.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:22:54 -07:00
Jiafei Pan 215602a8d2 enetc: use napi_schedule to be compatible with PREEMPT_RT
The driver calls napi_schedule_irqoff() from a context where, in RT,
hardirqs are not disabled, since the IRQ handler is force-threaded.

In the call path of this function, __raise_softirq_irqoff() is modifying
its per-CPU mask of pending softirqs that must be processed, using
or_softirq_pending(). The or_softirq_pending() function is not atomic,
but since interrupts are supposed to be disabled, nobody should be
preempting it, and the operation should be safe.

Nonetheless, when running with hardirqs on, as in the PREEMPT_RT case,
it isn't safe, and the pending softirqs mask can get corrupted,
resulting in softirqs being lost and never processed.

To have common code that works with PREEMPT_RT and with mainline Linux,
we can use plain napi_schedule() instead. The difference is that
napi_schedule() (via __napi_schedule) also calls local_irq_save, which
disables hardirqs if they aren't already. But, since they already are
disabled in non-RT, this means that in practice we don't see any
measurable difference in throughput or latency with this patch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:21:30 -07:00
Jiafei Pan 6c33ae1ad5 dpaa2-eth: use napi_schedule to be compatible with PREEMPT_RT
The driver calls napi_schedule_irqoff() from a context where, in RT,
hardirqs are not disabled, since the IRQ handler is force-threaded.

In the call path of this function, __raise_softirq_irqoff() is modifying
its per-CPU mask of pending softirqs that must be processed, using
or_softirq_pending(). The or_softirq_pending() function is not atomic,
but since interrupts are supposed to be disabled, nobody should be
preempting it, and the operation should be safe.

Nonetheless, when running with hardirqs on, as in the PREEMPT_RT case,
it isn't safe, and the pending softirqs mask can get corrupted,
resulting in softirqs being lost and never processed.

To have common code that works with PREEMPT_RT and with mainline Linux,
we can use plain napi_schedule() instead. The difference is that
napi_schedule() (via __napi_schedule) also calls local_irq_save, which
disables hardirqs if they aren't already. But, since they already are
disabled in non-RT, this means that in practice we don't see any
measurable difference in throughput or latency with this patch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:21:30 -07:00
David S. Miller d8f375ea46 Merge branch 'net-dsa-loop-Preparatory-changes-for-802-1Q-data-path'
net: dsa: loop: Preparatory changes for 802.1Q data path
Florian Fainelli says:

====================
These patches are all meant to help pave the way for a 802.1Q data path
added to the mockup driver, making it more useful than just testing for
configuration. Sending those out now since there is no real need to
wait.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:23 -07:00
Florian Fainelli 947b6ef9f7 net: dsa: loop: Set correct number of ports
We only support DSA_LOOP_NUM_PORTS in the switch, do not tell the DSA
core to allocate up to DSA_MAX_PORTS which is nearly the double (6 vs.
11).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:23 -07:00
Florian Fainelli c99194eded net: dsa: loop: Wire-up MTU callbacks
For now we simply store the port MTU into a per-port member.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:23 -07:00
Florian Fainelli 6c84a58997 net: dsa: loop: Move data structures to header
In preparation for adding support for a mockup data path, move the
driver data structures to include/linux/dsa/loop.h such that we can
share them between net/dsa/ and drivers/net/dsa/ later on.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:23 -07:00
Florian Fainelli 916a8d168e net: dsa: loop: Support 4K VLANs
Allocate a 4K array of VLANs instead of limiting ourselves to just 5
which is arbitrary.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:22 -07:00
Florian Fainelli 81d4e8e073 net: dsa: loop: PVID should be per-port
The PVID should be per-port, this is a preliminary change to support a
802.1Q data path in the driver.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:19:22 -07:00
Rahul Lakkireddy 59b328cf56 cxgb4: add TC-MATCHALL IPv6 support
Matching IPv6 traffic require allocating their own individual slots
in TCAM. So, fetch additional slots to insert IPv6 rules. Also, fetch
the cumulative stats of all the slots occupied by the Matchall rule.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:17:08 -07:00
Vladimir Oltean af9fdd2bf8 net: dsa: sja1105: poll for extts events from a timer
The current poll interval is enough to ensure that rising and falling
edge events are not lost for a 1 PPS signal with 50% duty cycle.

But when we deliver the events to user space, it will try to infer if
they were corresponding to a rising or to a falling edge (the kernel
driver doesn't know that either). User space will try to make that
inference based on the time at which the PPS master had emitted the
pulse (i.e. if it's a .0 time, it's rising edge, if it's .5 time, it's
falling edge).

But there is no in-kernel API for retrieving the precise timestamp
corresponding to a PPS master (aka perout) pulse. So user space has to
guess even that. It will read the PTP time on the PPS master right after
we've delivered the extts event, and declare that the PPS master time
was just the closest integer second, based on 2 thresholds (lower than
.25, or higher than .75, and ignore anything else).

Except that, if we poll for extts events (and our hardware doesn't
really help us, by not providing an interrupt), then there is a risk
that the poll period (and therefore the time at which the event is
delivered) might confuse user space.

Because we are always scheduling the next extts poll at
SJA1105_EXTTS_INTERVAL "from now" (that's the only thing that the
schedule_delayed_work() API gives us), it means that the start time of
the next delayed workqueue will always be shifted to the right a little
bit (shifted with the SPI access duration of this workqueue run).
In turn, because user space sees extts events that are non-periodic
compared to the PPS master's time, this means that it might start making
wrong guesses about rising/falling edge.

To understand the effect, here is the output of ts2phc currently. Notice
the 'src' timestamps of the 'SKIP extts' events, and how they have a
large wander. They keep increasing until the upper limit for the ignore
threshold (.75 seconds), after which the application starts ignoring the
_other_ edge.

ts2phc[26.624]: /dev/ptp3 SKIP extts index 0 at 21.449898912 src 21.657784518
ts2phc[27.133]: adding tstamp 21.949894240 to clock /dev/ptp3
ts2phc[27.133]: adding tstamp 22.000000000 to clock /dev/ptp1
ts2phc[27.133]: /dev/ptp3 offset        640 s2 freq   +5112
ts2phc[27.636]: /dev/ptp3 SKIP extts index 0 at 22.449889360 src 22.669398022
ts2phc[28.140]: adding tstamp 22.949884376 to clock /dev/ptp3
ts2phc[28.140]: adding tstamp 23.000000000 to clock /dev/ptp1
ts2phc[28.140]: /dev/ptp3 offset         96 s2 freq   +4760
ts2phc[28.644]: /dev/ptp3 SKIP extts index 0 at 23.449879504 src 23.677420422
ts2phc[29.153]: adding tstamp 23.949874704 to clock /dev/ptp3
ts2phc[29.153]: adding tstamp 24.000000000 to clock /dev/ptp1
ts2phc[29.153]: /dev/ptp3 offset       -264 s2 freq   +4429
ts2phc[29.656]: /dev/ptp3 SKIP extts index 0 at 24.449870008 src 24.689407238
ts2phc[30.160]: adding tstamp 24.949865376 to clock /dev/ptp3
ts2phc[30.160]: adding tstamp 25.000000000 to clock /dev/ptp1
ts2phc[30.160]: /dev/ptp3 offset       -280 s2 freq   +4334
ts2phc[30.664]: /dev/ptp3 SKIP extts index 0 at 25.449860760 src 25.697449926
ts2phc[31.168]: adding tstamp 25.949856176 to clock /dev/ptp3
ts2phc[31.168]: adding tstamp 26.000000000 to clock /dev/ptp1
ts2phc[31.168]: /dev/ptp3 offset       -176 s2 freq   +4354
ts2phc[31.672]: /dev/ptp3 SKIP extts index 0 at 26.449851584 src 26.705433606
ts2phc[32.180]: adding tstamp 26.949846992 to clock /dev/ptp3
ts2phc[32.180]: adding tstamp 27.000000000 to clock /dev/ptp1
ts2phc[32.180]: /dev/ptp3 offset        -80 s2 freq   +4397
ts2phc[32.684]: /dev/ptp3 SKIP extts index 0 at 27.449842384 src 27.717415110
ts2phc[33.192]: adding tstamp 27.949837768 to clock /dev/ptp3
ts2phc[33.192]: adding tstamp 28.000000000 to clock /dev/ptp1
ts2phc[33.192]: /dev/ptp3 offset          0 s2 freq   +4453
ts2phc[33.696]: /dev/ptp3 SKIP extts index 0 at 28.449833128 src 28.729412902
ts2phc[34.200]: adding tstamp 28.949828472 to clock /dev/ptp3
ts2phc[34.200]: adding tstamp 29.000000000 to clock /dev/ptp1
ts2phc[34.200]: /dev/ptp3 offset          8 s2 freq   +4461
ts2phc[34.704]: /dev/ptp3 SKIP extts index 0 at 29.449823816 src 29.737416038
ts2phc[35.208]: adding tstamp 29.949819152 to clock /dev/ptp3
ts2phc[35.208]: adding tstamp 30.000000000 to clock /dev/ptp1
ts2phc[35.208]: /dev/ptp3 offset         -8 s2 freq   +4447
ts2phc[35.712]: /dev/ptp3 SKIP extts index 0 at 30.449814496 src 30.745554982
ts2phc[36.216]: adding tstamp 30.949809840 to clock /dev/ptp3
ts2phc[36.216]: adding tstamp 31.000000000 to clock /dev/ptp1
ts2phc[36.216]: /dev/ptp3 offset         -8 s2 freq   +4445
ts2phc[36.468]: /dev/ptp3 SKIP extts index 0 at 31.449805184 src 31.501109446
ts2phc[36.972]: adding tstamp 31.949800536 to clock /dev/ptp3
ts2phc[36.972]: adding tstamp 32.000000000 to clock /dev/ptp1
ts2phc[36.972]: /dev/ptp3 offset         -8 s2 freq   +4442
ts2phc[37.480]: /dev/ptp3 SKIP extts index 0 at 32.449795896 src 32.513320070
ts2phc[37.984]: adding tstamp 32.949791248 to clock /dev/ptp3
ts2phc[37.984]: adding tstamp 33.000000000 to clock /dev/ptp1
ts2phc[37.984]: /dev/ptp3 offset          0 s2 freq   +4448

Fix that by taking the following measures:
- Schedule the poll from a timer. Because we are really scheduling the
  timer periodically, the extts events delivered to user space are
  periodic too, and don't suffer from the "shift-to-the-right" effect.
- Increase the poll period to 6 times a second. This imposes a smaller
  upper bound to the shift that can occur to the delivery time of extts
  events, and makes user space (ts2phc) to always interpret correctly
  which events should be skipped and which shouldn't.
- Move the SPI readout itself to the main PTP kernel thread, instead of
  the generic workqueue. This is because the timer runs in atomic
  context, but is also better than before, because if needed, we can
  chrt & taskset this kernel thread, to ensure it gets enough priority
  under load.

After this patch, one can notice that the wander is greatly reduced, and
that the latencies of one extts poll are not propagated to the next. The
'src' timestamp that is skipped is never larger than .65 seconds (which
means .15 seconds larger than the time at which the real event occurred
at, and .10 seconds smaller than the .75 upper threshold for ignoring
the falling edge):

ts2phc[40.076]: adding tstamp 34.949261296 to clock /dev/ptp3
ts2phc[40.076]: adding tstamp 35.000000000 to clock /dev/ptp1
ts2phc[40.076]: /dev/ptp3 offset         48 s2 freq   +4631
ts2phc[40.568]: /dev/ptp3 SKIP extts index 0 at 35.449256496 src 35.595791078
ts2phc[41.064]: adding tstamp 35.949251744 to clock /dev/ptp3
ts2phc[41.064]: adding tstamp 36.000000000 to clock /dev/ptp1
ts2phc[41.064]: /dev/ptp3 offset       -224 s2 freq   +4374
ts2phc[41.552]: /dev/ptp3 SKIP extts index 0 at 36.449247088 src 36.579825574
ts2phc[42.044]: adding tstamp 36.949242456 to clock /dev/ptp3
ts2phc[42.044]: adding tstamp 37.000000000 to clock /dev/ptp1
ts2phc[42.044]: /dev/ptp3 offset       -240 s2 freq   +4290
ts2phc[42.536]: /dev/ptp3 SKIP extts index 0 at 37.449237848 src 37.563828774
ts2phc[43.028]: adding tstamp 37.949233264 to clock /dev/ptp3
ts2phc[43.028]: adding tstamp 38.000000000 to clock /dev/ptp1
ts2phc[43.028]: /dev/ptp3 offset       -144 s2 freq   +4314
ts2phc[43.520]: /dev/ptp3 SKIP extts index 0 at 38.449228656 src 38.547823238
ts2phc[44.012]: adding tstamp 38.949224048 to clock /dev/ptp3
ts2phc[44.012]: adding tstamp 39.000000000 to clock /dev/ptp1
ts2phc[44.012]: /dev/ptp3 offset        -80 s2 freq   +4335
ts2phc[44.508]: /dev/ptp3 SKIP extts index 0 at 39.449219432 src 39.535846118
ts2phc[44.996]: adding tstamp 39.949214816 to clock /dev/ptp3
ts2phc[44.996]: adding tstamp 40.000000000 to clock /dev/ptp1
ts2phc[44.996]: /dev/ptp3 offset        -32 s2 freq   +4359
ts2phc[45.488]: /dev/ptp3 SKIP extts index 0 at 40.449210192 src 40.515824678
ts2phc[45.980]: adding tstamp 40.949205568 to clock /dev/ptp3
ts2phc[45.980]: adding tstamp 41.000000000 to clock /dev/ptp1
ts2phc[45.980]: /dev/ptp3 offset          8 s2 freq   +4390
ts2phc[46.636]: /dev/ptp3 SKIP extts index 0 at 41.449200928 src 41.664176902
ts2phc[47.132]: adding tstamp 41.949196288 to clock /dev/ptp3
ts2phc[47.132]: adding tstamp 42.000000000 to clock /dev/ptp1
ts2phc[47.132]: /dev/ptp3 offset          0 s2 freq   +4384
ts2phc[47.620]: /dev/ptp3 SKIP extts index 0 at 42.449191656 src 42.648117190
ts2phc[48.112]: adding tstamp 42.949187016 to clock /dev/ptp3
ts2phc[48.112]: adding tstamp 43.000000000 to clock /dev/ptp1
ts2phc[48.112]: /dev/ptp3 offset          0 s2 freq   +4384
ts2phc[48.604]: /dev/ptp3 SKIP extts index 0 at 43.449182384 src 43.632112582
ts2phc[49.100]: adding tstamp 43.949177736 to clock /dev/ptp3
ts2phc[49.100]: adding tstamp 44.000000000 to clock /dev/ptp1
ts2phc[49.100]: /dev/ptp3 offset         -8 s2 freq   +4376
ts2phc[49.588]: /dev/ptp3 SKIP extts index 0 at 44.449173096 src 44.616136774
ts2phc[50.080]: adding tstamp 44.949168464 to clock /dev/ptp3
ts2phc[50.080]: adding tstamp 45.000000000 to clock /dev/ptp1
ts2phc[50.080]: /dev/ptp3 offset          8 s2 freq   +4390
ts2phc[50.572]: /dev/ptp3 SKIP extts index 0 at 45.449163816 src 45.600134662
ts2phc[51.064]: adding tstamp 45.949159160 to clock /dev/ptp3
ts2phc[51.064]: adding tstamp 46.000000000 to clock /dev/ptp1
ts2phc[51.064]: /dev/ptp3 offset         -8 s2 freq   +4376
ts2phc[51.556]: /dev/ptp3 SKIP extts index 0 at 46.449154528 src 46.584588550
ts2phc[52.048]: adding tstamp 46.949149896 to clock /dev/ptp3
ts2phc[52.048]: adding tstamp 47.000000000 to clock /dev/ptp1
ts2phc[52.048]: /dev/ptp3 offset          0 s2 freq   +4382
ts2phc[52.540]: /dev/ptp3 SKIP extts index 0 at 47.449145256 src 47.568132198
ts2phc[53.032]: adding tstamp 47.949140616 to clock /dev/ptp3
ts2phc[53.032]: adding tstamp 48.000000000 to clock /dev/ptp1
ts2phc[53.032]: /dev/ptp3 offset          0 s2 freq   +4382
ts2phc[53.524]: /dev/ptp3 SKIP extts index 0 at 48.449135968 src 48.552121446
ts2phc[54.016]: adding tstamp 48.949131320 to clock /dev/ptp3
ts2phc[54.016]: adding tstamp 49.000000000 to clock /dev/ptp1
ts2phc[54.016]: /dev/ptp3 offset          0 s2 freq   +4382
ts2phc[54.512]: /dev/ptp3 SKIP extts index 0 at 49.449126680 src 49.540147014
ts2phc[55.000]: adding tstamp 49.949122040 to clock /dev/ptp3
ts2phc[55.000]: adding tstamp 50.000000000 to clock /dev/ptp1
ts2phc[55.000]: /dev/ptp3 offset          0 s2 freq   +4382
ts2phc[55.492]: /dev/ptp3 SKIP extts index 0 at 50.449117400 src 50.520119078
ts2phc[55.988]: adding tstamp 50.949112768 to clock /dev/ptp3
ts2phc[55.988]: adding tstamp 51.000000000 to clock /dev/ptp1
ts2phc[55.988]: /dev/ptp3 offset          8 s2 freq   +4390
ts2phc[56.476]: /dev/ptp3 SKIP extts index 0 at 51.449108120 src 51.504175910
ts2phc[57.132]: adding tstamp 51.949103480 to clock /dev/ptp3
ts2phc[57.132]: adding tstamp 52.000000000 to clock /dev/ptp1
ts2phc[57.132]: /dev/ptp3 offset          0 s2 freq   +4384
ts2phc[57.624]: /dev/ptp3 SKIP extts index 0 at 52.449098840 src 52.651833574
ts2phc[58.116]: adding tstamp 52.949094200 to clock /dev/ptp3
ts2phc[58.116]: adding tstamp 53.000000000 to clock /dev/ptp1
ts2phc[58.116]: /dev/ptp3 offset          8 s2 freq   +4392
ts2phc[58.612]: /dev/ptp3 SKIP extts index 0 at 53.449089560 src 53.639826918
ts2phc[59.100]: adding tstamp 53.949084920 to clock /dev/ptp3
ts2phc[59.100]: adding tstamp 54.000000000 to clock /dev/ptp1
ts2phc[59.100]: /dev/ptp3 offset          8 s2 freq   +4394
ts2phc[59.592]: /dev/ptp3 SKIP extts index 0 at 54.449080272 src 54.619842278
ts2phc[60.084]: adding tstamp 54.949075624 to clock /dev/ptp3
ts2phc[60.084]: adding tstamp 55.000000000 to clock /dev/ptp1
ts2phc[60.084]: /dev/ptp3 offset          8 s2 freq   +4397
ts2phc[60.576]: /dev/ptp3 SKIP extts index 0 at 55.449070968 src 55.603885542
ts2phc[61.068]: adding tstamp 55.949066312 to clock /dev/ptp3
ts2phc[61.068]: adding tstamp 56.000000000 to clock /dev/ptp1
ts2phc[61.068]: /dev/ptp3 offset          0 s2 freq   +4391
ts2phc[61.560]: /dev/ptp3 SKIP extts index 0 at 56.449061680 src 56.587885798
ts2phc[62.052]: adding tstamp 56.949057032 to clock /dev/ptp3
ts2phc[62.052]: adding tstamp 57.000000000 to clock /dev/ptp1
ts2phc[62.052]: /dev/ptp3 offset         -8 s2 freq   +4383

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:16:02 -07:00
Paolo Abeni 8555c6bfd5 mptcp: fix bogus sendmsg() return code under pressure
In case of memory pressure, mptcp_sendmsg() may call
sk_stream_wait_memory() after succesfully xmitting some
bytes. If the latter fails we currently return to the
user-space the error code, ignoring the succeful xmit.

Address the issue always checking for the xmitted bytes
before mptcp_sendmsg() completes.

Fixes: f296234c98 ("mptcp: Add handling of incoming MP_JOIN requests")
Reviewed-by: Matthieu Baerts <matthieu.baerts@tessares.net>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:14:20 -07:00
David S. Miller f8deaea06f Merge branch 'mlxsw-Add-support-for-buffer-drop-traps'
Ido Schimmel says:

====================
mlxsw: Add support for buffer drop traps

Petr says:

A recent patch set added the ability to mirror buffer related drops
(e.g., early drops) through a netdev. This patch set adds the ability to
trap such packets to the local CPU for analysis.

The trapping towards the CPU is configured by using tc-trap action
instead of tc-mirred as was done when the packets were mirrored through
a netdev. A future patch set will also add the ability to sample the
dropped packets using tc-sample action.

The buffer related drop traps are added to devlink, which means that the
dropped packets can be reported to user space via the kernel's
drop_monitor module.

Patch set overview:

Patch #1 adds the early_drop trap to devlink

Patch #2 adds extack to a few devlink operations to facilitate better
error reporting to user space. This is necessary - among other things -
because the action of buffer drop traps cannot be changed in mlxsw

Patch #3 performs a small refactoring in mlxsw, patch #4 fixes a bug that
this patchset would trigger.

Patches #5-#6 add the infrastructure required to support different traps
/ trap groups in mlxsw per-ASIC. This is required because buffer drop
traps are not supported by Spectrum-1

Patch #7 extends mlxsw to register the early_drop trap

Patch #8 adds the offload logic for the "trap" action at a qevent block.

Patch #9 adds a mlxsw-specific selftest.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:47 -07:00
Petr Machata 8fb6ac457d selftests: mlxsw: RED: Test offload of trapping on RED qevents
Add a selftest for RED early_drop and mark qevents when a trap action is
attached at the associated block.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Petr Machata 54a9238589 mlxsw: spectrum_qdisc: Offload action trap for qevents
When offloading action trap on a qevent, pass to_dev of NULL to the SPAN
module to trigger the mirror to the CPU port. Query the buffer drops
policer and use it for policing of the trapped traffic.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Ido Schimmel 6687e953f4 mlxsw: spectrum_trap: Add early_drop trap
As previously explained, packets that are dropped due to buffer related
reasons (e.g., tail drop, early drop) can be mirrored to the CPU port.
These packets are then trapped with one of the "mirror session" traps
and their CQE includes the reason for which the packet was mirrored.

Register with devlink a new trap, early_drop, and initialize the
corresponding Rx listener with the appropriate mirror reason. Return an
error in case user tries to change the traps' action, as this is not
supported.

Since Spectrum-1 does not support these traps, the above is only done
for Spectrum-2 onwards.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Ido Schimmel 869c7be940 mlxsw: spectrum_trap: Allow for per-ASIC traps initialization
Subsequent patches will need to register different traps for Spectrum-1
and Spectrum-2 onwards.

Enable that by invoking a per-ASIC operation during traps
initialization.

Reviewed-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Ido Schimmel 36d1fd687d mlxsw: spectrum_trap: Allow for per-ASIC trap groups initialization
Subsequent patches will need to register different trap groups for
Spectrum-1 and Spectrum-2 onwards.

Enable that by invoking a per-ASIC operation during trap groups
initialization.

Reviewed-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Petr Machata 928345c08b mlxsw: spectrum_span: On policer_id_base_ref_count, use dec_and_test
When unsetting policer base, the SPAN code currently uses refcount_dec().
However that function splats when the counter reaches zero, because
reaching zero without actually testing is in general indicative of a
missing cleanup. There is no cleanup to be done here, but nonetheless, use
refcount_dec_and_test() as required.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Ido Schimmel 76ba292cc7 mlxsw: spectrum_trap: Use 'size_t' for array sizes
Use 'size_t' instead of 'u64' for array sizes, as this this is correct
type to use for expressions involving sizeof().

Suggested-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Ido Schimmel c88e11e047 devlink: Pass extack when setting trap's action and group's parameters
A later patch will refuse to set the action of certain traps in mlxsw
and also to change the policer binding of certain groups. Pass extack so
that failure could be communicated clearly to user space.

Reviewed-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Amit Cohen 08e335f6ad devlink: Add early_drop trap
Add the packet trap that can report packets that were ECN marked due to RED
AQM.

Signed-off-by: Amit Cohen <amitc@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:06:46 -07:00
Linus Torvalds 09a0bd0776 platform-drivers-x86 for v5.9-1
* ASUS WMI driver honors BAT1 name of the battery
   (quite a few new laptops are using it)
 * Dell WMI driver supports new key codes and backlight events
 * ThinkPad ACPI driver now may use standard charge threshold interface,
   it also has been updated to provide Laptop or Desktop mode to the user
 * Intel Speed Select Technology gained support on Sapphire Rapids platform
 * Regular update of Speed Select Technology tools
 * Mellanox has been updated to support complex attributes
 * PMC core driver has been fixed to show correct names for LPM0 register
 * HTTP links were replaced by HTTPS ones where it applies
 * Miscellaneous fixes and cleanups here and there
 
 The following is an automated git shortlog grouped by driver:
 
 acerhdf:
  -  Replace HTTP links with HTTPS ones
 
 Add new intel_atomisp2_led driver:
  - Add new intel_atomisp2_led driver
 
 apple-gmux:
  -  Replace HTTP links with HTTPS ones
 
 asus-nb-wmi:
  -  Drop duplicate DMI quirk structures
  -  add support for ASUS ROG Zephyrus G14 and G15
 
 asus-wmi:
  -  allow BAT1 battery name
 
 dell-wmi:
  -  add new dmi mapping for keycode 0xffff
  -  add new keymap type 0x0012
  -  add new backlight events
 
 intel_cht_int33fe:
  -  Drop double check for ACPI companion device
 
 intel-hid:
  -  Fix return value check in check_acpi_dev()
 
 intel_pmc_core:
  -  fix bound check in pmc_core_mphy_pg_show()
  -  update TGL's LPM0 reg bit map name
 
 intel-vbtn:
  -  Fix return value check in check_acpi_dev()
 
 ISST:
  -  drop a duplicated word in isst_if.h
  -  Add new PCI device ids
 
 pcengines-apuv2:
  -  revert wiring up simswitch GPIO as LED
 
 platform/mellanox:
  -  Introduce string_upper() and string_lower() helpers
  -  Add string_upper() and string_lower() tests
  -  Extend FAN platform data description
  -  Add more definitions for system attributes
  -  Add new attribute for mlxreg-io sysfs interfaces
  -  Add presence register field for FAN devices
  -  Add support for complex attributes
  -  mlxreg-io: Add support for complex attributes
  -  mlxreg-hotplug: Add environmental data to uevent
  -  mlxreg-hotplug: Use capability register for attribute creation
  -  mlxreg-hotplug: Modify module license
 
 system76-acpi:
  -  Fix brightness_set schedule while atomic
 
 thinkpad_acpi:
  -  Make some symbols static
  -  add documentation for battery charge control
  -  use standard charge control attribute names
  -  remove unused defines
  -  Replace HTTP links with HTTPS ones
  -  not loading brightness_init when _BCL invalid
  -  lap or desk mode interface
  -  Revert "Use strndup_user() in dispatch_proc_write()"
 
 tools/power/x86/intel-speed-select:
  -  Update version for v5.9
  -  Add retries for mail box commands
  -  Add option to delay mbox commands
  -  Ignore -o option processing on error
  -  Change path for caching topology info
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Merge tag 'platform-drivers-x86-v5.9-1' of git://git.infradead.org/linux-platform-drivers-x86

Pull x86 platform driver updates from Andy Shevchenko:

 - ASUS WMI driver honors BAT1 name of the battery (quite a few new
   laptops are using it)

 - Dell WMI driver supports new key codes and backlight events

 - ThinkPad ACPI driver now may use standard charge threshold interface,
   it also has been updated to provide Laptop or Desktop mode to the
   user

 - Intel Speed Select Technology gained support on Sapphire Rapids
   platform

 - Regular update of Speed Select Technology tools

 - Mellanox has been updated to support complex attributes

 - PMC core driver has been fixed to show correct names for LPM0
   register

 - HTTP links were replaced by HTTPS ones where it applies

 - Miscellaneous fixes and cleanups here and there

* tag 'platform-drivers-x86-v5.9-1' of git://git.infradead.org/linux-platform-drivers-x86: (42 commits)
  platform/x86: asus-nb-wmi: Drop duplicate DMI quirk structures
  platform/x86: thinkpad_acpi: Make some symbols static
  platform/x86: thinkpad_acpi: add documentation for battery charge control
  platform/x86: thinkpad_acpi: use standard charge control attribute names
  platform/x86: thinkpad_acpi: remove unused defines
  platform/x86: ISST: drop a duplicated word in isst_if.h
  tools/power/x86/intel-speed-select: Update version for v5.9
  tools/power/x86/intel-speed-select: Add retries for mail box commands
  tools/power/x86/intel-speed-select: Add option to delay mbox commands
  tools/power/x86/intel-speed-select: Ignore -o option processing on error
  tools/power/x86/intel-speed-select: Change path for caching topology info
  platform/x86: acerhdf: Replace HTTP links with HTTPS ones
  platform/x86: apple-gmux: Replace HTTP links with HTTPS ones
  platform/x86: pcengines-apuv2: revert wiring up simswitch GPIO as LED
  platform/x86: mlx-platform: Extend FAN platform data description
  platform_data/mlxreg: Add presence register field for FAN devices
  Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces
  platform/mellanox: mlxreg-io: Add support for complex attributes
  platform/x86: mlx-platform: Add more definitions for system attributes
  platform_data/mlxreg: Add support for complex attributes
  ...
2020-08-03 18:02:53 -07:00
YueHaibing 80fbbb1672 fib: Fix undef compile warning
net/core/fib_rules.c:26:7: warning: "CONFIG_IP_MULTIPLE_TABLES" is not defined, evaluates to 0 [-Wundef]
 #elif CONFIG_IP_MULTIPLE_TABLES
       ^~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: 8b66a6fd34 ("fib: fix another fib_rules_ops indirect call wrapper problem")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-By: Brian Vazquez <brianvv@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:01:49 -07:00
Geliang Tang 190f8b060e mptcp: use mptcp_for_each_subflow in mptcp_stream_accept
Use mptcp_for_each_subflow in mptcp_stream_accept instead of
open-coding.

Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Acked-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:01:14 -07:00
David S. Miller ee494f42a3 A few more changes, notably:
* handle new SAE (WPA3 authentication) status codes in the correct way
  * fix a while that should be an if instead, avoiding infinite loops
  * handle beacon filtering changing better
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Merge tag 'mac80211-next-for-davem-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next

Johannes Berg says:

====================
A few more changes, notably:
 * handle new SAE (WPA3 authentication) status codes in the correct way
 * fix a while that should be an if instead, avoiding infinite loops
 * handle beacon filtering changing better
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 18:00:22 -07:00
Jisheng Zhang 01f4d47a5b net: stmmac: fix failed to suspend if phy based WOL is enabled
With the latest net-next tree, if test suspend/resume after enabling
WOL, we get error as below:

[  487.086365] dpm_run_callback(): mdio_bus_suspend+0x0/0x30 returns -16
[  487.086375] PM: Device stmmac-0:00 failed to suspend: error -16

-16 means -EBUSY, this is because I didn't enable wakeup of the correct
device when implementing phy based WOL feature. To be honest, I caught
the issue when implementing phy based WOL and then fix it locally, but
forgot to amend the phy based wol patch. Today, I found the issue by
testing net-next tree.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 17:59:39 -07:00
Ioana-Ruxandra Stăncioi 88fab21c69 seg6_iptunnel: Refactor seg6_lwt_headroom out of uapi header
Refactor the function seg6_lwt_headroom out of the seg6_iptunnel.h uapi
header, because it is only used in seg6_iptunnel.c. Moreover, it is only
used in the kernel code, as indicated by the "#ifdef __KERNEL__".

Suggested-by: David Miller <davem@davemloft.net>
Signed-off-by: Ioana-Ruxandra Stăncioi <stancioi@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 17:57:40 -07:00
Jianfeng Wang 730e700e2c tcp: apply a floor of 1 for RTT samples from TCP timestamps
For retransmitted packets, TCP needs to resort to using TCP timestamps
for computing RTT samples. In the common case where the data and ACK
fall in the same 1-millisecond interval, TCP senders with millisecond-
granularity TCP timestamps compute a ca_rtt_us of 0. This ca_rtt_us
of 0 propagates to rs->rtt_us.

This value of 0 can cause performance problems for congestion control
modules. For example, in BBR, the zero min_rtt sample can bring the
min_rtt and BDP estimate down to 0, reduce snd_cwnd and result in a
low throughput. It would be hard to mitigate this with filtering in
the congestion control module, because the proper floor to apply would
depend on the method of RTT sampling (using timestamp options or
internally-saved transmission timestamps).

This fix applies a floor of 1 for the RTT sample delta from TCP
timestamps, so that seq_rtt_us, ca_rtt_us, and rs->rtt_us will be at
least 1 * (USEC_PER_SEC / TCP_TS_HZ).

Note that the receiver RTT computation in tcp_rcv_rtt_measure() and
min_rtt computation in tcp_update_rtt_min() both already apply a floor
of 1 timestamp tick, so this commit makes the code more consistent in
avoiding this edge case of a value of 0.

Signed-off-by: Jianfeng Wang <jfwang@google.com>
Signed-off-by: Neal Cardwell <ncardwell@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Kevin Yang <yyd@google.com>
Acked-by: Yuchung Cheng <ycheng@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-03 17:54:03 -07:00
Linus Torvalds e53bc3ff99 Boris is on vacation and he asked us to send you the pending RAS bits:
- Print the PPIN field on CPUs that fill them out
  - Fix an MCE injection bug
  - Simplify a kzalloc in dev_mcelog_init_device()
 
 Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'ras-core-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 RAS updates from Ingo Molnar:
 "Boris is on vacation and he asked us to send you the pending RAS bits:

   - Print the PPIN field on CPUs that fill them out

   - Fix an MCE injection bug

   - Simplify a kzalloc in dev_mcelog_init_device()"

* tag 'ras-core-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce, EDAC/mce_amd: Print PPIN in machine check records
  x86/mce/dev-mcelog: Use struct_size() helper in kzalloc()
  x86/mce/inject: Fix a wrong assignment of i_mce.status
2020-08-03 17:42:23 -07:00