Merge "i.MX defconfig updates for 4.7" from Shawn Guo:
- Update multi_v5_defconfig for i.MX21/27 and systemd support
- Update imx_v6_v7_defconfig to support devices found on various i.MX6
board: FT5x06 and TSC2004 touch, I2C GPIO, MICREL PHY and M41T80 RTC
* tag 'imx-defconfig-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: add CONFIG_MICREL_PHY
ARM: imx_v6_v7_defconfig: add CONFIG_I2C_GPIO
ARM: multi_v5_defconfig: Enable recommended options for systemd
ARM: multi_v5_defconfig: Enable support for MX21/MX27
ARM: imx_v6_v7_defconfig: add CONFIG_RTC_DRV_M41T80
ARM: imx_v6_v7_defconfig: add CONFIG_I2C_MUX_GPIO
ARM: imx_v6_v7_defconfig: add FT5x06 and TSC2004 touch support
Merge "ARM: tegra: Default configuration updates for v4.7-rc1" from Thierry Reding:
Enable the XUSB pad controller and XUSB controller drivers on the Tegra
and multi-v7 default configurations.
* tag 'tegra-for-4.7-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: multi_v7: Enable Tegra XUSB controller in defconfig
ARM: tegra: Enable XUSB controller in defconfig
based filesystems, SPI NOR and GPIO sysfs
entries.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJXIzjWAAoJEGFBu2jqvgRNq3sP/0sIy4dHzBZxZjWZ39GYbR2G
HMv+mV6F0bA4UUzdA30JQFffRvt2wj6tUjlGtOQmMguMWAFCT0TLSfsw013+Tb6F
xFcOEwrxmTVulr5yAdL6pO2HFAwzTTw1KI2FlQWwIvNUPKE5frI1lkqRa/+fdLax
IPObxgd9kfEsv/O4ISO9Z3ZlIyo69/dVlgHRGJ+9e7cxeg4S6RV8I4/TrTiVn2lL
2dGRMglf4R0dGSupclhDCDDxiCkGbbgpm98z43MYfOcq7XG4aSZGcTZIty+CtD7E
qSj+oDZsSmUuA6kBn97D/BDLUibV009iu8Ien4i+A5RyIFW9BRShavKAaOESJDL6
uhCgVP0IbuY3/0lhrQ4vclNSO961aIeU50N4xsNjz2aEAQzOCfHGyIihU2oCjVBk
LsXumedCm1pg+lVfJsftAQn60T2u4MzpfzZB0A7crmDyVPqK1az+hx5ipcP+FFCc
AhIjMgMObQeINq/R6H9rh4zS/fWZbQiqN14NLrmv50Ti4Mf6Cve+m4WLnmdImggi
tvuJ5MJ+OaCy89dGb/fuGYP5iLKT+U/JsZfoSVzMyVb0A353G73juUz7/K8Wmq5c
IwPKiCXBqM1KRcgoOFFF0KUpLo6ArR54NggYPqAUmyxxrRNQfVvMHLVBtJkWfnjl
KFj+zfA4SPK42yMumJI7
=ocYZ
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.7/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
Merge "DaVinci defconfig updates for v4.7" from Sekhar Nori:
Some defconfig updates to support systemd
based filesystems, SPI NOR and GPIO sysfs
entries.
* tag 'davinci-for-v4.7/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: enable SPI and NOR as modules
ARM: davinci_all_defconfig: support systemd
ARM: davinci_all_defconfig: enable GPIO_SYSFS
- error in the documentation led to wrongly add a new NAND Flash Controller
type. Switch back to the previous compatible one.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXMYtYAAoJEAf03oE53VmQfvoH/i2HahAo+hQUaCoTKUYy5rfo
FOII0mpsLrzryiiVX9B+XV1d5cj5obprQfIrKU4nZomZr1iZdhbPtcrItv/uId5d
N2RSdlax+a20nGvo4tKwqmJLOYDWwtcrIFATmGJ1N6VggEeqp7tDE7/QOOxVDpIo
K/DPk49b9ZCRQarJpaYC+xbV6zqpyrONfE6Vna6YJ37iCiH5gVu3Kg/X9CNupyiL
LUwdYoCkYF6yLRSMSe9A/eN49flVH+B8aUvIa1howqtLRLZlW0K4b8+c4P2reKmY
gR/QulhQbcJ0gl4YEX+6ZY5xwnexpAQca9H8f2ivUC12xUjonr3f2mHXgIeQOPE=
=d7Yr
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "at91: fixes for 4.6 #1" from Nicolas Ferre:
Here is a late fix for AT91. Sorry to have figure it out so late in the
development cycle but we had to confirm it was an error with the documentation
of two products.
So, as the compatibility string is in since 4.6-rc1 and that the previous one
works okay, it's a good opportunity to switch back to the one that works without
introducing a intermediary bug.
The revert on driver code and the removal of the useless additional
compatibility string will be queued for 4.7 through NAND/MTD.
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: use "atmel,sama5d3-nfc" compatible for nfc
CONFIG_FHANDLE is listed as a mandatory kernel option for systemd. So
explicitly enable it to allow easy use of systemd userspace.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
An error in documentation of the NAND Flash Controller (NFC) led to choose
another compatibility string for sama5d2 with an impact on the NAND flash
ready/busy information. It was producing the error message:
atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000
and had an impact on performance.
So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for
this SoC which gives the proper ready/busy bit information. The NAND flash
driver will be updated to remove the support for this different
implementation.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Romain Izard <romain.izard.pro@gmail.com>
[nicolas.ferre@atmel.com: change commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The ARMv8.1 architecture extensions introduce support for hardware
updates of the access and dirty information in page table entries. With
VTCR_EL2.HA enabled (bit 21), when the CPU accesses an IPA with the
PTE_AF bit cleared in the stage 2 page table, instead of raising an
Access Flag fault to EL2 the CPU sets the actual page table entry bit
(10). To ensure that kernel modifications to the page table do not
inadvertently revert a bit set by hardware updates, certain Stage 2
software pte/pmd operations must be performed atomically.
The main user of the AF bit is the kvm_age_hva() mechanism. The
kvm_age_hva_handler() function performs a "test and clear young" action
on the pte/pmd. This needs to be atomic in respect of automatic hardware
updates of the AF bit. Since the AF bit is in the same position for both
Stage 1 and Stage 2, the patch reuses the existing
ptep_test_and_clear_young() functionality if
__HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG is defined. Otherwise, the
existing pte_young/pte_mkold mechanism is preserved.
The kvm_set_s2pte_readonly() (and the corresponding pmd equivalent) have
to perform atomic modifications in order to avoid a race with updates of
the AF bit. The arm64 implementation has been re-written using
exclusives.
Currently, kvm_set_s2pte_writable() (and pmd equivalent) take a pointer
argument and modify the pte/pmd in place. However, these functions are
only used on local variables rather than actual page table entries, so
it makes more sense to follow the pte_mkwrite() approach for stage 1
attributes. The change to kvm_s2pte_mkwrite() makes it clear that these
functions do not modify the actual page table entries.
The (pte|pmd)_mkyoung() uses on Stage 2 entries (setting the AF bit
explicitly) do not need to be modified since hardware updates of the
dirty status are not supported by KVM, so there is no possibility of
losing such information.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
In netdevice.h we removed the structure in net-next that is being
changes in 'net'. In macsec.c and rtnetlink.c we have overlaps
between fixes in 'net' and the u64 attribute changes in 'net-next'.
The mlx5 conflicts have to do with vxlan support dependencies.
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that all drivers support the same set of functions and the same
setup code, drop every model-specific DSA switch driver and replace them
with a common mv88e6xxx driver.
This merges the info tables into one, removes the function exports, the
model-specific files, and update the defconfigs.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
compatible string if no exact match based on the IO address is found.
This leaves out the need to patch auxdata for each driver when adding
new SoCs. And it also reprotedly fixes the issue of passing auxdata
to a child if the parent instantiates the child from DT as discussed
in the "[PATCH] of/platform: Allow secondary compatible match in
of_dev_lookup" mailing list thread.
As a minimal use case, let's also convert omap pinctrl auxdatato
use a generic match.
There is no need to get this in to the v4.6-rc cycle and it can wait
for v4.7 merge window. Note that these changes have now been sitting
in Linux next for about two weeks so far as I wanted to make sure no
new issues are popping up.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKjVmAAoJEBvUPslcq6VzNaIQAKBW4SoVCpUnz8U7Vb6drVmk
kNuXn317CJQIJSPYuncQkmnPPDqvRBB16offmWI2z31R2p8azuf4kTkroqGrIP2+
ZuXyuxNc3IczxMiWjVN3SKA7/h4fRM+J8IN8AHHf/DAcFOc0Dz1muMhkEX3otT+/
qFn85iBreeAaNnW9eViZ+lvz6wSYlhrHAPrW3jHJM1Q11OTi45vymS82iU4ztcXo
zotDxSLaMcQJNAb6wF553JhzwL8G1bM9Ab1b5+vsOVQ/y/wWY+b/maGePUQCWiVX
cggYoa/0gDmBGAUdLq1GvVTg4HHIEaO0ysrioMlHmOkTf7KXXiKITZTX98FE39rL
xH/2nkechWV8yWPwhZktjASzcImqItcMdS3axFgdHnV7fpho2an/80Ekod401/Bh
wIJ48gZxPAyshjr+e8xhyHRdEauVmUYvdiUS/Gv8dEvJJnBqVFYcLd/FNCp43j5X
G7RQITG0pK7i0xwX+9vNOrD5CzfWCSLYw6iMnMnReMdnw9PUwbYLaiWTuoyC6Pmd
B9zMkqOzdael6fFuQvRi9ZOEoSK5A3EpLWrvXzrS4nXy1dOa2eDpuxoRkAKACVMf
wyANAn3YK1pQwtnoGRsdNk98zjMX2o8H1G0XKB0QewNa0zlNhGIUsAiZYX4H/drg
taAbzAUSLloDcHnyQgis
=T39l
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/auxdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "non urgent auxdata fix for v4.7 merge window" from Tony Lindgren:
Device tree auxdata handling fix that allows a match based on the
compatible string if no exact match based on the IO address is found.
This leaves out the need to patch auxdata for each driver when adding
new SoCs. And it also reprotedly fixes the issue of passing auxdata
to a child if the parent instantiates the child from DT as discussed
in the "[PATCH] of/platform: Allow secondary compatible match in
of_dev_lookup" mailing list thread.
As a minimal use case, let's also convert omap pinctrl auxdatato
use a generic match.
There is no need to get this in to the v4.6-rc cycle and it can wait
for v4.7 merge window. Note that these changes have now been sitting
in Linux next for about two weeks so far as I wanted to make sure no
new issues are popping up.
* tag 'omap-for-v4.7/auxdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Simplify auxdata by using the generic match
of/platform: Allow secondary compatible match in of_dev_lookup
v4.7 merge window. These are not considered urgent fixes enough
for the v4.6-rc cycle, but we need them in v4.7 in order to drop
the last remaining board-*.c files for omap3 for v4.8 merge window.
On Nokia N900, we need to pass the MMC slot names for the legacy
user space to work. Let's do that using auxdata as the driver is
setting up things already with the pdata for legacy booting. Then
we can later on discuss if we may want to have some generic binding
describing where the MMC slots are on the device.
N900 also has had the ir-rx51 device driver unusable with multiarch
for a long time. Let's pass the dmtimer data in pdata for the driver
to get it going again. Then once things are working, we can eventually
change the driver to use just hrtimer and PWM framework. The driver
changes will be queued separately.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKi9zAAoJEBvUPslcq6VzfNcP+wRJTBKja7wxwxo8R2DKbYgw
oJXcldqdqJZIaHnJUR7uFDHZu1Jt6ZUM6WZQAEQTozPtMPnufM3VNgREz/LUqcCa
/vNQUBbvGwiaP3KOk3jNX1HuzSFhoAIQxTkE07FEBziZc0Soq7Cs//mUP1HZOrG2
a2+5MRM1TsVqIf0vSHUSZ9ez6iJpbpq2brdFb0upJwV9DFUcDouBBjd1atOPBJqW
mZ4myDqgbSSY7fL2cPEGnqVR0tqNTwrToWNxZFBP5T9IrI1oOe0MfI2vDgdHFf9h
mrVVITSRvwte751Xheze069ktzI1qJoIUDcyXN1+kTAC7jp3q7Kjo8fzqMVPfcqE
zn+Sj7C1l+1a0WjXjzhJhZgJBQkHwJubyJv3cGhb3HdkHbjIp7WURbcMF6gElEH7
J9eA+aHHyd3PW0mfdjuLY0gI5XEoBvRLiboZIewjQ9hIMgD+bKC0FZ/h313xo6eG
uPgobT9JBDmcv/EQw2eCH9kVvbf/gudNpCNgdoHcBf3V/EiSPl5PKxhgHtLM4WFj
S4rVg5X3MPglQay436SwSwmFYxk3WDo03qLDhn7DWPxxeCVuJDscvgzPhRuVKH4A
ox1a17UI1510M6bxoQLGFKK//Q2rNFEQb0YDImlwfsB7ZO/WV3mxn/KX4q2wDWhB
WlvMCPGZPi4K38utIQuW
=klmr
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "omap legacy boot vs dt boot fixes for v4.7 merge window"
from Tony Lindgren:
Legacy booting vs device tree booting fixes for omaps for
v4.7 merge window. These are not considered urgent fixes enough
for the v4.6-rc cycle, but we need them in v4.7 in order to drop
the last remaining board-*.c files for omap3 for v4.8 merge window.
On Nokia N900, we need to pass the MMC slot names for the legacy
user space to work. Let's do that using auxdata as the driver is
setting up things already with the pdata for legacy booting. Then
we can later on discuss if we may want to have some generic binding
describing where the MMC slots are on the device.
N900 also has had the ir-rx51 device driver unusable with multiarch
for a long time. Let's pass the dmtimer data in pdata for the driver
to get it going again. Then once things are working, we can eventually
change the driver to use just hrtimer and PWM framework. The driver
changes will be queued separately.
* tag 'omap-for-v4.7/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: n900 needs MMC slot names for legacy user space
ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51
1. Fix s5p-mfc driver probe on Exynos542x Peach boards (need to provide MFC
memory banks). On these boards this was broken for long time but
apparently no one enabled this driver till now.
2. Fix creation of debugfs entries for one regulator on Exynos4210
Trats board.
3. Fix probing of max8997 MFD driver (and its children) because
of missing interrupt. Actually the current version of the driver probes
(just without interrupts) but after switching to regmap and regmap-irq,
the interrupt will be mandatory.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXLcwaAAoJEME3ZuaGi4PXWfYP/REe1dyznGhMCvXFuv7EDQ2/
c2xhWBD00zFqjSp8yA/q7Z2zP2YUIL/y882BlvCCkmFda5LdME3Wh/afA+8/GAAR
4pJfnuxYC87ilNaWls1v7bAZc4O+F+SSU2EFI4LKbvxLv+KuwMx/TLeIJS6nEihk
IalnICEO/BQRYSvz8CWMYx0GeHiiKjWaKkgZJnlqGzkRhQQZNUoccn8Z7By8mBeO
ZGpBJCmg07+X1jWoc9e4YrY2of75IZMYkS2gbdck0mqj5VJn45wMJL/dJCwEPdjh
f2Zv+d3851Uj6NqJEyn/9wfXPi6dQGLT/3Hu+TB4QVX3KlwCiDUBwouSU2f5YTgI
b45AdrXlxakAybmQQnSSgKWbYClnJ6HaVVqB3RgolZZSZkJUmygtoYM72hUC7Z21
K6hbqzgMVw+crhmymDdOyNHpYfb3OLSf16pomDTq585wYGOenEGcKnnDlgoJmoFe
x4Ae6hRE/Hk4wQuWsh34KIKHzPkFaBJRQgFBBAOQR7Zqv7AN5FflQ2xxo32qYMvS
hr9ObkW4DYmB6wDtvpm6va2cBSrnXXK3uA0vH3O1IkmOqoI6NeVFYjA387OVyRLj
0MzrAgQLAiQPR2r2Xo3yhJGd6qZjlWq9R310jUJQonR0ZpVnQ5s52lNrt2qGtdmg
LJC3Q+ahxhMVGw+RVsgf
=l5HK
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-non-critical-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/fixes-non-critical
Merge "Samsung DTS non-critical fixes for v4.7":
1. Fix s5p-mfc driver probe on Exynos542x Peach boards (need to provide MFC
memory banks). On these boards this was broken for long time but
apparently no one enabled this driver till now.
2. Fix creation of debugfs entries for one regulator on Exynos4210
Trats board.
3. Fix probing of max8997 MFD driver (and its children) because
of missing interrupt. Actually the current version of the driver probes
(just without interrupts) but after switching to regmap and regmap-irq,
the interrupt will be mandatory.
* tag 'samsung-fixes-non-critical-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats
ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats
ARM: dts: exynos: Add MFC memory banks for Peach boards
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJXJzFfAAoJELQ5Ylss8dND/vYP/igakCxTIYX0FsqSSgTY0btk
OsFUxnFiAZ8r35P2QTaA8hlhP0Lv2CUA2vNA9DDmZgM6F5tKRhN9MVoQTBrdJs+2
UYY/bIH+aNUBExbURamdSQVJamMioxOrG++FyNed5gMZ9miIgACOyWJOFw7cEm52
w48qUeNdmxkPdh/mTXW1MB+JbyLBxO3vg8RJThx/a3q09DzBtHRgqKVFnpLDcILB
XzUIH+Uj6pdHmft5ySF4Ke0oQWmW1gP3soej/GDJi5GiVE0eq27/RiO+/6Eyv6Qj
l78LaM3IDvuZhR+zILE/C7gIoexLIB9Keq9QH/4FCN1wOLVKtZwts1WvdauqLpRc
cBCnsCQQCdhJAbBrYsMB6pAc0S981jfcjQh6HnZexcpyN4VageKvndPXrVRXy/HS
Ev6NXrkI19UBfH+LGLSGAkQFbKxCTpwoDMi1yCh/vBnYpp4tc8NcX17LbEsUIpAs
3Z0bDW4iBWIwsCmkb+wb3T/MDZ40YZyfUkRJciFyrOvaiCnC1jpdRCq5e3PHWcqs
kkJnSgitjrtxYb1r18GeLV1BYICqRyy62SM5HWfVFjOw6Ia0vdgmkM3mLFZb4sVw
qVBniwSs4OtkfuLBzqfQtscxFojqhjmh0XLl/IzG7hmG78yTP4pIfuz7yFOpqM2Y
MxhVBXYzX/txt0TP5HLQ
=35R/
-----END PGP SIGNATURE-----
Merge tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Merge "ARM: mediatek soc updates for v4.7" from Matthias Brugger:
- re-organize pmic wrapper code for easier and cleaner addiont of new SoCs and pmic wrappers
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
* tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: enable gpt6 on boot up to make arch timer work on mt7623
soc: mediatek: PMIC wrap: add MT2701/7623 support
soc: mediatek: PMIC wrap: add mt6323 slave support
soc: mediatek: PMIC wrap: add a slave specific struct
soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()
soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct
soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: split SoC specific init into callback
soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
soc: mediatek: PMIC wrap: don't duplicate the wrapper data
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI4aZAAoJEN0jrNd/PrOhlhEQAJsk8OhsyqMUpi+kUBPwvR+x
V/WAoHsC2P41l0J8kltGyEW8hVt9jjq1xKoUjYQMycEVK3+uwHWSAmPxLvB4I+OM
6sdZ7fzwbQbC6Om6XT0fdXoi9ryyWWW7N3yil53wJUCbgrDVehd3qG+k56yyvyc4
MqEfGelAtIcj365Oq4aOmLe5cGXEQ1rAVdTVAG1jRhXe+4ItnZwbXJB3Tavp6SK6
euxrrVf9KoW9fhH4Y4SL6l/9A5qDSYr3p1SitNgMTZmvPZa58EJ1Bu/y6OoefsD0
Vi4MYbKyltuNjo6vHRYrUfLXwd9bRFVDgZmErxibI3RXUew8RKxmZzGItaqsxesc
YzEcfZ7hZP5qIK3c8uvuw3XRIenHbg/Dk0mGQ4OSJx+jyf5V6BFPjfpESykE/M0b
C71p2wEVRBWSwOpNY7+AOKobKnxK4lWEymd5RsneZKpZpjtYy67Mh/AFuUj64IiU
AlQoPOIRX4qvf1T4RdYq/jqYp0tSxHVwxwqYg7tQu5fWo5KjZB/KBiqCgsM8RC5i
2Pv7upI9feAwffydljLJvAgKiF2GzOpjj+eFdZZc/5OCvLaDULdI9VHcpMPuJrt/
yI0ZVjnzkmTTBzNjoTPzglbwWCdJ2cA0iZeIgdtupLAMHvDALltAE1vGSu1TBGhF
rGAOcNZ1yW3X5UxbXL5X
=NYo3
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late
Merge "ARM: tegra: Enable the XUSB controller" from Thierry Reding:
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
* tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable XUSB on Nyan
ARM: tegra: Enable XUSB on Jetson TK1
ARM: tegra: Enable XUSB on Venice2
ARM: tegra: Add Tegra124 XUSB controller
ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXMICzAAoJEGt2WQeBR3CeCD4P/A5a3DwE7hBTx3USQUAA88uC
YPEc5KbjbTqDCWNUfUy89IjrNfk8cbrdo9uJ7XgxEnIwc4Xcc7LKqYOrKCqteZ/j
JUs29VMIugTwWq53VJilK26Tjq1J3QkjIheU+roRNN65D3tBIstXh/jj1R1mSzXb
41BwUmzrVG4g1lhlwapCk8lVsZibWP/Z/jiL0yYnTkgG/Uye2J85qyO+aAt5zQyY
BvdEH4e3lHX/ttOz4lru+ojGFeHusyF3iKlNzc4KOe8DnjR1TaYNzcZVPEDYY08M
b3P252qFZflk8g5qmohjrQrdfxcnqPQjCDyxZRJsSeiLu+VELZBZeUXg146eMPUG
szEQMURMXch/1X5ekiItPSk2K8W0UdVTgZ3R2Y9KwVBqi0AWoJ5+uIgTUYNV6VbQ
4miYb9dc4yyi+JiS66mL9ax3jbTzhQt9txWAAqr+yZ48j8i1gbFxQiJB/qieuDjx
KCZeFs5mlb5y/fbbEVTGqBPC9TYx7tFE7xA/apoC6WEYdJnHQ37u5szG8+HMyQiq
N917Rcz98ya8yyCNebjmWI7g8ol6o/zz/8EdpsB+1oVgFW7rKSuUrnFbjU82nAIB
R8v7dA6C0weEy0IUJs0n+Cwq1XXfWU0gxK7eMpsaCgjnsAz8mVefB/54RRqfSaMT
ybASdWPtBM6Ab1Tv/AQ/
=XUlQ
-----END PGP SIGNATURE-----
Merge tag 'aspeed-for-4.7-arch' of https://github.com/shenki/linux into next/soc
Merge "aspeed arch tag for 4.7" from Joel Stanley <joel@jms.id.au>:
This is the initial pull request for the Aspeed BMC SoCs.
I put 4.7 in the subject for this and the subsequent requests but if it's a bit
late in the cycle then I understand.
Following review I got rid of the board file by pushing the functionality out
to a watchdog and clock driver, so it's just the Kconfig bits. I've also added
myself to maintainers for the Aspeed arch and drivers as I intend on looking
after them.
* tag 'aspeed-for-4.7-arch' of https://github.com/shenki/linux:
arm: Add Aspeed machine
- Allow TWD to be used on UP kernel, as the PREEMPT-RT and cyclictest
shows that TWD has a slightly better performance than i.MX timer.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXKK+/AAoJEFBXWFqHsHzOJr4IAJzktSWFIAYlSPAfwh3Vpnf7
6kW2fTGN6QzRBXR20iTCBDgdhWEKRztRlIEPFQ7nae4kLmdoQZ5WNxaNNUUq2oFB
eePYpcogNebc38kfBq7Ou905UsLYloUn3TWELmhN95diMSkDctD5KfeRurRdGHsL
yszvANaHo6P4RM55SWItgGxeCK7lDaMQyWou5yWiBUgozQ5oOO8AkNv4va/5jxhw
sg8zSCRKPLEHdSowUAooQhOUrNkydbS4B9paXn5yPIbkkAu6csN8QKHynA1Vm8z/
nHy5F0srnRzprmVWs0z2+YjiMdEZj/t9NMCNk47gNrauRYosVP98wX9qoBGq93Q=
=5SG2
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "The i.MX SoC updates for 4.7" from Shawn Guo":
- Allow TWD to be used on UP kernel, as the PREEMPT-RT and cyclictest
shows that TWD has a slightly better performance than i.MX timer.
* tag 'imx-soc-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: always use TWD on IMX6Q
- Clock framework cleanup with the "Remove CLK_IS_ROOT" series
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlcjaYUACgkQCwYYjhRyO9UZBgCfancMYVmODhUbS2FsaeGQqsgX
Q2EAoJuV6WkKlURVzGn3RMacRaNXwVRF
=/d5p
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.7-1' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc for 4.7" from Gregory CLEMENT:
- Clock framework cleanup with the "Remove CLK_IS_ROOT" series
* tag 'mvebu-soc-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: dove: Remove CLK_IS_ROOT
ARM: orion5x: Remove CLK_IS_ROOT
ARM: mv78xx0: Remove CLK_IS_ROOT
clocks to DaVinci clock framwork and are
required to support USB PHY clock setting from
USB PHY driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJXIzJyAAoJEGFBu2jqvgRNGywQAJaq3OHDj1ANi2ywu2LRqFCT
jwxDAMm5FOBueQWLyA0ZT9oKF6a0ZAAvaRPFioozx/eIHLBa2AAKUpbfbZ6DB3Hd
bF04LbCV6tkKTtGF3bOyHr/Sb+61xxJMoYpZnvqz8PlpzMqtntIKfBWqNqd/R+lz
XE7WiTHgN8nrgQLkrT3pcr3AXhygnsu6p5CyC6pqwhmfQfZLFVjgIZiwqmmTd614
HYCwiBkYQvOp6+CTlbPXWLoekunu/87KBnQa8mHiOnDz4SzM3tokSvSvDxsxOkHj
1cVYJIqP6GbxIQavqRY3BLHXnCnV+On2pkGT1H7xhnosQM5EldfJ1zRibDV75BeI
ynNYoLzStu9W7K07XoZrPHOK4cp3qvWDpYhlBVuDYFN9o5qBGq75NYDmSU2fBS64
3FaSdVEHtPlCnTSm699xoga91cwlfNqSs9gRhUzEokszrFxDONDSNgAiYs5UcI4k
9YC0gEFC6/j7dBM4YSOLtoHsF8J//Gyx47sH4zD/0YwK20zt3GL6cZ/KOXe1Ielu
6pxR0Zz3CEIlBTq59QxdSJ9lTcPMasfqJISFQyffLMLlU67gW6+b2NvGoXSIYC/u
egGsgzhFp/g0VkineTy5K2PhAQ7c8cur/DgNyJX7ftvVxw14m/TMyrPxNNrGUVem
59zpwKenUpueloJqeion
=3dg+
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.7/soc-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci SoC updates for v4.7 (part 2)" from Sekhar Nori:
These patches provide ability to add non-PSC
clocks to DaVinci clock framwork and are
required to support USB PHY clock setting from
USB PHY driver.
* tag 'davinci-for-v4.7/soc-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: use clk->set_parent for async3
ARM: davinci: Move clock init after ioremap.
This includes a few nonfunctional clean-ups for NXP LPC32xx:
* removed leftover from restart code migration to a watchdog driver
* removed dead code leftovers from migration to CCF driver
* fix double const qualifier
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJXIo/gAAoJEKo94to8JTllBewP+gKeJmKR4DBWMyISqH/ZfqHm
acpyL45BPcdmuhcUZhOyV4jxjpNDXvWkfshoAwDM87cy4qgA4UceGgdu8nfjvuF3
1DUvU4g6qbQJIp8h/uLHE4CiLhqTwuuu2i4YMbR6E+hEuWx2D7MLJQP1zqbA6d5E
rl6AX1Bf6ajN5lZq8V0KSlvgP6N0Wew1h36D5APy0MCrijS1D9cMBOue1CyDh4pP
Vfwfr3e8dMchtTQvoozoOQN1LW9xcBNkFifdzKLp+P20s5hiB+uBDkQ9VBQr3hKp
YztdKJsYcHgZqUkNM54jQ3i+xxM1Inq8IaEQbqjTJyEf4LIpTTpEn93nGG/Nx3+T
4DKc+Ce2BI74qvqwt2seeNr722ftf6kCa37JpvfusaHotELMPB0GCrONgJPS9Udk
g9zEAZrJ27zeFAfr7LA3Agywq3Lr1JhHndEodCcMxbBHY33HBFNlBqCWy8YqQyQv
IsJGF1Z91xf8WXsEIzID3tCM7nb0c4/S2IEKamQAq98HG7dXOGsAgrJqqFiJEoN0
maeLt7UPIqxORjZk0k6uYC4nE5eZSlID4jKNJF2BB2orJs00z2AC5/H4dsZ488DI
gcJd9rfIFGrzhCiFAiUnOz5CY1ZyxtCTdxvfvwIioPxy6MvizBR4G52EgyFA7rN+
d/8qYw5UCiLpf/ptDzkY
=029c
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-soc-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/soc
Merge "NXP LPC32xx mach updates for v4.7" from Vladimir Zapolskiy:
This includes a few nonfunctional clean-ups for NXP LPC32xx:
* removed leftover from restart code migration to a watchdog driver
* removed dead code leftovers from migration to CCF driver
* fix double const qualifier
* tag 'lpc32xx-soc-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: lpc32xx: remove duplicate const on lpc32xx_auxdata_lookup
ARM: lpc32xx: remove leftovers of legacy clock source and provider drivers
ARM: lpc32xx: remove reboot header file
As a set of driver-provided callbacks and static data, there is no
compelling reason for struct iommu_ops to be mutable in core code, so
enforce const-ness throughout.
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This adds the Aspeed ast2400 BMC SoC to the build.
The SoC has six UARTs so we need to enable the appropriate options for
SERIAL_8250
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds a common device tree for all fifth generation Aspeed systems,
and a board specific device tree for the ast2500 evaluation board.
Signed-off-by: Joel Stanley <joel@jms.id.au>
A common device tree for all forth gen/ast2400 systems and a board
specific dts for the Palmetto OpenPower developemnt machine which was
used for testing.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Aspeed devices are a common Baseboard Management Controller (BMC)
system on chip containing an ARM9 or ARM11 core, off-chip DDR RAM and
support for a large number of peripherals.
This patch adds basic support for the ast2400 and ast2500 machines,
capable of booting to a prompt in QEMU (-M palmetto-bmc), on an
Palmetto OpenPower development machine, and on the ast2500 EVB.
Signed-off-by: Joel Stanley <joel@jms.id.au>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXL7HfAAoJEHm+PkMAQRiGYe8IAJBGaPUq38EJh2YOV+AQf9v6
t/alhwB3DUE1E0zjLy7I7JJ+xDXtKjZh9fS6OFuIS8Q3RIrBteIJ/oH8TPpt7yZ/
SnP6rYPvYD6CImTyrh7+ORL/udEwJX8+YqFYAgUAq167gvpDjYj8r26VzdIaIN4/
oBbL8NrQNWfODieywYyhUoitVhwMz09zmBfLtGVks4vd2jUJk2Fdd9cOtGV5tRfk
DPndPgyQtbr8W0mKovV8sT9WkQeV5TsUr4MLgf7hjnAGYQ8+0KamkzzVVLBeBiiw
uazyrOCFkddZp+N7KbmbOmazV/yULRuLGgDjVKazoCsOaKOvoGCzrCk7daOPy6Q=
=CegX
-----END PGP SIGNATURE-----
Merge tag 'v4.6-rc7' into drm-next
Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
Enable pll3 and pll7 clocks that are needed by display clocks.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There are 3 kinds of OLinuXino Lime2 boards.
One without any on board storage, one with NAND storage and one with
eMMC storage. This patch adds the eMMC variant of boards.
eMMC storage is different from a regular SD card in that it is soldered
on the board and cannot be changed. Additionally, it shares pins with
the NAND module and with the second SPI port.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[Maxime: Removed the change log from the commit log]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pull ARM fixes from Russell King:
"These are a number of updates to fix a few problems found in the ARM
nommu code over the last couple of years, caused mostly by changes on
the mmu side"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8573/1: domain: move {set,get}_domain under config guard
ARM: 8572/1: nommu: change memory reserve for the vectors
ARM: 8571/1: nommu: fix PMSAv7 setup
Pull libata fixes from Tejun Heo:
"An ahci driver addition and updates to ahci port enable handling for
some platform devices"
* 'for-4.6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ata: add AMD Seattle platform driver
ARM: dts: apq8064: add ahci ports-implemented mask
ata: ahci-platform: Add ports-implemented DT bindings.
libahci: save port map for forced port map
The usage of slash character causes failure when creating regulator
debugfs entry.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.kozlowski: Write commit message]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The MFC nodes with the memory regions reserved for memory allocations
are missing in the Exynos5420 Peach Pit and Exynos5800 Peach Pi DTS.
This causes the s5p-mfc driver probe to fail with the following error:
[ 4.140647] s5p_mfc_alloc_memdevs:1072: Failed to declare coherent memory for MFC device
[ 4.216163] s5p-mfc: probe of 11000000.codec failed with error -12
Add the missing nodes so the driver probes and the {en,de}coder video
nodes are registered correctly:
[ 4.096277] s5p-mfc 11000000.codec: decoder registered as /dev/video4
[ 4.102282] s5p-mfc 11000000.codec: encoder registered as /dev/video5
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Enable CGROUPS support, so we can boot userspace that uses systemd on
top of kernel configured using this defconfig. The systemd userspace
depends on cgroups and without them, it dies in mysterious ways.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add node to support SAMA5D4 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add node to support SAMA5D3 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add node to support SAMA5D2 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Merge fixes from Andrew Morton:
"14 fixes"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
byteswap: try to avoid __builtin_constant_p gcc bug
lib/stackdepot: avoid to return 0 handle
mm: fix kcompactd hang during memory offlining
modpost: fix module autoloading for OF devices with generic compatible property
proc: prevent accessing /proc/<PID>/environ until it's ready
mm/zswap: provide unique zpool name
mm: thp: kvm: fix memory corruption in KVM with THP enabled
MAINTAINERS: fix Rajendra Nayak's address
mm, cma: prevent nr_isolated_* counters from going negative
mm: update min_free_kbytes from khugepaged after core initialization
huge pagecache: mmap_sem is unlocked when truncation splits pmd
rapidio/mport_cdev: fix uapi type definitions
mm: memcontrol: let v2 cgroups follow changes in system swappiness
mm: thp: correct split_huge_pages file permission
After the THP refcounting change, obtaining a compound pages from
get_user_pages() no longer allows us to assume the entire compound page
is immediately mappable from a secondary MMU.
A secondary MMU doesn't want to call get_user_pages() more than once for
each compound page, in order to know if it can map the whole compound
page. So a secondary MMU needs to know from a single get_user_pages()
invocation when it can map immediately the entire compound page to avoid
a flood of unnecessary secondary MMU faults and spurious
atomic_inc()/atomic_dec() (pages don't have to be pinned by MMU notifier
users).
Ideally instead of the page->_mapcount < 1 check, get_user_pages()
should return the granularity of the "page" mapping in the "mm" passed
to get_user_pages(). However it's non trivial change to pass the "pmd"
status belonging to the "mm" walked by get_user_pages up the stack (up
to the caller of get_user_pages). So the fix just checks if there is
not a single pte mapping on the page returned by get_user_pages, and in
turn if the caller can assume that the whole compound page is mapped in
the current "mm" (in a pmd_trans_huge()). In such case the entire
compound page is safe to map into the secondary MMU without additional
get_user_pages() calls on the surrounding tail/head pages. In addition
of being faster, not having to run other get_user_pages() calls also
reduces the memory footprint of the secondary MMU fault in case the pmd
split happened as result of memory pressure.
Without this fix after a MADV_DONTNEED (like invoked by QEMU during
postcopy live migration or balloning) or after generic swapping (with a
failure in split_huge_page() that would only result in pmd splitting and
not a physical page split), KVM would map the whole compound page into
the shadow pagetables, despite regular faults or userfaults (like
UFFDIO_COPY) may map regular pages into the primary MMU as result of the
pte faults, leading to the guest mode and userland mode going out of
sync and not working on the same memory at all times.
Any other secondary MMU notifier manager (KVM is just one of the many
MMU notifier users) will need the same information if it doesn't want to
run a flood of get_user_pages_fast and it can support multiple
granularity in the secondary MMU mappings, so I think it is justified to
be exposed not just to KVM.
The other option would be to move transparent_hugepage_adjust to
mm/huge_memory.c but that currently has all kind of KVM data structures
in it, so it's definitely not a cut-and-paste work, so I couldn't do a
fix as cleaner as this one for 4.6.
Signed-off-by: Andrea Arcangeli <aarcange@redhat.com>
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: "Li, Liang Z" <liang.z.li@intel.com>
Cc: Amit Shah <amit.shah@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
are for the OMAP platforms, quoting Tony Lindgren:
Fixes for omaps for v4.6-rc cycle. All dts fixes, mostly
affecting voltages and pinctrl for various device drivers:
- Regulator minimum voltage fixes for omap5
- ISP syscon register offset fix for omap3
- Fix regulator initial modes for n900
- Fix omap5 pinctrl wkup instance size
The rest are all for different platforms:
- Allwinner:
Remove incorrect constraints from a dcdc1 regulator
- Alltera SoCFPGA:
Fix compilation in thumb2 mode
- Samsung exynos:
Fix a potential oops in the pm-domain error handling
- Davinci:
Avoid a link error if NVMEM is disabled
- Renesas:
Do not mark an external uart clock as disabled, to allow
probing the uarts
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVyud6WCrR//JCVInAQKhXBAAir8+FCYQGLzwFQrCHTRa6zJq0sGUOLss
DBawxezSxtcz9LYn2s9EI5W7yqs/vtjILNTtV3bNNHZTrn/cE8Jpvo+kjNK096PP
3m0LS20pbGV/629JXiuf55pWugoXUvQNP4kTcuW8dQzQWWuzv2QfJwtW776Q8rOQ
ZRvh6uUsCgsc6JCCnZESVAnWQ7VA5YpTpZRhokhogdU0r6VTuHfOf8NPD10kiel+
jpayjC852MPJtS+1JI/d9vIydsSPHbfS8lkVp0rX7oep/Xjp6C3HGSNH+KkLTjXf
9q6uVm21Kko24wd3RAFYNFshNmD80j+BQJN+59gx7jUnQsVA+WZkNlKSPD1svf+R
9Ym+fGVn+UgsU/rSW+hhTYft7ao6Tud+W80QARFgWX6B3E3xF/ExJ9TE07hg0sK7
b+JZAFoSnEut6yTq5g99/YdvDLfqANPo3f3968bl18rKh15Iso/u177KR3cbMPBw
rKFXg9fkmjd3g5mUUekYvaEKbb+bEeLaAT+2Cri3diSW7odTzsLQSXELS0UTOWfx
TLTJSkmgxvABhdZZPQscHBvxwXPGQO8S479GGXG2xcI+tiT7ZDJPZeVm0P99B8WB
Y2VjTjuc49ZALrzT93nY9nInyjhzI5NsnccG5Khw+qoxlZ3+H+N2tVkhwt6+FNcg
vl8vcFbj9hM=
=ymz3
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple last-minute fixes for ARM SoCs. Most of them are
for the OMAP platforms, the rest are all for different platforms.
OMAP:
All dts fixes, mostly affecting voltages and pinctrl for various
device drivers:
- Regulator minimum voltage fixes for omap5
- ISP syscon register offset fix for omap3
- Fix regulator initial modes for n900
- Fix omap5 pinctrl wkup instance size
Allwinner:
Remove incorrect constraints from a dcdc1 regulator
Alltera SoCFPGA:
Fix compilation in thumb2 mode
Samsung exynos:
Fix a potential oops in the pm-domain error handling
Davinci:
Avoid a link error if NVMEM is disabled
Renesas:
Do not mark an external uart clock as disabled, to allow probing
the uarts"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: davinci: only use NVMEM when available
ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel
ARM: dts: omap5: fix range of permitted wakeup pinmux registers
ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode
ARM: dts: omap3: Fix ISP syscon register offset
ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges
ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges
arm64: dts: r8a7795: Don't disable referenced optional scif clock
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
This outer cache allows to control active ways independently for
each CPU, but currently nothing is done for secondary CPUs. In
other words, all the ways are locked for secondary CPUs by default.
This commit fixes it to fully bring out the performance of this
outer cache.
There would be two possible ways to achieve this:
[1] Each CPU initializes active ways for itself. This can be done
via the SSCLPDAWCR register. This is a banked register, so each
CPU sees a different instance of the register for its own.
[2] The master CPU initializes active ways for all the CPUs. This
is available via SSCDAWCARMR(N) registers, where all instances
of SSCLPDAWCR are mirrored. They are mapped at the address
SSCDAWCARMR + 4 * N, where N is the CPU number.
The outer cache frame work does not support a per-CPU init callback.
So this commit adopts [2]; the master CPU iterates over possible CPUs
setting up SSCDAWCARMR(N) registers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Recursive undefined instrcution falut is seen with R-class taking an
exception. The reson for that is __show_regs() tries to get domain
information, but domains is not available on !MMU cores, like R/M
class.
Fix it by puting {set,get}_domain functions under CONFIG_CPU_CP15_MMU
guard and providing stubs for the case where domains is not supported.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 19accfd3 (ARM: move vector stubs) moved the vector stubs in an
additional page above the base vector one. This change wasn't taken into
account by the nommu memreserve.
This patch ensures that the kernel won't overwrite any vector stub on
nommu.
[changed the MPU side too]
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) broke the support for
MPU on ARMv7-R. This patch adapts the code inside CONFIG_ARM_MPU to use
memblocks appropriately.
MPU initialisation only uses the first memory region, and removes all
subsequent ones. Because looping over all regions that need removal is
inefficient, and memblock_remove already handles memory ranges, we can
flatten the 'for_each_memblock' part.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add ability to override power management bits of 310 controllers
(dynamic clock gating and standby mode) through OF entries. As the
saved register is only applied when working on a supported controller,
it is safe to save the settings.
In order to maintain existing behavior, if the settings are not found
in the DT, the corresponding feature will be enabled.
Signed-off-by: Brad Mouring <brad.mouring@ni.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Once entering machine_halt() and machine_restart(), local_irq_disable()
is called, and local irq is kept disabled, so the local_irq_disable()
at the end of these two functions are not necessary, remove it.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enable pll3 and pll7 clocks that are needed to drive display clocks.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CHIP has a composite output available muxed with the microphone in the
micro-jack plug.
Enable the composite output in its DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.
Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it should be moved to sun5i.dtsi
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Configure the two accelerometers sharing GPIO line 82 as:
- Open drain so that they can share the same interrupt line.
Configure the corresponding interrupt pin:
- Trigger on the falling edge since open drain implies that we
do not actively drive the line high, but we will actively drive
it low to generate interrupts and then it moves from high to low
i.e. a falling edge.
- Pulled up so the line will be biased to high unless an IRQ
is active on any device on the line, and thus it goes high
again after the interrupt is deasserted.
Cc: linux-iio@vger.kernel.org
Cc: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver for Micrel PHYs is required for the Apalis iMX6 module
plugged into a Ixora carrier board featuring an on-module Micrel
KSZ9031 Gigabit PHY.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GPIO-based bitbanging I2C driver is required to make HDMI work on
the Apalis iMX6 module plugged into a Ixora carrier board featuring a
DDC channel to read a screen's EDID being hooked up to regular GPIOs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6ul-14x14-evk has a wm8960 codec connected via SAI2 port.
Add support for it.
Thanks to Petr Kulhavy <brain@jikos.cz> for the hint on initializing
the PLL4 frequency to get a correct MCLK.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen when building with 'W=1' option:
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-1p1@110 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-3p0@120 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-2p5@130 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddcore@140 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddpu@140 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddsoc@140 has a unit name, but no reg property
Fix them by removing the unneeded unit-addresses.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidth for AMBA AXI bus.
The WCORE bus bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC.
Exynos542x has the following AMBA buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed correlation between sub-block and clock:
- CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI
- CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI
- CLK_DOUT_PCLK200_FSYS for FSYS's APB
- CLK_DOUT_ACLK200_FSYS for FSYS's AXI
- CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI
- CLK_DOUT_ACLK333 for MFC's AXI
- CLK_DOUT_ACLK266 for GEN's AXI
- CLK_DOUT_ACLK66 for PERIC/PERIR's AXI
- CLK_DOUT_ACLK333_G2D for G2D's AXI
- CLK_DOUT_ACLK266_G2D for ACP's AXI
- CLK_DOUT_ACLK300_JPEG for JPEG's AXI
- CLK_DOUT_ACLK166 for JPEG's APB
- CLK_DOUT_ACLK300_DISP1 for FIMD's AXI
- CLK_DOUT_ACLK400_DISP1 for DISP1's AXI
- CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI
- CLK_DOUT_ACLK400_MSCL for MSCL's AXI
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the NoCP (Network on Chip Probe) Device Tree node
to measure the bandwidth of memory and g3d in Exynos542x SoC.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.
The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC
The LEFTBUS is parent device with devfreq ondemand governor
and the rest of devices depend on the LEFTBUS device.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD
: The minimum clock of ACLK160 should be over 160MHz.
When drop the clock under 160MHz, show the broken image.
- ACLK133 clock for FSYS
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.
The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus
on runtime and the buck1_reg (VDD_MIF power line) supplies the power to
the DMC block.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.
Following list specifies the detailed relation between the clock and DMC block:
- The source clock of DMC block : div_dmc
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Provide a helper to indicate whether we need to perform special handling
for boot identity mapping aliases or not.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Pratyush Anand <panand@redhat.com>
The real limit is the top of the visible physical address space with
the MMU turned off. Hence, we need to limit the crash kernel allocation
running-view physical address of the top of the boot-view physical
address space.
Reviewed-by: Pratyush Anand <panand@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For kexec, we need more functionality from the IDMAP system. We need to
be able to convert physical addresses to their identity mappped versions
as well as virtual addresses.
Convert the existing arch_virt_to_idmap() to deal with physical
addresses instead.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When the kernel crashkernel parameter is specified with just a size, we
are supposed to allocate a region from RAM to store the crashkernel.
However, ARM merely reserves physical address zero with no checking that
there is even RAM there.
Fix this by lifting similar code from x86, importing it to ARM with the
ARM specific parameters added. In the absence of any platform specific
information, we allocate the crashkernel region from the first 512MB of
physical memory.
Update the kdump documentation to reflect this change.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Pratyush Anand <panand@redhat.com>
imx6sx-sdb has custom operating points entries because it has one
power supply that drives both VDDARM_IN and VDDSOC_IN.
As per the MX6UL datasheet we have the following minimum voltages for
198 MHz operation (after adding the 25mV margin value):
VDDARM_IN = 0.975 V
VDDSOC_IN = 1.175 V
So use 1.175V for the 198MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
mtdparts is passed from command line, so there is no need to have a
default partitioning in device-tree.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add initial support for imx6ul pico hobbit board.
For information about this board, please visit:
http://www.wandboard.org/images/hobbit/hobbitboard-imx6ul-reva1.pdf
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
I.MX6Quad Plus has a slightly different version of PCIe core than reqular
i.MX6Quad.
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
There several changes are done here:
- Convert the property to be in bytes
Besides that this is a common practice for such property, the use of a value
in bytes much more convenient than handling the encoded one.
- Rename data_width to data-width in the device tree bindings
The change leaves the support for the old format as well just in case someone
will use a newer kernel with an old device tree blob.
- While here, replace dwc_fast_ffs() by __ffs()
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The davinci_mmc driver no longer uses platform resources for getting dma
channels. Instead lookup is now done using dma_slave_map.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This flag is a no-op now (see commit 47b0eeb3dc "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Pincontrol is not yet ready for all PXA platforms.
For example, a legacy platform, if PINCTRL was activated, will fail its
calls to gpio_request() or gpio_direction_output(), as the pinctrl
driver might not be available, such as for pxa25x and pxa3xx.
As a step forward, activate pincontrol for all device-tree available
machines, ie. pxa27x device-tree based and pxa3xx device-tree based.
If it appears later that pincontrol is also required for legacy
platforms and if the mfp->pinctrl conversion can be achieved, then
PINCTRL will be activated for the whole PXA architecture.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
A single regulator fix
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXI42/AAoJEBx+YmzsjxAgtVQP/0OTC5jU7+jr3rfuVQbb4ufT
YuTp0DztBP9YfedFcphwF42Py3LBl11BdTXy6qbMvkcGcdxfaSYyOGgC+Of1ZyQ5
8zlxj8aK6aM9T16hdegYMnolhriJefBr+HioRSXuABexg+0S5alkgRcJILiCJBSJ
h3g7cYYLp1gMzE7Ik1IMT1dLFDaUlonVeeHMtcJqEcyEPhDKwvHXeqLVJiTn+qcO
b9pGNwCqRXqMRygsedtx2O0nSGdk9lRmJFD5N+ePS3Y3NWri9+DtXwSfE6+1we9Z
uOrGheQBqbRDZGdJZDsIam8++uskSsFfX2CRq2+T4CHkN6JNhGCsk2I83jws07YV
LQkl/RohCmUiB0WwFjuuc5+MUtVFIoYR+65U20AqvYB7FAys5BRqfQIPCRqrcaIE
1y2woAwdoturnNdLGsPGzWD2UBumE9Ib8CwFWzzIVjISH6N7Tus1jKaOwi1TnSlk
s/hxwGy/1Aa04e6NrxvJUeE/2ftBNtELrszLxs/1kzQDGtjzEf2RXa3h4X/cJEn4
3hSvD4diFL4NfAJQompUHfP4PaqPAwOHW6V1tEQ7pz2uyXzJa++QzIE2ia/i3k72
I2jhCqRjzkGTU4CO8ghjISd+6WiktAR1Ya7t4BaDYqYVcVfAwBsMsX8drKDN2PNB
BBzA/BlQ3H+n6EksY/T3
=C4f7
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.6
A single regulator fix
* tag 'sunxi-fixes-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
The davinci platform contains code that calls into the nvmem
subsystem, but that might be a loadable module, causing a
link error:
arch/arm/mach-davinci/built-in.o: In function `davinci_get_mac_addr':
:(.text+0x1088): undefined reference to `nvmem_device_read'
arch/arm/mach-davinci/built-in.o: In function `read_factory_config':
:(.text+0x214c): undefined reference to `nvmem_device_read'
Also, when NVMEM is completely disabled, the functions fail with
nonobvious error messages.
This ensures we only call the API functions when the code is actually
reachable from the board file, and otherwise prints a unique log
message.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: bec3c11bad ("misc: at24: replace memory_accessor with nvmem_device_read")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the XUSB pad controller and XUSB controller (implementing an XHCI
interface) in the multi_v7 default configuration.
The XUSB pad controller is built-in because it is needed by PCIe, which
in turn provides the onboard ethernet used for network boot on a Jetson
TK1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable the XUSB pad controller and XUSB controller (implementing an XHCI
interface) in the Tegra default configuration.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Jetson TK1 board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Venice2 board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The ARM architecture mandates that when changing a page table entry
from a valid entry to another valid entry, an invalid entry is first
written, TLB invalidated, and only then the new entry being written.
The current code doesn't respect this, directly writing the new
entry and only then invalidating TLBs. Let's fix it up.
Cc: <stable@vger.kernel.org>
Reported-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIikdAAoJEBvUPslcq6VzEQUP/3GFHR4PuyVGkzRTLO3lbYRc
Otml75jcLJqJSpWLioMnZJWnOT/6RQ7M1zxUf1BcXI1TXosXqwzxNiye9fySuIET
CNQ6VgvQkhjKtHV+qncT3NkbKsScLoNSJvijMrF2NDe2QqFynL5KZHAoF2EO1ZvD
PjnW5Gd+EODwnDhz60jVukXrhCi0pbT1zY7iJm2N7DixPc0gaqYxoGMbBklV+nNU
LVE7UXRC0I/+78deZy1y4IrQIQ24hnueOx8QXBjyyv/5xiuXQoDxEX0mlGDMTHB3
3WE5wbfCm/lkJR8xlhX9Ms5UHvKk0CeuWg3h3LjUVG7oDTa2/7IlWJTITVA+sw6D
tKxYa7X5lseRewXxNefb4dunbxZKvHQZXAGrNz09R+PVIzi2Q89DXHVjRkYCrCk+
BqJQ8/xE/pVJsr7pUvvyr8t8sNEGRk/EZuJi9T9hnGjQ8zedlbBdcLCxGTXK4cXN
4mseO7uCzgI2KucEAc9NEnOgDeFwpIS/zf/jJk5d2NQCyU+4JYXgNwUZLX2Hu76/
AtWhnp82s41Lpz2brMwUhTF/YqJo/32OaYDjfvZjbK3Td/queeqSk5H/HD5irLVZ
UQG5QEHInfdVwahRRtppuhdb7sp6RNCqD8c+KH7hPIAerCWwv6pH4TDuxGPWebiv
o+lXevTEYvI3frUeuwWG
=LRKX
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Part two of device tree changes for omaps for v4.7 merge window" from Tony Lindgren:
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
* tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx-idk: Include Industrial grade thermal thresholds
ARM: dts: am57xx-beagle-x15: Include the commercial grade thresholds
ARM: dts: am57xx: Introduce industrial grade thermal thresholds
ARM: dts: am57xx: Introduce commercial grade thermal thresholds
ARM: dts: add DTS for Baltos IR2110
ARM: dts: add DTS for Baltos IR3220
ARM: dts: split am335x-baltos-ir5221 into dts and dtsi files
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
ARM: dts: dra7x: Remove QSPI pinmux
ARM: dts: omap5-board-common: describe gpadc for Palmas
ARM: dts: twl6030: describe gpadc
ARM: dts: dra7xx: Fix compatible string for PCF8575 chip
ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet
ARM: dts: OMAP36xx: : DT spelling s/#address-cell/#address-cells/
ARM: dts: omap5-cm-t54: DT spelling s/interrupt-name/interrupt-names/
ARM: dts: omap5-board-common: DT spelling s/interrupt-name/interrupt-names/
Mostly enable drivers used on various boards as loadable modules
where possible. Also one warning fix related to RXKAD changes
heading to v4.7. And run make save_defconfig to shrink down the
size a bit.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIia+AAoJEBvUPslcq6Vz+GgP/3ciqDZeUrfpiDLtekpwWPuC
9XmR2PTmca7ShagqcmGQ9P/jzAQWvT8VDo91WqRpuGP/VpOC5+tYQVje9wgMFDZ/
a2RfXPJt44xcyTNnvb887YnBafe1rK/p1cyqwX3hF8dj/k5SvoU4ObyvlOPid3JS
hD6Zw9UXd3/Mn3QT9ibf9a3ZagN0DxDtPxWw7GLoLDZATGJynaaqimum+VUkezci
57WNCD6nMYsDWL+rtqslgyt2HXQCWZzUGWcz1Y1z5j0akOjCMqvrYZj+BpZf6IZY
4xzEU4rclvxTigIjm0Oh+FCdjoW4IxEDLRk+Wp6P7chSC0UvjQ29mQeC06ij0f3w
b3/iLqjM7YD1VjKmSDViedF0XUvD1SJMn3yDjGXpbcKzzqwcmbCglTr6igUOuXaJ
NOcOYgzQjIOhnDD7kJJeXHQKWK5tNlHXT7HY7JhB/BjgoVJ+yiiv9BRyih45qO26
MF8WqKncUEBAxwQ/sWInkDr/IKhBkrlHBFWlfYEc0vJ0nw/AUth88mBuloT5aSAR
hp+ephAsHr+Mo4y3TNW/TXpoMz6kbwvTtgi/1Rr07kt0aEhnjn+u310Q3nZ2cmVc
es98xC5Ky08+SB65PIvLZSdEoQ+in0g9IiFCXqLsBA37ZtLByBWRTZFVmM6GqNQ8
xMLhNzzgVRfz6yaiADSh
=lX8d
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Merge "Defconfig changes for omap2plus_defconfig for v4.7 merge window" from Tony Lindgren:
Mostly enable drivers used on various boards as loadable modules
where possible. Also one warning fix related to RXKAD changes
heading to v4.7. And run make save_defconfig to shrink down the
size a bit.
* tag 'omap-for-v4.7/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Enable PWM and ir-rx51 as loadable modules
ARM: omap2plus_defconfig: Enable twl6030 USB phy as loadable module
ARM: omap2plus_defconfig: Fix warning due invalid RXKAD symbol value
ARM: omap2plus_defconfig: Update with make savedefconfig
ARM: omap2plus_defconfig: Enable MDIO Bus/PHY emulation support
ARM: omap2plus_defconfig: Enable DP83867 support
ARM: omap2plus_defconfig: Enable GPIO_TPIC2810
- Remove now unnecessary multi vs single SoC compile time optimizations
as we are now using multiarch
- Configure dra7 powerdomains
- Clarify why omap-wakeupgen does not need to handle FROZEN transitions
- Add dra7 module configuration for MaASP, PWMSS and timer 12
- Add RTC module configuration unlock and lock functions
- Fix hwmod idle state sanity check sequence
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIiWHAAoJEBvUPslcq6Vz7IgQAMwUgbxdY1VI/jtDoHpeZ8TD
eELXSrk9jIyY5D9sk5r+OOEj+6dM3qv5mn8LTaAojlWh/76oNZQ8UtsO3i1QPmTD
wSXD7LPvyOQ0zCAsVdyL1q/qWr9P4VbgdHK47UaSSP/TngJYgeGIBkNGvX3V3wdV
UhgtpushI0tfE0nUlLwBUT/EFfI+cF3pKRM12PC7xenhExt7mkXVTmPyiXt12VSL
IjL8lyrDK4XoF1sKKQUfUomVYxhn+gkjh5+58iKWY15w1KEgojINTVamD9YGjMvd
T8J6PCDZYcBhYCNOtSmTmzp+aDCLXsb7qfm4BtqrhL1IUKMud7zi2Zld1W666kbQ
0ORd67SZOzf7TkKAPoAPBpX/Pj5YQzgv64EGUOKBr9uguNsnB65UAFpTm8pHzYz1
4vCmKIRyIrbQO7BqS91WI+OoD375ZGxmJNFw5FiDON2tmMrtos4tXW25Yhiyh8dD
CNpmggwCsTtQP0oI7RyHKAQ81KIdhsidSnYaT1CD/ce+o09CBpcN1V8PK3qsZ/2X
sI5nSBaPLvQ9fUvmWN2W5bu4pusg4qDbJm/q4/rXF2uUCJXe43dH+T1SRAGQGd3E
NMW7vf1e6g8b62+PYQIj11cDO29dGsVjtx2pypcCKIJV5iYa29aHTruc34XWlOjU
6C/ZiDha5hRnmqrwbqoR
=PZ/5
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "SoC related changes for omaps for v4.7 merge window" from Tony Lindgren:
- Remove now unnecessary multi vs single SoC compile time optimizations
as we are now using multiarch
- Configure dra7 powerdomains
- Clarify why omap-wakeupgen does not need to handle FROZEN transitions
- Add dra7 module configuration for MaASP, PWMSS and timer 12
- Add RTC module configuration unlock and lock functions
- Fix hwmod idle state sanity check sequence
* tag 'omap-for-v4.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: wakeupgen: Add comment for unhandled FROZEN transitions
ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memories
ARM: OMAP: DRA7: powerdomain data: Erratum i892 workaround: Disable core INA
ARM: OMAP2+: remove redundant multiplatform checks
ARM: OMAP2+: hwmod: fix _idle() hwmod state sanity check sequence
ARM: DRA7: hwmod: Add data for GPTimer 12
ARM: AMx3xx: RTC: Add lock and unlock functions
ARM: DRA7: RTC: Add lock and unlock functions
ARM: OMAP2+: hwmod: RTC: Add lock and unlock functions
ARM: OMAP2+: DRA7: Add hwmod entries for PWMSS
ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8
ARM: DRA7: clockdomain: Implement timer workaround for errata i874
ARM: OMAP2+: hwmod: Fix updating of sysconfig register
Let's pass the slot names in pdata like the legacy code does.
Once we have a generic DT binding for the slot names we can
switch to that.
Tested-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Before we start removing omap3 legacy booting support, let's make n900
DT booting behave the same way for ir-rx51 as the legacy booting does.
For now, we need to pass pdata to the ir-rx51 driver. This means that
the n900 tree can move to using DT based booting without having to carry
all the legacy platform data with it when it gets dropped from the mainline
tree.
Note that the ir-rx51 driver is currently disabled because of the
dependency to !ARCH_MULTIPLATFORM. This will get sorted out later
with the help of drivers/pwm/pwm-omap-dmtimer.c. But first we need
to add chained IRQ support to dmtimer code to avoid introducing new
custom frameworks.
So let's just pass the necessary dmtimer functions to ir-rx51 so we
can get it working in the following patch.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIHrcAAoJEME3ZuaGi4PXIfsP/0Fba9eiLkTobPb8B9KhBNzc
sQqU3CfYNCQOHTz/1W//JHfFgyOQ67bQjKiMlU5NfXS34l33mafMRLqUhUxpnPZB
3FPkecv0eG/Ojj4XO/aY3GgDSDB0Dpi894D5y2OpbkcYTSADijf1VD4+0WvWsxn0
B9UnZFCbUg2nxbAEDxMuulaDnGi7WhUTaUFYUZVBMZjYaQxDVjVwhNFlixXey8cd
9X0SRnm0quPCnuL/j5UtLQCJQu6vnyM9MqauZQqC9J3Bkd+6LaCIVlObmmoV94O9
pOqllEpSbJ6YD6N3M6DYVMihmJUUj/MTFCuJQg9CJHeb4hWUHZXxDj9w+q0Ps1JI
fKE7EhtloN1/31KpQJE7xysG8lyq1tE00v5d270QANyHUq6vYXIQgHU9DVpAorto
xkytq/9QClVHm0c40BRVrxIgXyLeSekMtqA9ILpSnhdZepUpt0UIM21x1v5tez9Y
S+CQJ3wU+iTA2HfSdFqaZ6bMYLlmqdHaylBtVorMdsLj/ZxKs2syEPgsJcDv1LWm
7pNG8S9d1zIeEB6YXfnUiaSkYvNWEkjn0GOiq+Hs+pPB+6HYoI9SaainAhzi9GAq
G42gWyA8v/AupwS0A+V5d97agaMZXxuj/FhMH2xKGhvqdNB5QZVtkNOkO+twAO12
i8bFvqlBUO8vfmYj+J39
=6ukR
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Merge "Samsung soc/drivers update for v4.7" from Krzysztof Kozłowski:
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
* tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
memory: samsung: exynos-srom: Add support for bank configuration
ARM: EXYNOS: Remove SROM related register settings from mach-exynos
MAINTAINERS: Add maintainers entry for drivers/memory/samsung
memory: Add support for Exynos SROM driver
dt-bindings: EXYNOS: Add exynos-srom device tree binding
ARM: dts: change SROM node compatible from generic to model specific
* Add SYSC PM Domains to DT for R-Car Gen 1 and 2 SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXID1CAAoJENfPZGlqN0++6t4P/A7Mb9W3qeJ13yG4CcDg93MM
kQ94tuhNtvpsgRPPlSvXr9htg9YyWk/gInR/LFRXxaVBjBbJQXiXzwGJlgtd/MQX
g+McpJfZT88i87tXlM7jLGoEvoZ7/H6VphlQMneC9XOqd3abvlyoCUxJNFTDDMt3
1JGNsHbVnZoUXIuAYeFEv9F7VAO6fsbZ0jcml++kgghutuqaAeAYbVDvo8+yIKwt
ytq/OUUZfM8LbNUybEHhmyxL2eUEAGwkdqgyiCtf5Kh72nr3fklKRW1icv+V6mb1
MoZ675XebEOsNWz7D56qbxiyu0BXd2dxFI2q7z/vs8dluLIdkOl7y4bqh81crH/s
Ox3d3UlKKo9pUOYFMNwBakJAhVOXO/zIjeYmMDP8WypgeYNspD4mQHNvPDpYcu52
vTcJojI3gV00l7tuPZA7vk+x4xH5WeBxS0Ti0fsQSkmFVnU/BFQfDOwTpHh9oa00
ea4Uh99JV4ypQ/LQ3Z8IsoXYsVAzRCfk14j0itld/DhTbeoEHIYGGxS0ILCDyB0G
VLwbPjNgAN/PzkfUhhxYYab3gleg2ElYGoSZE4s/lEUnxF7pK/A2NwhMwh7+/BGP
5pDHNOoc+RxTOSXk98CApC/quhbwlALfJ01cpAxP8j7/3G57uvUJg9dOP2++cOGr
FMUaS/ILk2YknrJkD+kO
=DcHM
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Merge "Renesas ARM Based SoC DT PM Domain Updates for v4.7" into next/late
* Add SYSC PM Domains to DT for R-Car Gen 1 and 2 SoCs
This pull requests is based on a merge of:
* "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for
v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already
pulled.
* "[GIT PULL v2] Renesas ARM Based SoC DT Updates for v4.7",
tagged as renesas-dt-for-v4.7, which you have also already pulled.
The reason for the somewhat tedious base on
renesas-rcar-sysc2-for-v4.7, which provides driver changes,
is a hard run-time dependency.
I also have a similar set of changes for arm64 which I will send separately.
* tag 'renesas-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits)
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
ARM: dts: r8a7793: Use SYSC "always-on" PM Domain
ARM: dts: r8a7791: Use SYSC "always-on" PM Domain
ARM: dts: r8a7790: Use SYSC "always-on" PM Domain
ARM: dts: r8a7779: Use SYSC "always-on" PM Domain
ARM: dts: r8a7794: Add SYSC PM Domains
ARM: dts: r8a7793: Add SYSC PM Domains
ARM: dts: r8a7791: Add SYSC PM Domains
ARM: dts: r8a7790: Add SYSC PM Domains
ARM: dts: r8a7779: Add SYSC PM Domains
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
ARM: dts: gose: Enable SDHI controllers
ARM: dts: r8a7793: Add SDHI controllers
ARM: dts: r8a7790: fix max-frequency for SDHI
...
This includes savedefconfig update of lpc32xx_defconfig, which removes
a number of outdated config options, plus ARM PrimeCell PL17x memory
controller driver is enabled by default now, on LPC32xx boards the
controller is commonly used to access SDRAM and NOR.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJXIUY+AAoJEKo94to8JTllVqcP/ijFKEz8OAjP4jGKBzBN77TW
CAOK56r+OsaFzY7FevNU802SyFiKWXOfI3t/XDZl8z2RM9MGFBIgeWGuqppRWr4s
hD0+o0Bnps515gGJRcHazCY4Woz74/aWzU7AzHcXX89HUpZy+52xhD4WM0J5NiQB
3+5U10HmCVe57RRxXyT/mLgC9ZZtSVkFlX0VI1VK2Nb8G+1cOJTs1MGp15AsvUAH
5XuGwF0Nv8bvZMg9FdNgUeMr/RhoJxO/CHv2kifRaK/Bk39GPW1fWdTARE/sxmQO
gXkrc47NwYoAAH4Jbr3Nhv1/iAyZO01HF7JouQ8MwiCTZZFd1psYfbM5LKDF0Pxr
ymr+7ktjClWKWLlwLOko9IA8ThMc0Kh1mSPAV/rg8BlafIapTo57tr+q3hYtThDw
Mb1dPnjexoJk5qBbu4xpfinPFlr8kAqLb0HosUms89uETwP+S/xevEfTFR2HdUW7
TTzR3YKmDTFM05w+Skl8/4QorYxZocFNgg/gnu+wl3xxVdoD4wNtng3SsNgkaAPS
8k99tD5jR7QFAnBRm9CaIRgUvcdCzyopTI5DP24rth5OA4Zv/q7bMxGCyS3065qv
G67zLG0FHM/UmEP1iMJc4oCzFMK681snBme2mWXHoqVLDY0CQYo0QiOW6teOV1uu
ybjQsYctQBzX6vCmhvHO
=yp6h
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-defconfig-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/defconfig
Merge "NXP LPC32xx defconfig updates for v4.7" from Vladimir Zapolskiy:
This includes savedefconfig update of lpc32xx_defconfig, which removes
a number of outdated config options, plus ARM PrimeCell PL17x memory
controller driver is enabled by default now, on LPC32xx boards the
controller is commonly used to access SDRAM and NOR.
* tag 'lpc32xx-defconfig-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: LPC32xx: add PL175 memory controller driver to defconfig
ARM: LPC32xx: defconfig update
some time ago, before the driver was accepted (due to very late
comments). However, after these late comments, the driver expects
different bindings so we need to fix the DTS.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXFNHtAAoJEME3ZuaGi4PX2LQP/3qB213z+yw60SbP9rzHYdkS
Gh5oiuJygf6KUo2lK0uWfROiLRQ4hYpbqf41TmCCLsKuXxGppofDuXAYghXDSMh8
GhKVhNW7/zsJrXOUwl30l9irp5Ai4+5dTzhe2MVyuZ/mnhC8hz+74v/KnQclpUpc
Fh3w++8Tf/hXUYThhqpo5gguEcJpWIafP1xzJ5xa9yK1MaTVuYlPt2nqba6xSjir
Ti9mahQ713T0F3FYmJlZO47C3Qn4SKiZRlkCTzzs9h7czhIkTDbbGvmyddrDJHN6
sloDE6pKTCN0Hse9f+O1erP9FdmT9k/0R9r4idL/RDLRbJvi+OL/UhCP2m1FdJNr
XgiYIwwrf9shVT/UfmMlFu4yU2KYeD1ELXtDdW0UAAMClIZ5TaHsNhGQpG7yslVb
E0lMazmBFkCBuq1W2DZPliXd9dCDbK9kcZU0bJacZKUtjXm+AEwIkJmaxrRYp7DG
hFo+EHprn/dm+9skU+oxHX3yuK+A0i17XeYeNgDRWt4JFb4CNwnX0cTRhwHOJbjq
4RQqB8ouAIdZkzCsgAZ80nior7dA5B/3WZiX5aNZfAFO4KJxNbeHTLp8+Vdujir1
H+IC7OC/1Xww8hzfIHIzvi9uV5/q9rfBBb04FMOhRdNN15pnpQ4JvJFkKMom0j/u
St/R4Tj0FEQDoSj7ViCk
=5P6R
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-exynos-srom-fixup-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "ARM: dts: exynos: Fixup for SROM controller (v4.7)" from Krzysztof Kozlowski:
DeviceTree changes for new SROM controller driver reached mainline
some time ago, before the driver was accepted (due to very late
comments). However, after these late comments, the driver expects
different bindings so we need to fix the DTS.
* tag 'samsung-dt-exynos-srom-fixup-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: change SROM node compatible from generic to model specific
am57xx-idk have Industrial grade samples whose thermal
thresholds are different as compared with dra7. Hence correcting the same.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The silicon version ES2.0 onwards are industrial grade samples
and have higher thermal thresholds than commecial grade samples.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The silicon versions which are non ES2.0 are commercial grade silicon
and have lower thermal thresholds.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
1. Cleanup regulator bindings on Exynos5420 boards.
2. Support MIC bypass in display path for Exynos5420.
3. Enable PRNG and SSS for all Exynos4 devices.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIHotAAoJEME3ZuaGi4PXdbMP/0LnIxQq8JEwTfoizAsNkga0
oJoAWUI4TXt70fPxKgQHHDg3InMLzAEMkC3fFWiH8cO8OU+khWYkCBEq0QQ+H2wi
JOKmupQ+HpQGqNwGH6vZmcCrAA5aZBhVbNz3ujocKk8F2rrJPDpkQc5Nt2nxU0R2
BYH/ZOLiUdpzqefeoinymWsVzVLapN0N5zy1zt6a0t8oYXTGwWVHCwfbGfYyAQtI
FEg9cl95pemk15awdkglmTXOnLi4MNHFjdNob0IiCg31PSreuBtpiN5mljJACwG/
Qv4fhfY1AW1J6Qn2HmH32rnR0nz+xUiIjtGp5m6XcDBM3IPfdNJdi8/Q6uX4K3Z5
H2FIyOKiNMsmhxJDIvFO0mh+rSbjt5QjbmshLYb5DtkjFQMWHPGVNucEVFvn4wLi
Xnrzfa3hzqLGTqYYF2okaJzDQZwTzQAtyrQyWjszoSHYTaG84OleZMOpAt1izOQe
Yi74//zmlAHUv5Siudebn77BflOkISWCcwFyaIuWP4rewnD+f4o/cs5npMmshil8
jBy4KPfLJegVvfIhK0iDonqXPxuE8pfHMTYfZKdZD9L2eOGaFwfZsDf9QqJT2zER
GuSRdZgv8/kYyDKHhFwg4oZofdVQho16huR6VROEMxAr3tn52U1ppUD6llOIHglZ
cO6WUM2OpRhmOblqXjFl
=ARFb
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Secound round of Samsung Device Tree updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Cleanup regulator bindings on Exynos5420 boards.
2. Support MIC bypass in display path for Exynos5420.
3. Enable PRNG and SSS for all Exynos4 devices.
* tag 'samsung-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable PRNG and SSS for all Exynos4 devices
ARM: dts: exynos: Add exynos5420-fimd compatible
ARM: dts: exynos: Remove unsupported s2mps11 regulator bindings from Exynos5420 boards
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJXIVDoAAoJEKo94to8JTlldp8P/Rq2daHz/cJwylGDUXP45Ja2
IfEDCjfwyzMqDrQX7S6gCIILmY5RZqw/TOUmYgQ6t+5lsBtooxzLBOj2ZW7J2+3/
4rni051kOKmPy9wVaQ0x8u335J993Um4mhZYPDW1Ca1vzTN0wPyC6PIxM7KInJ2J
SQfRLlrY+wxiwG2h0fXXvhGH+7i8t7wRp78dIZZT56LYfJctwjPbAMXFEeeH/5bF
GpQe2Y5hyxwQ2qL9D1LDiimdm/Mabd0D2R2dNXziWG37vu267Z2OjZqq1/pWk5rg
dpo4AUkWwTIYrZ5oHpjrSqDgBGzZ7yQYxNIQfRzaZdYlc++Io53jKnXhdCIvMpfb
lm1ENi3qD+R9BqUPjf7O9qDbkRbM+r8KcTBNuYjiC7pxj3bW6NaBbUs1P1RxUUSG
+zdDswGZNr1jc26QizVAvvQezNY1nB/V0iIQGnYtxmhyhv1nPMhxf8iW1Iu2DNjE
dEIHOM30BfPnQ16rGIvotUZ1n2Ka3fzuyqgjffwML8prILCeoo/Tuk5JGHdXblAh
ousv6Xz9Xq9+ahnd10VFzdbbSrjnVR6ABOWSTS8I7DBlVSPhcd8rqQ1IXIT3GJ1k
noKCW76Vs4kcrfYQrtIochV4IJYKhHVyI1OAJv/3CTBRT3HCVkrEUtCAukd3uiSs
7IZU1KnnerNjUhvUvJLx
=wDt+
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/dt
Merge "NXP LPC32xx device tree updates for v4.7" from Vladimir Zapolskiy:
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
* tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: phy3250: add NAND partitions device node
ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor
ARM: dts: lpc32xx: ea3250: add NAND partitions device node
ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
dt-bindings: interrupt-controllers: add description of SIC1 and SIC2
ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
ARM: dts: phy3250: enable ssp0
ARM: dts: lpc32xx: add clock properties to spi nodes
ARM: dts: lpc32xx: set default clock rate of HCLK PLL
- three low priority fixes:
- sama5d2: one pin definition and dependency with the slow clock for watchdog
- sama5d4: definition of watchdog IRQ property
- addition of the new shutdown controller to sama5d2 & sama5d2 Xplained
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXINyNAAoJEAf03oE53VmQZtIH/1Ielv9yYUfQtFg8NHrjkLhM
nk0WWRjaWvwoPnmfGYF8SAv/tb9OM96uF4o+zv7rK8vWQVf2fi67R7MJ5bllGtaN
vgULv+jNixh/ocQb+SHZwRxhUQJbycIIfS5A8nDbUMUxpjIqC1iknpfytm2VyoPb
WWcuLoJ4LZ4HiZwRDeKvN/0pMDHbo7XzfgOCHC/QdW3lDEzGBEKSi+3cGIsaQOnS
LL11M/Ul4IBH6h2sct5w3SXlLu6vnc/DRYAP4SmwdQ+9gLfEkDCH9Vifbb7p9+tx
WbNIf+kZGkQHvTlI6tqUZwga4q+0KZwDyo7s0hRoZlH5BYIRXkrfh3bhVOW3tTo=
=Q/Ob
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Second batch of DT changes for 4.7" from Nicolas Ferre:
- three low priority fixes:
- sama5d2: one pin definition and dependency with the slow clock for watchdog
- sama5d4: definition of watchdog IRQ property
- addition of the new shutdown controller to sama5d2 & sama5d2 Xplained
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: add slow clock to watchdog node
ARM: dts: at91: sama5d2: add shutdown controller node
ARM: dts: at91: sama5d4: add watchdog interrupt property
ARM: dts: at91: fix typo in sama5d2 PIN_PD24 description
-----------
- Add CPUFreq support to STiH407 family
- Add Mailbox nodes to STiH407 family
- Add RemoteProc nodes to STiH407 family
- Use 'reserved-memory' for DMA memory on STiH407
- Use the LPC timer as a clocksource
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXH3qZAAoJEMo4jShGhw+JmZcP/09CUBI2y/B8yehFR7G/2Pgv
WKPm2CuGQT1IzV9W+NMMsFF1etcuvc1OEndgA/BCQkiofVmm7KMc9djrAVrb9LkB
FH1JTNb9AvnlYP5cHsnLEKcrk8allcx2fl00nOgWER68e12s1ArAPW6Vb9pOJBqw
nGSDuwJqX+cjp0NpRX8djinmiOghRLsbPVFpcFfsMeBhh8ncFvzY7XxqWYlQxaF9
sicFZYWT/c/AL8yUZFaLHIP6fmQpqITOausIqLIzcDlBdNLHWMHv04WciESPho+v
VuaRhh4G0kxZkjvyA3sajNxqd4uG0a2pWvQRo5l3YTKuwG4y/6PvNcGydG49tCYe
tthK4aDz9B8w8QSVLxi1cq/juxp+sqvf1bWtttuEZoMkKg1bAmoofTCWHe9x1Wzd
5CkeO9i6Q4fbfTf2oQ4WpfkP/y1Il58fckKlignsLFf6WsSm236JjCRnntXKIcCP
/vwJZxPtJBepR0wrE1MAxZsQtSsWMwAde5aH6jdn0WJG4t9CLEeoIn6x2s3aBrEF
sliJm5XKyFSDXSYJd7Vwmvy6Qmm4bf8Hly5OuhUpc+nYSZcb5Nuvf1UCXLScRSiS
IohDFNF0xqJAW4+a7VyCG5NhGmR2AAo3Txt+56gt1o6Q43sx6CaCy0N09ZJc2HTX
3fko3YZuclQeJB2wo/MS
=S1d7
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Merge "STi DT updates for v4.7 #1" from Maxime Coquelin:
Highlights:
-----------
- Add CPUFreq support to STiH407 family
- Add Mailbox nodes to STiH407 family
- Add RemoteProc nodes to STiH407 family
- Use 'reserved-memory' for DMA memory on STiH407
- Use the LPC timer as a clocksource
* tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource
ARM: dts: STiH407: Move over to using the 'reserved-memory' API for obtaining DMA memory
ARM: dts: STiH407: Add nodes for RemoteProc
ARM: dts: STi: stih407-family: Add nodes for Mailbox
ARM: dts: STi: STiH407: Provide CPU with a means to look-up Major number
ARM: dts: STi: STiH407: Link CPU with its voltage supply
ARM: dts: STi: STiH407: Provide CPU with clocking information
ARM: dts: STi: STiH407: Provide generic (safe) DVFS configuration
Move cpufreq bits for mvebu into drivers/cpufreq/ directory, that's
where they really belong to.
Compiled tested only.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
That will allow us to avoid using cpufreq-dt platform data.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The current kvm implementation on arm64 does cpu-specific initialization
at system boot, and has no way to gracefully shutdown a core in terms of
kvm. This prevents kexec from rebooting the system at EL2.
This patch adds a cpu tear-down function and also puts an existing cpu-init
code into a separate function, kvm_arch_hardware_disable() and
kvm_arch_hardware_enable() respectively.
We don't need the arm64 specific cpu hotplug hook any more.
Since this patch modifies common code between arm and arm64, one stub
definition, __cpu_reset_hyp_mode(), is added on arm side to avoid
compilation errors.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
[Rebase, added separate VHE init/exit path, changed resets use of
kvm_call_hyp() to the __version, en/disabled hardware in init_subsystems(),
added icache maintenance to __kvm_hyp_reset() and removed lr restore, removed
guest-enter after teardown handling]
Signed-off-by: James Morse <james.morse@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Define ARCH_EFI_IRQ_FLAGS_MASK for arm, which will enable the generic
runtime wrapper code to detect when firmware erroneously modifies flags
over a runtime services function call.
We check all allocated flags, barring those which firmware has
legitimate reason to modify (condition flags and IT state). While in
practice corruption of some flags (e.g. J) would already be fatal, we
include these for consistency and documentation purposes.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-39-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Now there's a common template for {__,}efi_call_virt(), remove the
duplicate logic from the ARM EFI code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-34-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Allows the efifb driver to be built for ARM and arm64. This simply involves
updating the Kconfig dependency expression, and supplying dummy versions of
efifb_setup_from_dmi().
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Borislav Petkov <bp@alien8.de>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-25-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
In order to hand over the framebuffer described by the GOP protocol and
discovered by the UEFI stub, make struct screen_info accessible by the
stub. This involves allocating a loader data buffer and passing it to the
kernel proper via a UEFI Configuration Table, since the UEFI stub executes
in the context of the decompressor, and cannot access the kernel's copy of
struct screen_info directly.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Borislav Petkov <bp@alien8.de>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-22-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The Graphics Output Protocol code executes in the stub, so create a generic
version based on the x86 version in libstub so that we can move other archs
to it in subsequent patches. The new source file gop.c is added to the
libstub build for all architectures, but only wired up for x86.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Borislav Petkov <bp@alien8.de>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-18-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Recent UEFI versions expose permission attributes for runtime services
memory regions, either in the UEFI memory map or in the separate memory
attributes table. This allows the kernel to map these regions with
stricter permissions, rather than the RWX permissions that are used by
default. So wire this up in our mapping routine.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/1461614832-17633-11-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arm's mmu_context.h uses preempt_enable_no_resched and but doesn't
include anything that would pull in the declaration.
If I start including <asm/mmu_context.h> from <linux/mmu_context.h>
without this, the build breaks.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/5b95730a70f2dafe12d4fbf38d20eb7330d67ba3.1461688545.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The secondary CPU starts up in ARM mode. When the kernel is compiled in
thumb2 mode we have to explicitly compile the secondary startup
trampoline in ARM mode, otherwise the CPU will go to Nirvana.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove redundant duplicate const, which is found by smatch:
arch/arm/mach-lpc32xx/phy3250.c:162:42: warning: duplicate const
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
After switching the platform to common clock framework there is no
more need to keep dead code in arch/arm/mach-lpc32xx, which glued
legacy clock source and clock provider drivers, remove the leftovers.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The header file "reboot.h" is no longer needed, following
the migration of the restart code into the pnx4008 watchdog.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To simplify matching of DTS files of all NXP LPC32xx powered boards by
a file name add 'lpc3250' prefix to PHYTEC PHYCORE-LPC3250 board dts
file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To declare MTD OF partitions NAND controller device node should have
a special 'partitions' subnode, the change removes a debug message
from mtd/ofpart on boot:
nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000.
Trying to parse direct subnodes as partitions.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change simplifies layout of PHY3250 board description by
referencing device nodes of LPC32xx controllers by label.
No functional change intended.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To simplify matching of DTS files of all NXP LPC32xx powered boards by
a file name add 'lpc3250' prefix to Embedded Artists LPC3250 board dts
file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
There is no 'at' hardware vendor defined yet, correct vendor prefix
for Atmel is 'atmel'.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To declare MTD OF partitions NAND controller device node should have
a special 'partitions' subnode, the change removes a debug message
from mtd/ofpart on boot:
nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000.
Trying to parse direct subnodes as partitions.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change simplifies layout of EA3250 board description by
referencing device nodes of LPC32xx controllers by label.
No functional change intended.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds separate device nodes for SIC1 and SIC2 interrupt
controllers and reparents all defined SIC1 and SIC2 interrupt
producers to the correspondent interrupt controller, this is needed to
perform switching to a new LPC32xx MIC/SIC interrupt controller driver.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The default remains 127, which is good for most cases, and not even hit
most of the time, but then for some cases, as reported by Brendan, 1024+
deep frames are appearing on the radar for things like groovy, ruby.
And in some workloads putting a _lower_ cap on this may make sense. One
that is per event still needs to be put in place tho.
The new file is:
# cat /proc/sys/kernel/perf_event_max_stack
127
Chaging it:
# echo 256 > /proc/sys/kernel/perf_event_max_stack
# cat /proc/sys/kernel/perf_event_max_stack
256
But as soon as there is some event using callchains we get:
# echo 512 > /proc/sys/kernel/perf_event_max_stack
-bash: echo: write error: Device or resource busy
#
Because we only allocate the callchain percpu data structures when there
is a user, which allows for changing the max easily, its just a matter
of having no callchain users at that point.
Reported-and-Tested-by: Brendan Gregg <brendan.d.gregg@gmail.com>
Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Acked-by: David Ahern <dsahern@gmail.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: He Kuang <hekuang@huawei.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Milian Wolff <milian.wolff@kdab.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: Zefan Li <lizefan@huawei.com>
Link: http://lkml.kernel.org/r/20160426002928.GB16708@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Fix gpio active flag for the phy reset-gpios property. The line is
active low instead of active high.
Actually, this flags was never used by the macb driver.
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As the watchdog timer needs the slow clock, add it to the currently defined
wdt node.
Reported-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the SAMA5D2-Compatible Shutdown Controller node to sama5d2.dtsi
and the use of it in the sama5d2 Xplained board dts file.
Enable the RTC wakeup event and the "wake up" button support through the
input "0" that is present on the board.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The "interrupts" property is missing from the watchdog node. Add it with
highest priority value of 7.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Arnd Bergmann